1 /* Header file for targets using CGEN: Cpu tools GENerator.
3 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
5 This file is part of GDB, the GNU debugger, and the GNU Binutils.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 /* Prepend the arch name, defined in <arch>-opc.h, and _cgen_ to symbol S.
25 The lack of spaces in the arg list is important for non-stdc systems.
26 This file is included by <arch>-opc.h.
27 It can be included independently of <arch>-opc.h, in which case the arch
28 dependent portions will be declared as "unknown_cgen_foo". */
31 #define CGEN_SYM(s) CONCAT3 (unknown,_cgen_,s)
34 /* This file contains the static (unchanging) pieces and as much other stuff
35 as we can reasonably put here. It's generally cleaner to put stuff here
36 rather than having it machine generated if possible. */
38 /* The assembler syntax is made up of expressions (duh...).
39 At the lowest level the values are mnemonics, register names, numbers, etc.
40 Above that are subexpressions, if any (an example might be the
41 "effective address" in m68k cpus). At the second highest level are the
42 insns themselves. Above that are pseudo-insns, synthetic insns, and macros,
46 /* Lots of cpu's have a fixed insn size, or one which rarely changes,
47 and it's generally easier to handle these by treating the insn as an
48 integer type, rather than an array of characters. So we allow targets
49 to control this. When an integer type the value is in host byte order,
50 when an array of characters the value is in target byte order. */
52 typedef unsigned int CGEN_INSN_INT
;
54 typedef CGEN_INSN_INT CGEN_INSN_BYTES
;
55 typedef CGEN_INSN_INT
*CGEN_INSN_BYTES_PTR
;
57 typedef unsigned char *CGEN_INSN_BYTES
;
58 typedef unsigned char *CGEN_INSN_BYTES_PTR
;
62 #define CGEN_INLINE inline
75 typedef struct cgen_insn CGEN_INSN
;
77 /* Opaque pointer version for use by external world. */
78 typedef struct cgen_opcode_table
* CGEN_OPCODE_DESC
;
81 Attributes are used to describe various random things.
82 ??? Will need to be revisited when expression support is added. */
84 /* Struct to record attribute information. */
87 unsigned char num_nonbools
;
89 unsigned int nonbool
[1];
92 /* Define a structure member for attributes with N non-boolean entries.
93 The attributes are sorted so that the non-boolean ones come first.
94 num_nonbools: count of nonboolean attributes
95 bool: values of boolean attributes
96 nonbool: values of non-boolean attributes
97 There is a maximum of 32 attributes total. */
98 #define CGEN_ATTR_TYPE(n) \
99 struct { unsigned char num_nonbools; \
101 unsigned int nonbool[(n) ? (n) : 1]; }
103 /* Return the boolean attributes. */
104 #define CGEN_ATTR_BOOLS(a) ((a)->bool)
106 /* Given an attribute number, return its mask. */
107 #define CGEN_ATTR_MASK(attr) (1 << (attr))
109 /* Return the value of boolean attribute ATTR in ATTRS. */
110 #define CGEN_BOOL_ATTR(attrs, attr) \
111 ((CGEN_ATTR_MASK (attr) & (attrs)) != 0)
113 /* Return value of attribute ATTR in ATTR_TABLE for OBJ.
114 OBJ is a pointer to the entity that has the attributes.
115 It's not used at present but is reserved for future purposes. */
116 #define CGEN_ATTR_VALUE(obj, attr_table, attr) \
117 ((unsigned int) (attr) < (attr_table)->num_nonbools \
118 ? ((attr_table)->nonbool[attr]) \
119 : (((attr_table)->bool & (1 << (attr))) != 0))
121 /* Attribute name/value tables.
122 These are used to assist parsing of descriptions at runtime. */
130 /* For each domain (ifld,operand,insn), list of attributes. */
135 /* NULL for boolean attributes. */
136 const CGEN_ATTR_ENTRY
* vals
;
139 /* Parse result (also extraction result).
141 The result of parsing an insn is stored here.
142 To generate the actual insn, this is passed to the insert handler.
143 When printing an insn, the result of extraction is stored here.
144 To print the insn, this is passed to the print handler.
146 It is machine generated so we don't define it here,
147 but we do need a forward decl for the handler fns.
149 There is one member for each possible field in the insn.
150 The type depends on the field.
151 Also recorded here is the computed length of the insn for architectures
155 typedef struct cgen_fields CGEN_FIELDS
;
157 /* Total length of the insn, as recorded in the `fields' struct. */
158 /* ??? The field insert handler has lots of opportunities for optimization
159 if it ever gets inlined. On architectures where insns all have the same
160 size, may wish to detect that and make this macro a constant - to allow
161 further optimizations. */
162 #define CGEN_FIELDS_BITSIZE(fields) ((fields)->length)
164 /* Extraction support for variable length insn sets. */
166 /* When disassembling we don't know the number of bytes to read at the start.
167 So the first CGEN_BASE_INSN_BITSIZE bytes are read at the start and the rest
168 are read when needed. This struct controls this. It is basically the
169 disassemble_info stuff, except that we provide a cache for values already
170 read (since bytes can typically be read several times to fetch multiple
171 operands that may be in them), and that extraction of fields is needed
172 in contexts other than disassembly. */
175 /* A pointer to the disassemble_info struct.
176 We don't require dis-asm.h so we use PTR for the type here.
177 If NULL, BYTES is full of valid data (VALID == -1). */
179 /* Points to a working buffer of sufficient size. */
180 unsigned char *bytes
;
181 /* Mask of bytes that are valid in BYTES. */
185 /* Associated with each insn or expression is a set of "handlers" for
186 performing operations like parsing, printing, etc. These require a bfd_vma
187 value to be passed around but we don't want all applications to need bfd.h.
188 So this stuff is only provided if bfd.h has been included. */
193 OD is an opcode table descriptor.
194 INSN is a pointer to a struct describing the insn being parsed.
195 STRP is a pointer to a pointer to the text being parsed.
196 FIELDS is a pointer to a cgen_fields struct in which the results are placed.
197 If the expression is successfully parsed, *STRP is updated.
198 If not it is left alone.
199 The result is NULL if success or an error message. */
200 typedef const char * (cgen_parse_fn
)
201 PARAMS ((CGEN_OPCODE_DESC
/*od*/, const CGEN_INSN
* /*insn*/,
202 const char ** /*strp*/, CGEN_FIELDS
* /*fields*/));
205 OD is an opcode table descriptor.
206 INSN is a pointer to a struct describing the insn being parsed.
207 FIELDS is a pointer to a cgen_fields struct from which the values
209 INSNP is a pointer to a buffer in which to place the insn.
210 PC is the pc value of the insn.
211 The result is an error message or NULL if success. */
212 typedef const char * (cgen_insert_fn
)
213 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
* /*insn*/,
214 CGEN_FIELDS
* /*fields*/, CGEN_INSN_BYTES_PTR
/*insnp*/,
218 OD is an opcode table descriptor.
219 INSN is a pointer to a struct describing the insn being parsed.
220 The second argument is a pointer to a struct controlling extraction
221 (only used for variable length insns).
222 EX_INFO is a pointer to a struct for controlling reading of further
224 BASE_INSN is the first CGEN_BASE_INSN_SIZE bytes (host order).
225 FIELDS is a pointer to a cgen_fields struct in which the results are placed.
226 PC is the pc value of the insn.
227 The result is the length of the insn in bits or zero if not recognized. */
228 typedef int (cgen_extract_fn
)
229 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
* /*insn*/,
230 CGEN_EXTRACT_INFO
* /*ex_info*/, unsigned long /*base_insn*/,
231 CGEN_FIELDS
* /*fields*/, bfd_vma
/*pc*/));
234 OD is an opcode table descriptor.
235 INFO is a pointer to the disassembly info.
236 Eg: disassemble_info. It's defined as `PTR' so this file can be included
238 INSN is a pointer to a struct describing the insn being printed.
239 FIELDS is a pointer to a cgen_fields struct.
240 PC is the pc value of the insn.
241 LEN is the length of the insn, in bits. */
242 typedef void (cgen_print_fn
)
243 PARAMS ((CGEN_OPCODE_DESC
/*od*/, PTR
/*info*/,
244 const CGEN_INSN
* /*insn*/,
245 CGEN_FIELDS
* /*fields*/, bfd_vma
/*pc*/, int /*len*/));
247 /* The `parse' and `insert' fields are indices into these tables.
248 The elements are pointer to specialized handler functions.
249 Element 0 is special, it means use the default handler. */
250 extern cgen_parse_fn
* const CGEN_SYM (parse_handlers
) [];
251 #define CGEN_PARSE_FN(x) (CGEN_SYM (parse_handlers)[(x)->base.parse])
252 extern cgen_insert_fn
* const CGEN_SYM (insert_handlers
) [];
253 #define CGEN_INSERT_FN(x) (CGEN_SYM (insert_handlers)[(x)->base.insert])
255 /* Likewise for the `extract' and `print' fields. */
256 extern cgen_extract_fn
* const CGEN_SYM (extract_handlers
) [];
257 #define CGEN_EXTRACT_FN(x) (CGEN_SYM (extract_handlers)[(x)->base.extract])
258 extern cgen_print_fn
* const CGEN_SYM (print_handlers
) [];
259 #define CGEN_PRINT_FN(x) (CGEN_SYM (print_handlers)[(x)->base.print])
261 /* Default insn parser, printer. */
262 extern cgen_parse_fn
CGEN_SYM (parse_insn
);
263 extern cgen_insert_fn
CGEN_SYM (insert_insn
);
264 extern cgen_extract_fn
CGEN_SYM (extract_insn
);
265 extern cgen_print_fn
CGEN_SYM (print_insn
);
267 #endif /* BFD_VERSION */
269 /* Base class of parser/printer.
270 (Don't read too much into the use of the phrase "base class".
271 It's a name I'm using to organize my thoughts.)
273 Instructions and expressions all share this data in common.
274 It's a collection of the common elements needed to parse, insert, extract,
275 and print each of them.
276 This is an underutilized facility, and exists as a potential escape hatch
277 for handling more complicated assembler syntaxes. */
281 /* Indices into the handler tables.
282 We could use pointers here instead, but in the case of the insn table,
283 90% of them would be identical and that's a lot of redundant data.
284 0 means use the default (what the default is is up to the code).
285 Using indices also keeps assembler code out of the disassembler and
287 unsigned char parse
, insert
, extract
, print
;
290 /* Assembler interface.
292 The interface to the assembler is intended to be clean in the sense that
293 libopcodes.a is a standalone entity and could be used with any assembler.
294 Not that one would necessarily want to do that but rather that it helps
295 keep a clean interface. The interface will obviously be slanted towards
296 GAS, but at least it's a start.
297 ??? Note that one possible use of the assembler besides GAS is GDB.
299 Parsing is controlled by the assembler which calls
300 CGEN_SYM (assemble_insn). If it can parse and build the entire insn
301 it doesn't call back to the assembler. If it needs/wants to call back
302 to the assembler, cgen_parse_operand_fn is called which can either
304 - return a number to be inserted in the insn
305 - return a "register" value to be inserted
306 (the register might not be a register per pe)
307 - queue the argument and return a marker saying the expression has been
308 queued (eg: a fix-up)
309 - return an error message indicating the expression wasn't recognizable
311 The result is an error message or NULL for success.
312 The parsed value is stored in the bfd_vma *. */
314 /* Values for indicating what the caller wants. */
315 enum cgen_parse_operand_type
317 CGEN_PARSE_OPERAND_INIT
,
318 CGEN_PARSE_OPERAND_INTEGER
,
319 CGEN_PARSE_OPERAND_ADDRESS
322 /* Values for indicating what was parsed. */
323 enum cgen_parse_operand_result
325 CGEN_PARSE_OPERAND_RESULT_NUMBER
,
326 CGEN_PARSE_OPERAND_RESULT_REGISTER
,
327 CGEN_PARSE_OPERAND_RESULT_QUEUED
,
328 CGEN_PARSE_OPERAND_RESULT_ERROR
331 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
332 typedef const char * (cgen_parse_operand_fn
)
333 PARAMS ((CGEN_OPCODE_DESC
,
334 enum cgen_parse_operand_type
, const char **, int, int,
335 enum cgen_parse_operand_result
*, bfd_vma
*));
337 typedef const char * (cgen_parse_operand_fn
) ();
340 /* Set the cgen_parse_operand_fn callback. */
341 extern void cgen_set_parse_operand_fn
342 PARAMS ((CGEN_OPCODE_DESC
, cgen_parse_operand_fn
));
344 /* Called before trying to match a table entry with the insn. */
345 extern void cgen_init_parse_operand
PARAMS ((CGEN_OPCODE_DESC
));
347 /* Operand values (keywords, integers, symbols, etc.) */
349 /* Types of assembler elements. */
353 CGEN_ASM_KEYWORD
, CGEN_ASM_MAX
356 /* List of hardware elements. */
358 typedef struct cgen_hw_entry
360 /* The type of this entry, one of `enum hw_type'.
361 This is an int and not the enum as the latter may not be declared yet. */
363 const struct cgen_hw_entry
* next
;
365 enum cgen_asm_type asm_type
;
367 #ifndef CGEN_HW_NBOOL_ATTRS
368 #define CGEN_HW_NBOOL_ATTRS 1
370 const CGEN_ATTR_TYPE (CGEN_HW_NBOOL_ATTRS
) attrs
;
371 #define CGEN_HW_ATTRS(hw) (&(hw)->attrs)
374 /* Return value of attribute ATTR in HW. */
375 #define CGEN_HW_ATTR(hw, attr) \
376 CGEN_ATTR_VALUE (hw, CGEN_HW_ATTRS (hw), attr)
378 extern const CGEN_HW_ENTRY
* cgen_hw_lookup_by_name
379 PARAMS ((CGEN_OPCODE_DESC
, const char *));
380 extern const CGEN_HW_ENTRY
* cgen_hw_lookup_by_num
381 PARAMS ((CGEN_OPCODE_DESC
, int));
383 /* This struct is used to describe things like register names, etc. */
385 typedef struct cgen_keyword_entry
387 /* Name (as in register name). */
390 /* Value (as in register number).
391 The value cannot be -1 as that is used to indicate "not found".
392 IDEA: Have "FUNCTION" attribute? [function is called to fetch value]. */
396 This should, but technically needn't, appear last. It is a variable sized
397 array in that one architecture may have 1 nonbool attribute and another
398 may have more. Having this last means the non-architecture specific code
400 /* ??? Moving this last should be done by treating keywords like insn lists
401 and moving the `next' fields into a CGEN_KEYWORD_LIST struct. */
402 /* FIXME: Not used yet. */
403 #ifndef CGEN_KEYWORD_NBOOL_ATTRS
404 #define CGEN_KEYWORD_NBOOL_ATTRS 1
406 const CGEN_ATTR_TYPE (CGEN_KEYWORD_NBOOL_ATTRS
) attrs
;
408 /* Next name hash table entry. */
409 struct cgen_keyword_entry
*next_name
;
410 /* Next value hash table entry. */
411 struct cgen_keyword_entry
*next_value
;
412 } CGEN_KEYWORD_ENTRY
;
414 /* Top level struct for describing a set of related keywords
415 (e.g. register names).
417 This struct supports runtime entry of new values, and hashed lookups. */
419 typedef struct cgen_keyword
421 /* Pointer to initial [compiled in] values. */
422 CGEN_KEYWORD_ENTRY
* init_entries
;
424 /* Number of entries in `init_entries'. */
425 unsigned int num_init_entries
;
427 /* Hash table used for name lookup. */
428 CGEN_KEYWORD_ENTRY
** name_hash_table
;
430 /* Hash table used for value lookup. */
431 CGEN_KEYWORD_ENTRY
** value_hash_table
;
433 /* Number of entries in the hash_tables. */
434 unsigned int hash_table_size
;
436 /* Pointer to null keyword "" entry if present. */
437 const CGEN_KEYWORD_ENTRY
* null_entry
;
440 /* Structure used for searching. */
444 /* Table being searched. */
445 const CGEN_KEYWORD
* table
;
447 /* Specification of what is being searched for. */
450 /* Current index in hash table. */
451 unsigned int current_hash
;
453 /* Current element in current hash chain. */
454 CGEN_KEYWORD_ENTRY
* current_entry
;
455 } CGEN_KEYWORD_SEARCH
;
457 /* Lookup a keyword from its name. */
458 const CGEN_KEYWORD_ENTRY
* cgen_keyword_lookup_name
459 PARAMS ((CGEN_KEYWORD
*, const char *));
460 /* Lookup a keyword from its value. */
461 const CGEN_KEYWORD_ENTRY
* cgen_keyword_lookup_value
462 PARAMS ((CGEN_KEYWORD
*, int));
464 void cgen_keyword_add
PARAMS ((CGEN_KEYWORD
*, CGEN_KEYWORD_ENTRY
*));
465 /* Keyword searching.
466 This can be used to retrieve every keyword, or a subset. */
467 CGEN_KEYWORD_SEARCH cgen_keyword_search_init
468 PARAMS ((CGEN_KEYWORD
*, const char *));
469 const CGEN_KEYWORD_ENTRY
*cgen_keyword_search_next
470 PARAMS ((CGEN_KEYWORD_SEARCH
*));
472 /* Operand value support routines. */
474 extern const char * cgen_parse_keyword
475 PARAMS ((CGEN_OPCODE_DESC
, const char **, CGEN_KEYWORD
*, long *));
476 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
477 extern const char * cgen_parse_signed_integer
478 PARAMS ((CGEN_OPCODE_DESC
, const char **, int, long *));
479 extern const char * cgen_parse_unsigned_integer
480 PARAMS ((CGEN_OPCODE_DESC
, const char **, int, unsigned long *));
481 extern const char * cgen_parse_address
482 PARAMS ((CGEN_OPCODE_DESC
, const char **, int, int,
483 enum cgen_parse_operand_result
*, bfd_vma
*));
484 extern const char * cgen_validate_signed_integer
485 PARAMS ((long, long, long));
486 extern const char * cgen_validate_unsigned_integer
487 PARAMS ((unsigned long, unsigned long, unsigned long));
492 /* ??? This duplicates the values in arch.h. Revisit.
493 These however need the CGEN_ prefix [as does everything in this file]. */
494 /* ??? Targets may need to add their own modes so we may wish to move this
495 to <arch>-opc.h, or add a hook. */
498 CGEN_MODE_VOID
, /* FIXME: rename simulator's VM to VOID */
499 CGEN_MODE_BI
, CGEN_MODE_QI
, CGEN_MODE_HI
, CGEN_MODE_SI
, CGEN_MODE_DI
,
500 CGEN_MODE_UBI
, CGEN_MODE_UQI
, CGEN_MODE_UHI
, CGEN_MODE_USI
, CGEN_MODE_UDI
,
501 CGEN_MODE_SF
, CGEN_MODE_DF
, CGEN_MODE_XF
, CGEN_MODE_TF
,
505 /* FIXME: Until simulator is updated. */
506 #define CGEN_MODE_VM CGEN_MODE_VOID
508 /* This struct defines each entry in the operand table. */
510 typedef struct cgen_operand
512 /* Name as it appears in the syntax string. */
515 /* The hardware element associated with this operand. */
516 const CGEN_HW_ENTRY
*hw
;
518 /* FIXME: We don't yet record ifield definitions, which we should.
519 When we do it might make sense to delete start/length (since they will
520 be duplicated in the ifield's definition) and replace them with a
521 pointer to the ifield entry. Note that as more complicated situations
522 need to be handled, going more and more with an OOP paradigm will help
523 keep the complication under control. Of course, this was the goal from
524 the start, but getting there in one step was too much too soon. */
526 /* Bit position (msb of first byte = bit 0).
527 This is just a hint, and may be unused in more complex operands.
528 May be unused for a modifier. */
531 /* The number of bits in the operand.
532 This is just a hint, and may be unused in more complex operands.
533 May be unused for a modifier. */
534 unsigned char length
;
536 #if 0 /* ??? Interesting idea but relocs tend to get too complicated,
537 and ABI dependent, for simple table lookups to work. */
538 /* Ideally this would be the internal (external?) reloc type. */
543 This should, but technically needn't, appear last. It is a variable sized
544 array in that one architecture may have 1 nonbool attribute and another
545 may have more. Having this last means the non-architecture specific code
546 needn't care, now or tomorrow. */
547 #ifndef CGEN_OPERAND_NBOOL_ATTRS
548 #define CGEN_OPERAND_NBOOL_ATTRS 1
550 const CGEN_ATTR_TYPE (CGEN_OPERAND_NBOOL_ATTRS
) attrs
;
551 #define CGEN_OPERAND_ATTRS(operand) (&(operand)->attrs)
554 /* Return value of attribute ATTR in OPERAND. */
555 #define CGEN_OPERAND_ATTR(operand, attr) \
556 CGEN_ATTR_VALUE (operand, CGEN_OPERAND_ATTRS (operand), attr)
558 /* The operand table is currently a very static entity. */
559 extern const CGEN_OPERAND
CGEN_SYM (operand_table
)[];
561 enum cgen_operand_type
;
563 #define CGEN_OPERAND_INDEX(operand) ((int) ((operand) - CGEN_SYM (operand_table)))
564 /* FIXME: Rename, cpu-opc.h defines this as the typedef of the enum. */
565 #define CGEN_OPERAND_TYPE(operand) ((enum cgen_operand_type) CGEN_OPERAND_INDEX (operand))
566 #define CGEN_OPERAND_ENTRY(n) (& CGEN_SYM (operand_table) [n])
568 /* Instruction operand instances.
570 For each instruction, a list of the hardware elements that are read and
571 written are recorded. */
573 /* The type of the instance. */
574 enum cgen_operand_instance_type
{
575 /* End of table marker. */
576 CGEN_OPERAND_INSTANCE_END
= 0,
577 CGEN_OPERAND_INSTANCE_INPUT
, CGEN_OPERAND_INSTANCE_OUTPUT
582 /* The type of this operand. */
583 enum cgen_operand_instance_type type
;
584 #define CGEN_OPERAND_INSTANCE_TYPE(opinst) ((opinst)->type)
586 /* Name of operand. */
588 #define CGEN_OPERAND_INSTANCE_NAME(opinst) ((opinst)->name)
590 /* The hardware element referenced. */
591 const CGEN_HW_ENTRY
*hw
;
592 #define CGEN_OPERAND_INSTANCE_HW(opinst) ((opinst)->hw)
594 /* The mode in which the operand is being used. */
596 #define CGEN_OPERAND_INSTANCE_MODE(opinst) ((opinst)->mode)
598 /* The operand table entry or NULL if there is none (i.e. an explicit
599 hardware reference). */
600 const CGEN_OPERAND
*operand
;
601 #define CGEN_OPERAND_INSTANCE_OPERAND(opinst) ((opinst)->operand)
603 /* If `operand' is NULL, the index (e.g. into array of registers). */
605 #define CGEN_OPERAND_INSTANCE_INDEX(opinst) ((opinst)->index)
606 } CGEN_OPERAND_INSTANCE
;
610 Each insn format and subexpression has one of these.
612 The syntax "string" consists of characters (n > 0 && n < 128), and operand
613 values (n >= 128), and is terminated by 0. Operand values are 128 + index
614 into the operand table. The operand table doesn't exist in C, per se, as
615 the data is recorded in the parse/insert/extract/print switch statements. */
617 #ifndef CGEN_MAX_SYNTAX_BYTES
618 #define CGEN_MAX_SYNTAX_BYTES 16
623 unsigned char syntax
[CGEN_MAX_SYNTAX_BYTES
];
626 #define CGEN_SYNTAX_STRING(syn) (syn->syntax)
627 #define CGEN_SYNTAX_CHAR_P(c) ((c) < 128)
628 #define CGEN_SYNTAX_CHAR(c) (c)
629 #define CGEN_SYNTAX_FIELD(c) ((c) - 128)
630 #define CGEN_SYNTAX_MAKE_FIELD(c) ((c) + 128)
632 /* ??? I can't currently think of any case where the mnemonic doesn't come
633 first [and if one ever doesn't building the hash tables will be tricky].
634 However, we treat mnemonics as just another operand of the instruction.
635 A value of 1 means "this is where the mnemonic appears". 1 isn't
636 special other than it's a non-printable ASCII char. */
637 #define CGEN_SYNTAX_MNEMONIC 1
638 #define CGEN_SYNTAX_MNEMONIC_P(ch) ((ch) == CGEN_SYNTAX_MNEMONIC)
640 /* Instruction formats.
642 Instructions are grouped by format. Associated with an instruction is its
643 format. Each opcode table entry contains a format table entry.
644 ??? There is usually very few formats compared with the number of insns,
645 so one can reduce the size of the opcode table by recording the format table
646 as a separate entity. Given that we currently don't, format table entries
647 are also distinguished by their operands. This increases the size of the
648 table, but reduces the number of tables. It's all minutiae anyway so it
649 doesn't really matter [at this point in time].
651 ??? Support for variable length ISA's is wip. */
655 /* Length that MASK and VALUE have been calculated to
656 [VALUE is recorded elsewhere].
657 Normally it is CGEN_BASE_INSN_BITSIZE. On [V]LIW architectures where
658 the base insn size may be larger than the size of an insn, this field is
659 less than CGEN_BASE_INSN_BITSIZE. */
660 unsigned char mask_length
;
662 /* Total length of instruction, in bits. */
663 unsigned char length
;
665 /* Mask to apply to the first MASK_LENGTH bits.
666 Each insn's value is stored with the insn.
667 The first step in recognizing an insn for disassembly is
668 (opcode & mask) == value. */
672 /* This struct defines each entry in the instruction table. */
676 /* This field is an array of functions that operand on this entry. */
677 struct cgen_base base
;
678 #define CGEN_INSN_BASE(insn) (&(insn)->base)
680 /* Each real instruction is enumerated.
681 The simulator use to use this value but currently no longer does.
682 This may go away in time. */
684 #define CGEN_INSN_NUM(insn) ((insn)->num)
686 /* Name of entry (that distinguishes it from all other entries).
687 This is used, for example, in simulator profiling results. */
688 /* ??? If mnemonics have operands, try to print full mnemonic. */
690 #define CGEN_INSN_NAME(insn) ((insn)->name)
692 /* Mnemonic. This is used when parsing and printing the insn.
693 In the case of insns that have operands on the mnemonics, this is
694 only the constant part. E.g. for conditional execution of an `add' insn,
695 where the full mnemonic is addeq, addne, etc., this is only "add". */
696 const char * mnemonic
;
697 #define CGEN_INSN_MNEMONIC(insn) ((insn)->mnemonic)
700 const CGEN_SYNTAX syntax
;
701 #define CGEN_INSN_SYNTAX(insn) (& (insn)->syntax)
704 const CGEN_FORMAT format
;
705 #define CGEN_INSN_MASK_BITSIZE(insn) ((insn)->format.mask_length)
706 #define CGEN_INSN_BITSIZE(insn) ((insn)->format.length)
708 /* Instruction opcode value. */
710 #define CGEN_INSN_VALUE(insn) ((insn)->value)
711 #define CGEN_INSN_MASK(insn) ((insn)->format.mask)
713 #if 0 /* ??? Disabled for now as there is a problem with embedded newlines
714 and the table is already pretty big. Should perhaps be moved
715 to a file of its own. */
716 /* Semantics, as CDL. */
717 /* ??? Note that the operand instance table could be computed at runtime
718 if we parse this and cache the results. */
720 #define CGEN_INSN_CDX(insn) ((insn)->cdx)
723 /* Opaque pointer to "subclass" specific data.
724 In the case of real insns this points to a NULL entry terminated
725 table of operands used, or NULL if none.
726 In the case of macro insns this points to data to control the expansion.
727 ??? I'd rather not get carried away and lay things out with pedantic
728 purity right now. Sure, other fields might better be tucked away in
731 #define CGEN_INSN_DATA(insn) ((insn)->data)
732 #define CGEN_INSN_OPERANDS(insn) ((CGEN_OPERAND_INSTANCE *) (insn)->data)
735 This must appear last. It is a variable sized array in that one
736 architecture may have 1 nonbool attribute and another may have more.
737 Having this last means the non-architecture specific code needn't
739 #ifndef CGEN_INSN_NBOOL_ATTRS
740 #define CGEN_INSN_NBOOL_ATTRS 1
742 const CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_ATTRS
) attrs
;
743 #define CGEN_INSN_ATTRS(insn) (&(insn)->attrs)
744 /* Return value of attribute ATTR in INSN. */
745 #define CGEN_INSN_ATTR(insn, attr) \
746 CGEN_ATTR_VALUE (insn, CGEN_INSN_ATTRS (insn), attr)
749 /* Return non-zero if INSN is the "invalid" insn marker. */
750 #define CGEN_INSN_INVALID_P(insn) (CGEN_INSN_MNEMONIC (insn) == 0)
752 /* Instruction lists.
753 This is used for adding new entries and for creating the hash lists. */
755 typedef struct cgen_insn_list
757 struct cgen_insn_list
* next
;
758 const CGEN_INSN
* insn
;
761 /* The table of instructions. */
765 /* Pointer to initial [compiled in] entries. */
766 const CGEN_INSN
* init_entries
;
768 /* Size of an entry (since the attribute member is variable sized). */
769 unsigned int entry_size
;
771 /* Number of entries in `init_entries', including trailing NULL entry. */
772 unsigned int num_init_entries
;
774 /* Values added at runtime. */
775 CGEN_INSN_LIST
* new_entries
;
778 /* ??? This is currently used by the simulator. */
779 extern const CGEN_INSN
CGEN_SYM (insn_table_entries
)[];
781 /* Return number of instructions. This includes any added at runtime. */
783 extern int cgen_insn_count
PARAMS ((CGEN_OPCODE_DESC
));
784 extern int cgen_macro_insn_count
PARAMS ((CGEN_OPCODE_DESC
));
786 /* Macro instructions.
787 Macro insns aren't real insns, they map to one or more real insns.
788 E.g. An architecture's "nop" insn may actually be an "mv r0,r0" or
791 Macro insns can expand to nothing (e.g. a nop that is optimized away).
792 This is useful in multi-insn macros that build a constant in a register.
793 Of course this isn't the default behaviour and must be explicitly enabled.
795 Assembly of macro-insns is relatively straightforward. Disassembly isn't.
796 However, disassembly of at least some kinds of macro insns is important
797 in order that the disassembled code preserve the readability of the original
798 insn. What is attempted here is to disassemble all "simple" macro-insns,
799 where "simple" is currently defined to mean "expands to one real insn".
801 Simple macro-insns are handled specially. They are emitted as ALIAS's
802 of real insns. This simplifies their handling since there's usually more
803 of them than any other kind of macro-insn, and proper disassembly of them
804 falls out for free. */
806 /* For each macro-insn there may be multiple expansion possibilities,
807 depending on the arguments. This structure is accessed via the `data'
808 member of CGEN_INSN. */
810 typedef struct cgen_minsn_expansion
{
811 /* Function to do the expansion.
812 If the expansion fails (e.g. "no match") NULL is returned.
813 Space for the expansion is obtained with malloc.
814 It is up to the caller to free it. */
815 const char * (* fn
) PARAMS ((const struct cgen_minsn_expansion
*,
816 const char *, const char **, int *, CGEN_OPERAND
**));
817 #define CGEN_MIEXPN_FN(ex) ((ex)->fn)
819 /* Instruction(s) the macro expands to.
820 The format of STR is defined by FN.
821 It is typically the assembly code of the real insn, but it could also be
822 the original Scheme expression or a tokenized form of it (with FN being
823 an appropriate interpreter). */
825 #define CGEN_MIEXPN_STR(ex) ((ex)->str)
826 } CGEN_MINSN_EXPANSION
;
829 When supported, this function will convert the input string to another
830 string and the parser will be invoked recursively. The output string
831 may contain further macro invocations. */
833 extern const char * cgen_expand_macro_insn
834 PARAMS ((CGEN_OPCODE_DESC
, const struct cgen_minsn_expansion
*,
835 const char *, const char **, int *, CGEN_OPERAND
**));
837 /* The assembler insn table is hashed based on some function of the mnemonic
838 (the actually hashing done is up to the target, but we provide a few
839 examples like the first letter or a function of the entire mnemonic). */
841 #ifndef CGEN_ASM_HASH_P
842 #define CGEN_ASM_HASH_P(insn) 1
845 /* INSN is the CGEN_INSN entry when building the hash table and NULL
846 when looking up the insn during assembly. */
847 #ifndef CGEN_ASM_HASH
848 #define CGEN_ASM_HASH_SIZE 127
849 #ifdef CGEN_MNEMONIC_OPERANDS
850 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
852 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
856 extern CGEN_INSN_LIST
* cgen_asm_lookup_insn
857 PARAMS ((CGEN_OPCODE_DESC
, const char *));
858 #define CGEN_ASM_LOOKUP_INSN(od, string) cgen_asm_lookup_insn ((od), (string))
859 #define CGEN_ASM_NEXT_INSN(insn) ((insn)->next)
861 /* The disassembler insn table is hashed based on some function of machine
862 instruction (the actually hashing done is up to the target). */
864 #ifndef CGEN_DIS_HASH_P
865 #define CGEN_DIS_HASH_P(insn) 1
868 /* It doesn't make much sense to provide a default here,
869 but while this is under development we do.
870 BUFFER is a pointer to the bytes of the insn.
871 VALUE is the first CGEN_BASE_INSN_SIZE bytes as an int in host order. */
872 #ifndef CGEN_DIS_HASH
873 #define CGEN_DIS_HASH_SIZE 256
874 #define CGEN_DIS_HASH(buffer, value) (*(unsigned char *) (buffer))
877 extern CGEN_INSN_LIST
* cgen_dis_lookup_insn
878 PARAMS ((CGEN_OPCODE_DESC
, const char *, unsigned long));
879 #define CGEN_DIS_LOOKUP_INSN(od, buf, value) cgen_dis_lookup_insn ((od), (buf), (value))
880 #define CGEN_DIS_NEXT_INSN(insn) ((insn)->next)
883 A copy of this is created when the opcode table is "opened".
884 All global state information is recorded here. */
885 /* ??? This is all low level implementation stuff here that might be better
886 put in an internal file (much like the distinction between bfd.h and
887 libbfd.h). That is an extra complication that is left for later. */
889 typedef struct cgen_opcode_table
891 const CGEN_HW_ENTRY
* hw_list
;
892 #define CGEN_OPCODE_HW_LIST(od) ((od)->hw_list)
894 const CGEN_OPERAND
* operand_table
;
895 #define CGEN_OPCODE_OPERAND_TABLE(od) ((od)->operand_table)
897 CGEN_INSN_TABLE insn_table
;
898 #define CGEN_OPCODE_INSN_TABLE(od) (& (od)->insn_table)
900 /* Macro instructions are defined separately and are combined with real
901 insns during hash table computation. */
902 CGEN_INSN_TABLE macro_insn_table
;
903 #define CGEN_OPCODE_MACRO_INSN_TABLE(od) (& (od)->macro_insn_table)
905 /* Return non-zero if insn should be added to hash table. */
906 int (* asm_hash_p
) PARAMS ((const CGEN_INSN
*));
907 #define CGEN_OPCODE_ASM_HASH_P(od) ((od)->asm_hash_p)
909 /* Assembler hash function. */
910 unsigned int (* asm_hash
) PARAMS ((const char *));
911 #define CGEN_OPCODE_ASM_HASH(od) ((od)->asm_hash)
913 /* Number of entries in assembler hash table. */
914 unsigned int asm_hash_size
;
915 #define CGEN_OPCODE_ASM_HASH_SIZE(od) ((od)->asm_hash_size)
917 /* Return non-zero if insn should be added to hash table. */
918 int (* dis_hash_p
) PARAMS ((const CGEN_INSN
*));
919 #define CGEN_OPCODE_DIS_HASH_P(od) ((od)->dis_hash_p)
921 /* Disassembler hash function. */
922 unsigned int (* dis_hash
) PARAMS ((const char *, unsigned long));
923 #define CGEN_OPCODE_DIS_HASH(od) ((od)->dis_hash)
925 /* Number of entries in disassembler hash table. */
926 unsigned int dis_hash_size
;
927 #define CGEN_OPCODE_DIS_HASH_SIZE(od) ((od)->dis_hash_size)
929 /* Operand parser callback. */
930 cgen_parse_operand_fn
* parse_operand_fn
;
931 #define CGEN_OPCODE_PARSE_OPERAND_FN(od) ((od)->parse_operand_fn)
933 /* Current machine (a la BFD machine number). */
935 #define CGEN_OPCODE_MACH(od) ((od)->mach)
937 /* Current endian. */
938 enum cgen_endian endian
;
939 #define CGEN_OPCODE_ENDIAN(od) ((od)->endian)
941 /* Current insn endian. */
942 enum cgen_endian insn_endian
;
943 #define CGEN_OPCODE_INSN_ENDIAN(od) ((od)->insn_endian)
945 /* Assembler instruction hash table. */
946 CGEN_INSN_LIST
**asm_hash_table
;
947 #define CGEN_OPCODE_ASM_HASH_TABLE(od) ((od)->asm_hash_table)
948 CGEN_INSN_LIST
*asm_hash_table_entries
;
949 #define CGEN_OPCODE_ASM_HASH_TABLE_ENTRIES(od) ((od)->asm_hash_table_entries)
951 /* Disassembler instruction hash table. */
952 CGEN_INSN_LIST
** dis_hash_table
;
953 #define CGEN_OPCODE_DIS_HASH_TABLE(od) ((od)->dis_hash_table)
954 CGEN_INSN_LIST
* dis_hash_table_entries
;
955 #define CGEN_OPCODE_DIS_HASH_TABLE_ENTRIES(od) ((od)->dis_hash_table_entries)
959 /* Prototypes of major functions. */
960 /* FIXME: Move all CGEN_SYM-defined functions into CGEN_OPCODE_DESC. */
962 /* Open an opcode table for use. */
963 extern CGEN_OPCODE_DESC
CGEN_SYM (opcode_open
)
964 PARAMS ((int, enum cgen_endian
));
966 extern void CGEN_SYM (opcode_close
) PARAMS ((CGEN_OPCODE_DESC
));
968 /* `init_tables' must be called before `xxx_supported'. */
969 extern void CGEN_SYM (init_tables
) PARAMS ((int));
971 /* Initialize an opcode table for assembler or disassembler use.
972 These must be called immediately after opcode_open. */
973 extern void CGEN_SYM (init_asm
) PARAMS ((CGEN_OPCODE_DESC
));
974 extern void CGEN_SYM (init_dis
) PARAMS ((CGEN_OPCODE_DESC
));
976 /* Change the mach and/or endianness. */
977 extern void cgen_set_cpu
PARAMS ((CGEN_OPCODE_DESC
, int, enum cgen_endian
));
979 extern const CGEN_INSN
* CGEN_SYM (assemble_insn
)
980 PARAMS ((CGEN_OPCODE_DESC
, const char *, CGEN_FIELDS
*,
981 CGEN_INSN_BYTES_PTR
, char **));
983 extern const CGEN_KEYWORD
CGEN_SYM (operand_mach
);
984 extern int CGEN_SYM (get_mach
) PARAMS ((const char *));
986 extern const CGEN_INSN
* CGEN_SYM (lookup_insn
)
987 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
*,
988 CGEN_INSN_BYTES
, int, CGEN_FIELDS
*, int));
989 extern void CGEN_SYM (get_insn_operands
)
990 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
*,
991 const CGEN_FIELDS
*, int *));
992 extern const CGEN_INSN
* CGEN_SYM (lookup_get_insn_operands
)
993 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
*,
994 CGEN_INSN_BYTES
, int, int *));
996 /* Get/set fields in the CGEN_FIELDS struct. */
997 int CGEN_SYM (get_int_operand
)
998 PARAMS ((int, const CGEN_FIELDS
*));
999 void CGEN_SYM (set_int_operand
)
1000 PARAMS ((int, CGEN_FIELDS
*, int));
1001 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
1002 bfd_vma
CGEN_SYM (get_vma_operand
)
1003 PARAMS ((int, const CGEN_FIELDS
*));
1004 void CGEN_SYM (set_vma_operand
)
1005 PARAMS ((int, CGEN_FIELDS
*, bfd_vma
));
1008 extern const char * CGEN_SYM (parse_operand
)
1009 PARAMS ((CGEN_OPCODE_DESC
, int, const char **, CGEN_FIELDS
*));
1011 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
1012 extern const char * CGEN_SYM (insert_operand
)
1013 PARAMS ((CGEN_OPCODE_DESC
, int, CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
,
1015 extern int CGEN_SYM (extract_operand
)
1016 PARAMS ((CGEN_OPCODE_DESC
, int, CGEN_EXTRACT_INFO
*, CGEN_INSN_BYTES
,
1017 CGEN_FIELDS
*, bfd_vma
));
1020 /* Cover fns to bfd_get/set. */
1021 extern CGEN_INSN_INT cgen_get_insn_value
1022 PARAMS ((CGEN_OPCODE_DESC
, unsigned char *, int));
1023 extern void cgen_put_insn_value
1024 PARAMS ((CGEN_OPCODE_DESC
, unsigned char *, int, CGEN_INSN_INT
));
1026 /* Read in a cpu description file. */
1027 extern const char * cgen_read_cpu_file
1028 PARAMS ((CGEN_OPCODE_DESC
, const char * /*filename*/));