1 /* d30v.h -- Header file for D30V opcode table
2 Copyright 1997 Free Software Foundation, Inc.
3 Written by Martin Hunt (hunt@cygnus.com), Cygnus Solutions
5 This file is part of GDB, GAS, and the GNU binutils.
7 GDB, GAS, and the GNU binutils are free software; you can redistribute
8 them and/or modify them under the terms of the GNU General Public
9 License as published by the Free Software Foundation; either version
10 1, or (at your option) any later version.
12 GDB, GAS, and the GNU binutils are distributed in the hope that they
13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 the GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #define NOP 0x00F00000
26 /* Structure to hold information about predefined registers. */
29 char *name
; /* name to recognize */
30 char *pname
; /* name to print for this register */
34 extern const struct pd_reg pre_defined_registers
[];
37 /* the number of control registers */
38 #define MAX_CONTROL_REG 64
40 /* define the format specifiers */
42 #define FM01 0x80000000
43 #define FM10 0x8000000000000000LL
44 #define FM11 0x8000000080000000LL
46 /* define the opcode classes */
53 /* define the execution condition codes */
54 #define ECC_AL 0 /* ALways (default) */
55 #define ECC_TX 1 /* F0=True, F1=Don't care */
56 #define ECC_FX 2 /* F0=False, F1=Don't care */
57 #define ECC_XT 3 /* F0=Don't care, F1=True */
58 #define ECC_XF 4 /* F0=Don't care, F1=False */
59 #define ECC_TT 5 /* F0=True, F1=True */
60 #define ECC_TF 6 /* F0=True, F1=False */
61 #define ECC_RESERVED 7 /* reserved */
62 #define ECC_MAX ECC_RESERVED
64 extern const char *d30v_ecc_names
[];
66 /* condition code table for CMP and CMPU */
67 extern const char *d30v_cc_names
[];
69 /* The opcode table is an array of struct d30v_opcode. */
72 /* The opcode name. */
76 int op1
; /* first part, "IALU1" for example */
77 int op2
; /* the rest of the opcode */
79 /* opcode format(s). These numbers correspond to entries */
80 /* in the d30v_format_table */
81 unsigned char format
[4];
84 #define SHORT_M2 5 /* for ld2w and st2w */
93 #define SHORT_U 23 /* unary SHORT_A. ABS for example */
94 #define SHORT_F 25 /* SHORT_A with flag registers */
95 #define SHORT_AF 27 /* SHORT_A with only the first register a flag register */
96 #define SHORT_T 29 /* for trap instruction */
97 #define SHORT_A5 30 /* SHORT_A with a 5-bit immediate instead of 6 */
98 #define SHORT_CMP 32 /* special form for CMPcc */
99 #define SHORT_CMPU 34 /* special form for CMPUcc */
100 #define SHORT_A1 36 /* special form of SHORT_A for MACa opcodes where a=1 */
101 #define SHORT_AA 38 /* SHORT_A with the first register an accumulator */
102 #define SHORT_RA 40 /* SHORT_A with the second register an accumulator */
103 #define SHORT_MODINC 42
104 #define SHORT_MODDEC 43
110 #define SHORT_NONE 51 /* no operands */
112 #define LONG_U 53 /* unary LONG */
113 #define LONG_AF 54 /* LONG with the first register a flag register */
114 #define LONG_CMP 55 /* special form for CMPcc and CMPUcc */
115 #define LONG_M 56 /* Memory long for ldb, stb */
116 #define LONG_M2 57 /* Memory long for ld2w, st2w */
117 #define LONG_2 58 /* LONG with 2 operands; bratnz */
118 #define LONG_2b 59 /* LONG_2 with modifier of 3 */
119 #define LONG_D 60 /* for DBRAI*/
120 #define LONG_Db 61 /* for repeati*/
121 #define SHORT_AR 62 /* like SHORT_AA but only accept register as third parameter */
123 /* the execution unit(s) used */
128 #define EITHER_BUT_PREFER_MU 3
130 /* this field is used to decide if two instructions */
131 /* can be executed in parallel */
134 #define FLAG_0 (1L<<0)
135 #define FLAG_1 (1L<<1)
136 #define FLAG_2 (1L<<2)
137 #define FLAG_3 (1L<<3)
138 #define FLAG_4 (1L<<4) /* S (saturation) */
139 #define FLAG_5 (1L<<5) /* V (overflow) */
140 #define FLAG_6 (1L<<6) /* VA (accumulated overflow) */
141 #define FLAG_7 (1L<<7) /* C (carry/borrow) */
142 #define FLAG_SM (1L<<8) /* SM (stack mode) */
143 #define FLAG_RP (1L<<9) /* RP (repeat enable) */
144 #define FLAG_CONTROL (1L<<10) /* control registers */
145 #define FLAG_A0 (1L<<11) /* A0 */
146 #define FLAG_A1 (1L<<12) /* A1 */
147 #define FLAG_JMP (1L<<13) /* instruction is a branch */
148 #define FLAG_JSR (1L<<14) /* subroutine call. must be aligned */
149 #define FLAG_MEM (1L<<15) /* reads/writes memory */
150 #define FLAG_2WORD (1L<<16) /* 2 word/4 byte operation */
151 #define FLAG_MUL16 (1L<<17) /* 16 bit multiply */
152 #define FLAG_MUL32 (1L<<18) /* 32 bit multiply */
153 #define FLAG_ADDSUBppp (1L<<19) /* ADDppp or SUBppp */
154 #define FLAG_DELAY (1L<<20) /* This is a delayed branch or jump */
155 #define FLAG_LKR (1L<<21) /* insn in left slot kills right slot */
156 #define FLAG_CVVA (FLAG_5|FLAG_6|FLAG_7)
157 #define FLAG_C FLAG_7
158 #define FLAG_ALL (FLAG_0 | \
171 #define RELOC_PCREL 1
175 extern const struct d30v_opcode d30v_opcode_table
[];
176 extern const int d30v_num_opcodes
;
178 /* The operands table is an array of struct d30v_operand. */
181 /* the length of the field */
184 /* The number of significant bits in the operand. */
187 /* position relative to Ra */
193 extern const struct d30v_operand d30v_operand_table
[];
195 /* Values defined for the flags field of a struct d30v_operand. */
197 /* this is the destination register; it will be modified */
198 /* this is used by the optimizer */
199 #define OPERAND_DEST (1)
201 /* number or symbol */
202 #define OPERAND_NUM (2)
204 /* address or label */
205 #define OPERAND_ADDR (4)
208 #define OPERAND_REG (8)
210 /* postincrement + */
211 #define OPERAND_PLUS (0x10)
213 /* postdecrement - */
214 #define OPERAND_MINUS (0x20)
217 #define OPERAND_SIGNED (0x40)
219 /* this operand must be shifted left by 3 */
220 #define OPERAND_SHIFT (0x80)
223 #define OPERAND_FLAG (0x100)
225 /* control register */
226 #define OPERAND_CONTROL (0x200)
229 #define OPERAND_ACC (0x400)
232 #define OPERAND_ATSIGN (0x800)
235 #define OPERAND_ATPAR (0x1000)
237 /* predecrement mode '@-sp' */
238 #define OPERAND_ATMINUS (0x2000)
240 /* this operand changes the instruction name */
241 /* for example, CPMcc, CMPUcc */
242 #define OPERAND_NAME (0x4000)
244 /* fake operand for mvtsys and mvfsys */
245 #define OPERAND_SPECIAL (0x8000)
247 /* let the optimizer know that two registers are affected */
248 #define OPERAND_2REG (0x10000)
250 /* The format table is an array of struct d30v_format. */
253 int form
; /* SHORT_A, LONG, etc */
254 int modifier
; /* two bit modifier following opcode */
255 unsigned char operands
[5];
257 extern const struct d30v_format d30v_format_table
[];
260 /* an instruction is defined by an opcode and a format */
261 /* for example, "add" has one opcode, but three different */
262 /* formats, 2 SHORT_A forms and a LONG form. */
265 struct d30v_opcode
*op
; /* pointer to an entry in the opcode table */
266 struct d30v_format
*form
; /* pointer to an entry in the format table */
267 int ecc
; /* execution condition code */
270 /* an expressionS only has one register type, so we fake it */
271 /* by setting high bits to indicate type */
272 #define REGISTER_MASK 0xFF