1 /* Opcode table for the H8-300
2 Copyright (C) 1991,1992 Free Software Foundation.
3 Written by Steve Chamberlain, sac@cygnus.com.
5 This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
58 #define DISPREG 0x100000
59 #define IGNORE 0x200000
63 #define B30 0x1000000 /* bit 3 must be low */
64 #define B31 0x2000000 /* bit 3 must be high */
65 #define ABSJMP 0x10000000
66 #define ABSMOV 0x20000000
67 #define PCREL 0x40000000
68 #define MEMIND 0x80000000
71 #define SIZE (L_3|L_8|L_16|L_32|L_P|L_24)
72 #define MODE (REG|IMM|DISP|IND|INC|DEC|CCR|ABS)
74 #define RD8 (DST|L_8|REG)
75 #define RD16 (DST|L_16|REG)
76 #define RD32 (DST|L_32|REG)
77 #define RS8 (SRC|L_8|REG)
78 #define RS16 (SRC|L_16|REG)
80 #define RSP (SRC|L_P|REG)
81 #define RDP (DST|L_P|REG)
83 #define RS32 (SRC|L_32|REG)
84 #define IMM8 (IMM|SRC|L_8)
85 #define IMM16 (IMM|SRC|L_16)
86 #define IMM32 (IMM|SRC|L_32)
88 #define ABS8SRC (SRC|ABS|L_8)
89 #define ABS8DST (DST|ABS|L_8)
91 #define DISP8 (PCREL|L_8)
92 #define DISP16 (PCREL|L_16)
94 #define DISP8SRC (DISP|L_8|SRC)
95 #define DISP16SRC (DISP|L_16|SRC)
97 #define DISP8DST (DISP|L_8|DST)
98 #define DISP16DST (DISP|L_16|DST)
100 #define ABS16SRC (SRC|ABS|L_16)
101 #define ABS16DST (DST|ABS|L_16)
102 #define ABS24SRC (SRC|ABS|L_24)
103 #define ABS24DST (DST|ABS|L_24)
105 #define RDDEC (DST|DEC)
106 #define RSINC (SRC|INC)
108 #define RDIND (DST|IND)
109 #define RSIND (SRC|IND)
156 #define BITOP(code, imm, name, op00, op01,op10,op11, op20,op21)\
157 { code, 1, 2, name, {imm,RD8,E}, {op00, op01, imm, RD8, E, 0, 0, 0, 0}, 0, 0, 0, 0},\
158 { code, 1, 6, name, {imm,RDIND,E}, {op10, op11, B30|RDIND, 0, op00,op01, imm, 0, E}, 0, 0, 0, 0},\
159 { code, 1, 6, name, {imm,ABS8DST,E},{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}, 0, 0, 0, 0}
161 #define EBITOP(code, imm, name, op00, op01,op10,op11, op20,op21)\
162 BITOP(code,imm, name, op00+1, op01, op10,op11, op20,op21),\
163 BITOP(code,RS8, name, op00, op01, op10,op11, op20,op21)
165 #define WTWOP(code,name, op1, op2) \
166 { code, 1, 2, name, {RS16, RD16, E}, { op1, op2, RS16, RD16, E, 0, 0, 0, 0}, 0, 0, 0, 0}
168 #define BRANCH(code, name, op) \
169 { code, 1, 4,name,{DISP8,E,0}, { 0x4, op, DISP8, IGNORE, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \
170 { code, 0, 6,name,{DISP16,E,0}, { 0x5, 0x8, 0x0, 0x0, DISP16, IGNORE, IGNORE, IGNORE, E,0}, 0, 0, 0, 0}
172 #define SOP(code, x,name) \
175 #define NEW_SOP(code, in,x,name) \
179 #define TWOOP(code, name, op1, op2,op3) \
180 { code,1, 2,name, {IMM8, RD8, E}, { op1, RD8, IMM8, IGNORE, E, 0, 0, 0, 0}, 0, 0, 0, 0},\
181 { code, 1, 2,name, {RS8, RD8, E}, { op2, op3, RS8, RD8, E, 0, 0, 0, 0}, 0, 0, 0, 0}
183 #define UNOP(code,name, op1, op2) \
184 { code, 1, 2, name, {OR8, E, 0}, { op1, op2, 0, OR8, E, 0, 0, 0, 0}, 0, 0, 0, 0}
186 #define UNOP3(code,name, op1, op2, op3) \
187 { O(code,SB),1, 2,name , {OR8, E, 0}, {op1, op2, op3+0, OR8, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \
188 { O(code,SW),0, 2,name , {OR16, E, 0}, {op1, op2, op3+1, OR16, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \
189 { O(code,SL), 0, 2,name , {OR16, E, 0}, {op1, op2, op3+3, OR32, E, 0, 0, 0, 0}, 0, 0, 0, 0} \
191 #define IMM32LIST IMM32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
192 #define IMM24LIST IMM24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
193 #define IMM16LIST IMM16,IGNORE,IGNORE,IGNORE
194 #define A16LIST L_16,IGNORE,IGNORE,IGNORE
195 #define DISP24LIST DISP|L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
196 #define ABS24LIST ABS|L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
197 #define A24LIST L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
198 #define PREFIX32 0x0,0x1,0x0,0x0
199 #define PREFIXLDC 0x0,0x1,0x4,0x0
202 #define O(op, size) (op*4+size)
204 #define O_RECOMPILE 0
245 #define O_MOV_TO_MEM 41
283 #define O_MOV_TO_REG 79
291 struct h8_opcode h8_opcodes
[]
294 TWOOP(O(O_ADD
,SB
),"add.b", 0x8, 0x0,0x8),
297 NEW_SOP(O(O_ADD
,SW
),1,2,"add.w"),{RS16
,RD16
,E
},{0x0,0x9,RS16
,RD16
,E
} EOP
,
298 NEW_SOP(O(O_ADD
,SW
),0,4,"add.w"),{IMM16
,RD16
,E
},{0x7,0x9,0x1,RD16
,IMM16
,IGNORE
,IGNORE
,IGNORE
,E
} EOP
,
299 NEW_SOP(O(O_ADD
,SL
),0,2,"add.l"),{RS32
,RD32
,E
}, {0x0,0xA,B31
|RS32
,B30
|RD32
,E
} EOP
,
300 NEW_SOP(O(O_ADD
,SL
),0,6,"add.l"),{IMM32
,RD32
,E
},{0x7,0xA,0x1,B30
|RD32
,IMM32LIST
,E
} EOP
,
301 NEW_SOP(O(O_ADDS
,SL
),1,2,"adds"), {KBIT
,RDP
,E
}, {0x0,0xB,KBIT
,RDP
,E
,0,0,0,0},0,0,0,0 EOP
,
303 TWOOP(O(O_ADDX
,SB
),"addx",0x9,0x0,0xE),
304 TWOOP(O(O_AND
,SB
), "and.b",0xE,0x1,0x6),
306 NEW_SOP(O(O_AND
,SW
),0,2,"and.w"),{RS16
,RD16
,E
},{0x6,0x6,RS16
,RD16
,E
} EOP
,
307 NEW_SOP(O(O_AND
,SW
),0,4,"and.w"),{IMM16
,RD16
,E
},{0x7,0x9,0x6,RD16
,IMM16
,IGNORE
,IGNORE
,IGNORE
,E
} EOP
,
310 NEW_SOP(O(O_AND
,SL
),0,6,"and.l"),{IMM32
,RD32
,E
},{0x7,0xA,0x6,B30
|RD32
,IMM32LIST
,E
} EOP
,
311 NEW_SOP(O(O_AND
,SL
),0,2,"and.l") ,{RS32
,RD32
,E
},{0x0,0x1,0xF,0x0,0x6,0x6,B30
|RS32
,B30
|RD32
,E
} EOP
,
313 NEW_SOP(O(O_ANDC
,SB
),0,2,"andc"), {IMM8
,CCR
,E
},{ 0x0,0x6,IMM8
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
315 BITOP(O(O_BAND
,SB
), IMM3
,"band",0x7,0x6,0x7,0xC,0x7,0xE),
316 BRANCH(O(O_BRA
,SB
),"bra",0x0),
317 BRANCH(O(O_BRA
,SB
),"bt",0x0),
318 BRANCH(O(O_BRN
,SB
),"brn",0x1),
319 BRANCH(O(O_BRN
,SB
),"bf",0x1),
320 BRANCH(O(O_BHI
,SB
),"bhi",0x2),
321 BRANCH(O(O_BLS
,SB
),"bls",0x3),
322 BRANCH(O(O_BCC
,SB
),"bcc",0x4),
323 BRANCH(O(O_BCC
,SB
),"bhs",0x4),
324 BRANCH(O(O_BCS
,SB
),"bcs",0x5),
325 BRANCH(O(O_BCS
,SB
),"blo",0x5),
326 BRANCH(O(O_BNE
,SB
),"bne",0x6),
327 BRANCH(O(O_BEQ
,SB
),"beq",0x7),
328 BRANCH(O(O_BVC
,SB
),"bvc",0x8),
329 BRANCH(O(O_BVS
,SB
),"bvs",0x9),
330 BRANCH(O(O_BPL
,SB
),"bpl",0xA),
331 BRANCH(O(O_BMI
,SB
),"bmi",0xB),
332 BRANCH(O(O_BGE
,SB
),"bge",0xC),
333 BRANCH(O(O_BLT
,SB
),"blt",0xD),
334 BRANCH(O(O_BGT
,SB
),"bgt",0xE),
335 BRANCH(O(O_BLE
,SB
),"ble",0xF),
337 EBITOP(O(O_BCLR
,SB
),IMM3
,"bclr",0x6,0x2,0x7,0xD,0x7,0xF),
338 BITOP(O(O_BIAND
,SB
),IMM3
|B31
,"biand",0x7,0x6,0x7,0xC,0x7,0xE),
339 BITOP(O(O_BILD
,SB
), IMM3
|B31
,"bild",0x7,0x7,0x7,0xC,0x7,0xE),
340 BITOP(O(O_BIOR
,SB
), IMM3
|B31
,"bior",0x7,0x4,0x7,0xC,0x7,0xE),
341 BITOP(O(O_BIST
,SB
), IMM3
|B31
,"bist",0x6,0x7,0x7,0xD,0x7,0xF),
342 BITOP(O(O_BIXOR
,SB
),IMM3
|B31
,"bixor",0x7,0x5,0x7,0xC,0x7,0xE),
343 BITOP(O(O_BLD
,SB
), IMM3
|B30
,"bld",0x7,0x7,0x7,0xC,0x7,0xE),
344 EBITOP(O(O_BNOT
,SB
),IMM3
|B30
,"bnot",0x6,0x1,0x7,0xD,0x7,0xF),
345 BITOP(O(O_BOR
,SB
), IMM3
|B30
,"bor",0x7,0x4,0x7,0xC,0x7,0xE),
346 EBITOP(O(O_BSET
,SB
),IMM3
|B30
,"bset",0x6,0x0,0x7,0xD,0x7,0xF),
348 SOP(O(O_BSR
,SB
),6,"bsr"),{DISP8
,E
,0},{ 0x5,0x5,DISP8
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
349 SOP(O(O_BSR
,SB
),6,"bsr"),{DISP16
,E
,0},{ 0x5,0xC,0x0,0x0,DISP16
,IGNORE
,IGNORE
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
350 BITOP(O(O_BST
,SB
), IMM3
|B30
,"bst",0x6,0x7,0x7,0xD,0x7,0xF),
351 EBITOP(O(O_BTST
,SB
), IMM3
|B30
,"btst",0x6,0x3,0x7,0xC,0x7,0xE),
352 BITOP(O(O_BXOR
,SB
), IMM3
|B30
,"bxor",0x7,0x5,0x7,0xC,0x7,0xE),
353 TWOOP(O(O_CMP
,SB
), "cmp.b",0xA,0x1,0xC),
354 WTWOP(O(O_CMP
,SW
), "cmp.w",0x1,0xD),
356 NEW_SOP(O(O_CMP
,SW
),1,2,"cmp.w"),{RS16
,RD16
,E
},{0x1,0xD,RS16
,RD16
,E
} EOP
,
357 NEW_SOP(O(O_CMP
,SW
),0,4,"cmp.w"),{IMM16
,RD16
,E
},{0x7,0x9,0x2,RD16
,IMM16
,IGNORE
,IGNORE
,IGNORE
,E
} EOP
,
360 NEW_SOP(O(O_CMP
,SL
),0,6,"cmp.l"),{IMM32
,RD32
,E
},{0x7,0xA,0x2,B30
|RD32
,IMM32LIST
,E
} EOP
,
361 NEW_SOP(O(O_CMP
,SL
),0,2,"cmp.l") ,{RS32
,RD32
,E
},{0x1,0xF,B31
|RS32
,B30
|RD32
,E
} EOP
,
363 UNOP(O(O_DAA
,SB
), "daa",0x0,0xF),
364 UNOP(O(O_DAS
,SB
), "das",0x1,0xF),
365 UNOP(O(O_DEC
,SB
), "dec.b",0x1,0xA),
367 NEW_SOP(O(O_DEC
, SW
),0,2,"dec.w") ,{DBIT
,RD16
,E
},{0x1,0xB,0x5|DBIT
,RD16
,E
} EOP
,
368 NEW_SOP(O(O_DEC
, SL
),0,2,"dec.l") ,{DBIT
,RD32
,E
},{0x1,0xB,0x7|DBIT
,RD32
,E
} EOP
,
370 NEW_SOP(O(O_DIVU
,SB
),1,6,"divxu.b"),{RS8
,RD16
,E
},{ 0x5,0x1,RS8
,RD16
,E
,0,0,0,0},0,0,0,0 EOP
,
371 NEW_SOP(O(O_DIVU
,SW
),0,20,"divxu.w") ,{RS16
,RD32
,E
},{0x5,0x3,RS16
,RD32
,E
}EOP
,
373 NEW_SOP(O(O_DIVS
,SB
),0,20,"divxs.b") ,{RS8
,RD16
,E
},{0x0,0x1,0xD,0x0,0x5,0x1,RS8
,RD16
,E
} EOP
,
374 NEW_SOP(O(O_DIVS
,SW
),0,02,"divxs.w") ,{RS16
,RD32
,E
},{0x0,0x1,0xD,0x0,0x5,0x3,RS16
,RD32
,E
} EOP
,
376 NEW_SOP(O(O_EEPMOV
,SB
),1,50,"eepmov"),{ E
,0,0},{0x7,0xB,0x5,0xC,0x5,0x9,0x8,0xF,E
},0,0,0,0 EOP
,
377 NEW_SOP(O(O_EEPMOV
,SW
),0,50,"eepmovw"),{E
,0,0},{0x7,0xB,0xD,0x4,0x5,0x9,0x8,0xF,E
},0,0,0,0 EOP
,
379 NEW_SOP(O(O_EXTS
,SW
),0,2,"exts.w"),{RD16
,E
,0},{0x1,0x7,0xD,RD16
,E
},0,0,0,0 EOP
,
380 NEW_SOP(O(O_EXTS
,SL
),0,2,"exts.l"),{RD32
,E
,0},{0x1,0x7,0xF,B30
|RD32
,E
},0,0,0,0 EOP
,
382 NEW_SOP(O(O_EXTU
,SW
),0,2,"extu.w"),{RD16
,E
,0},{0x1,0x7,0x5,RD16
,E
},0,0,0,0 EOP
,
383 NEW_SOP(O(O_EXTU
,SL
),0,2,"extu.l"),{RD32
,E
,0},{0x1,0x7,0x7,B30
|RD32
,E
},0,0,0,0 EOP
,
385 UNOP(O(O_INC
,SB
), "inc",0x0,0xA),
387 NEW_SOP(O(O_INC
,SW
),0,2,"inc.w") ,{DBIT
,RD16
,E
},{0x0,0xB,0x5|DBIT
,RD16
,E
} EOP
,
388 NEW_SOP(O(O_INC
,SL
), 0,2,"inc.l") ,{DBIT
,RD32
,E
},{0x0,0xB,0x7|DBIT
,RD32
,E
} EOP
,
390 SOP(O(O_JMP
,SB
),4,"jmp"),{RSIND
,E
,0},{0x5,0x9,B30
|RSIND
,0x0,E
,0,0,0,0},0,0,0,0 EOP
,
391 SOP(O(O_JMP
,SB
),6,"jmp"),{SRC
|ABSJMP
,E
,0},{0x5,0xA,ABSJMP
,IGNORE
,IGNORE
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
392 SOP(O(O_JMP
,SB
),8,"jmp"),{SRC
|MEMIND
,E
,0},{0x5,0xB,MEMIND
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
394 SOP(O(O_JSR
,SB
),6,"jsr"),{SRC
|RSIND
,E
,0},{0x5,0xD,B30
|RSIND
,0x0,E
,0,0,0,0},0,0,0,0 EOP
,
395 SOP(O(O_JSR
,SB
),8,"jsr"),{SRC
|ABSJMP
,E
,0},{0x5,0xE,ABSJMP
,IGNORE
,IGNORE
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
396 SOP(O(O_JSR
,SB
),8,"jsr"),{SRC
|MEMIND
,E
,0},{0x5,0xF,MEMIND
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
399 NEW_SOP(O(O_LDC
,SB
),1,2,"ldc"),{IMM8
,CCR
,E
},{ 0x0,0x7,IMM8
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
400 NEW_SOP(O(O_LDC
,SB
),1,2,"ldc"),{OR8
,CCR
,E
},{ 0x0,0x3,0x0,OR8
,E
,0,0,0,0},0,0,0,0 EOP
,
401 NEW_SOP(O(O_LDC
,SB
),0,2,"ldc"),{ABS16SRC
,CCR
,E
}, {PREFIXLDC
,0x6,0xB,0x0,0x0,ABS16SRC
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
402 NEW_SOP(O(O_LDC
,SB
),0,2,"ldc"),{ABS24SRC
,CCR
,E
}, {PREFIXLDC
,0x6,0xB,0x2,0x0,0x0,0x0,SRC
|ABS24LIST
,E
},0,0,0,0 EOP
,
403 NEW_SOP(O(O_LDC
,SB
),0,2,"ldc"),{DISP
|SRC
|L_16
,CCR
,E
},{PREFIXLDC
,0x6,0x9,B30
|DISPREG
,0,DISP
|L_16
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
404 NEW_SOP(O(O_LDC
,SB
),0,2,"ldc"),{DISP
|SRC
|L_24
,CCR
,E
},{PREFIXLDC
,0x7,0x8,B30
|DISPREG
,0,0x6,0xB,0x2,0x0,0x0,0x0,SRC
|DISP24LIST
,E
},0,0,0,0 EOP
,
405 NEW_SOP(O(O_LDC
,SB
),0,2,"ldc"),{RSINC
,CCR
,E
}, {PREFIXLDC
,0x6,0xD,B30
|RSINC
,0x0,E
},0,0,0,0 EOP
,
406 NEW_SOP(O(O_LDC
,SB
),0,2,"ldc"),{RSIND
,CCR
,E
}, {PREFIXLDC
,0x6,0x9,B30
|RDIND
,0x0,E
} EOP
,
408 SOP(O(O_MOV_TO_REG
,SB
),6,"mov.b"),{DISP
|L_24
|SRC
,RD8
,E
}, { 0x7,0x8,B30
|DISPREG
,0x0,0x6,0xA,0x2,RD8
,0x0,0x0,SRC
|DISP24LIST
,E
},0,0,0,0 EOP
,
409 SOP(O(O_MOV_TO_MEM
,SB
),6,"mov.b"),{RS8
,DISP
|L_24
|DST
,E
}, { 0x7,0x8,B30
|DISPREG
,0x0,0x6,0xA,0xA,RS8
,0x0,0x0,DST
|DISP24LIST
,E
},0,0,0,0 EOP
,
411 SOP(O(O_MOV_TO_REG
,SB
),4,"mov.b"),{ABSMOV
|SRC
|L_16
,RD8
,E
},{ 0x6,0xA,0x0,RD8
,ABSMOV
|SRC
|A16LIST
,E
},0,0,0,0 EOP
,
412 SOP(O(O_MOV_TO_MEM
,SB
),4,"mov.b"),{RS8
,ABSMOV
|DST
,E
}, { 0x6,0xA,0x8,RS8
,ABSMOV
|DST
|A16LIST
,E
},0,0,0,0 EOP
,
414 SOP(O(O_MOV_TO_REG
,SB
),6,"mov.b"),{ABSMOV
|SRC
,RD8
,E
}, { 0x6,0xA,0x2,RD8
,0x0,0x0,SRC
|ABSMOV
|A24LIST
,E
},0,0,0 EOP
,
415 SOP(O(O_MOV_TO_MEM
,SB
),6,"mov.b"),{RS8
,ABSMOV
|DST
,E
}, { 0x6,0xA,0xA,RS8
,0x0,0x0,DST
|ABSMOV
|A24LIST
,E
},0,0,0 EOP
,
417 SOP(O(O_MOV_TO_REG
,SB
),2,"mov.b"),{RS8
,RD8
,E
}, { 0x0,0xC,RS8
,RD8
,E
,0,0,0,0},0,0,0,0 EOP
,
418 SOP(O(O_MOV_TO_REG
,SB
),2,"mov.b"),{IMM8
,RD8
,E
}, { 0xF,RD8
,IMM8
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
419 SOP(O(O_MOV_TO_REG
,SB
),4,"mov.b"),{RSIND
,RD8
,E
}, { 0x6,0x8,B30
|RSIND
,RD8
,E
,0,0,0,0},0,0,0,0 EOP
,
420 SOP(O(O_MOV_TO_REG
,SB
),6,"mov.b"),{DISP16SRC
,RD8
,E
}, { 0x6,0xE,B30
|DISPREG
,RD8
,DISP16SRC
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
421 SOP(O(O_MOV_TO_REG
,SB
),6,"mov.b"),{RSINC
,RD8
,E
}, { 0x6,0xC,B30
|RSINC
,RD8
,E
,0,0,0,0},0,0,0,0 EOP
,
423 SOP(O(O_MOV_TO_REG
,SB
),4,"mov.b"),{ABS8SRC
,RD8
,E
}, { 0x2,RD8
,ABS8SRC
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
424 SOP(O(O_MOV_TO_MEM
,SB
),4,"mov.b"),{RS8
,RDIND
,E
}, { 0x6,0x8,RDIND
|B31
,RS8
,E
,0,0,0,0},0,0,0,0 EOP
,
425 SOP(O(O_MOV_TO_MEM
,SB
),6,"mov.b"),{RS8
,DISP16DST
,E
}, { 0x6,0xE,DISPREG
|B31
,RS8
,DISP16DST
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
426 SOP(O(O_MOV_TO_MEM
,SB
),6,"mov.b"),{RS8
,RDDEC
|B31
,E
}, { 0x6,0xC,RDDEC
|B31
,RS8
,E
,0,0,0,0},0,0,0,0 EOP
,
428 SOP(O(O_MOV_TO_MEM
,SB
),4,"mov.b"),{RS8
,ABS8DST
,E
}, { 0x3,RS8
,ABS8DST
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
430 SOP(O(O_MOV_TO_MEM
,SW
),6,"mov.w"),{RS16
,RDIND
,E
},{ 0x6,0x9,RDIND
|B31
,RS16
,E
,0,0,0,0},0,0,0,0 EOP
,
431 SOP(O(O_MOV_TO_REG
,SW
),6,"mov.w"),{DISP
|L_24
|SRC
,RD16
,E
},{ 0x7,0x8,B30
|DISPREG
,0x0,0x6,0xB,0x2,RD16
,0x0,0x0,SRC
|DISP24LIST
,E
},0,0,0,0 EOP
,
432 SOP(O(O_MOV_TO_MEM
,SW
),6,"mov.w"),{RS16
,DISP
|L_24
|DST
,E
},{ 0x7,0x8,B30
|DISPREG
,0x0,0x6,0xB,0xA,RS16
,0x0,0x0,DST
|DISP24LIST
,E
},0,0,0,0 EOP
,
433 SOP(O(O_MOV_TO_REG
,SW
),6,"mov.w"),{ABS
|L_24
|SRC
,RD16
,E
},{ 0x6,0xB,0x2,RD16
,0x0,0x0,SRC
|ABS24LIST
,E
},0,0,0 EOP
,
434 SOP(O(O_MOV_TO_MEM
,SW
),6,"mov.w"),{RS16
,ABS
|L_24
|DST
,E
},{ 0x6,0xB,0xA,RS16
,0x0,0x0,DST
|ABS24LIST
,E
},0,0,0 EOP
,
435 SOP(O(O_MOV_TO_REG
,SW
),2,"mov.w"),{RS16
,RD16
,E
},{ 0x0,0xD,RS16
, RD16
,E
,0,0,0,0},0,0,0,0 EOP
,
436 SOP(O(O_MOV_TO_REG
,SW
),4,"mov.w"),{IMM16
,RD16
,E
},{ 0x7,0x9,0x0,RD16
,IMM16
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
437 SOP(O(O_MOV_TO_REG
,SW
),4,"mov.w"),{RSIND
,RD16
,E
},{ 0x6,0x9,B30
|RSIND
,RD16
,E
,0,0,0,0},0,0,0,0 EOP
,
438 SOP(O(O_MOV_TO_REG
,SW
),6,"mov.w"),{DISP16SRC
,RD16
,E
},{ 0x6,0xF,B30
|DISPREG
,RD16
,DISP16SRC
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
439 SOP(O(O_MOV_TO_REG
,SW
),6,"mov.w"),{RSINC
,RD16
,E
},{ 0x6,0xD,B30
|RSINC
,RD16
,E
,0,0,0,0},0,0,0,0 EOP
,
440 SOP(O(O_MOV_TO_REG
,SW
),6,"mov.w"),{ABS16SRC
,RD16
,E
},{ 0x6,0xB,0x0,RD16
,ABS16SRC
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
442 SOP(O(O_MOV_TO_MEM
,SW
),6,"mov.w"),{RS16
,DISP16DST
,E
},{ 0x6,0xF,DISPREG
|B31
,RS16
,DISP16DST
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
443 SOP(O(O_MOV_TO_MEM
,SW
),6,"mov.w"),{RS16
,RDDEC
,E
},{ 0x6,0xD,RDDEC
|B31
,RS16
,E
,0,0,0,0},0,0,0,0 EOP
,
444 SOP(O(O_MOV_TO_MEM
,SW
),6,"mov.w"),{RS16
,ABS16DST
,E
},{ 0x6,0xB,0x8,RS16
,ABS16DST
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
446 SOP(O(O_MOV_TO_REG
,SL
),4,"mov.l"),{IMM32
,RD32
,E
},{ 0x7,0xA,0x0,RD32
,IMM32LIST
,E
},0,0,0,0 EOP
,
447 SOP(O(O_MOV_TO_REG
,SL
),2,"mov.l"),{RS32
,RD32
,E
},{ 0x0,0xF,B31
|RS32
,RD32
,E
,0,0,0,0},0,0,0,0 EOP
,
449 SOP(O(O_MOV_TO_REG
,SL
),4,"mov.l"),{RSIND
,RD32
,E
}, { PREFIX32
,0x6,0x9,RSIND
|B30
,RD32
,E
,0,0,0,0},0,0,0,0 EOP
,
450 SOP(O(O_MOV_TO_REG
,SL
),6,"mov.l"),{DISP16SRC
,RD32
,E
}, { PREFIX32
,0x6,0xF,DISPREG
|B30
,RD32
,DISP16SRC
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
451 SOP(O(O_MOV_TO_REG
,SL
),6,"mov.l"),{DISP
|L_24
|SRC
,RD32
,E
},{ PREFIX32
,0x7,0x8,B30
|DISPREG
,0x0,0x6,0xB,0x2,RD32
,0x0,0x0,SRC
|DISP24LIST
,E
},0,0,0,0 EOP
,
452 SOP(O(O_MOV_TO_REG
,SL
),6,"mov.l"),{RSINC
,RD32
,E
}, { PREFIX32
,0x6,0xD,RSINC
,RD32
,E
,0,0,0,0},0,0,0,0 EOP
,
453 SOP(O(O_MOV_TO_REG
,SL
),6,"mov.l"),{ABS16SRC
,RD32
,E
}, { PREFIX32
,0x6,0xB,0x0,RD32
,ABS16SRC
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
454 SOP(O(O_MOV_TO_REG
,SL
),6,"mov.l"),{ABS24SRC
,RD32
,E
}, { PREFIX32
,0x6,0xB,0x2,RD32
,0x0,0x0,SRC
|ABS24LIST
,E
},0,0,0 EOP
,
455 SOP(O(O_MOV_TO_MEM
,SL
),6,"mov.l"),{RS32
,RDIND
,E
}, { PREFIX32
,0x6,0x9,RDIND
|B31
,RS32
,E
,0,0,0,0},0,0,0,0 EOP
,
456 SOP(O(O_MOV_TO_MEM
,SL
),6,"mov.l"),{RS32
,DISP16DST
,E
}, { PREFIX32
,0x6,0xF,DISPREG
|B31
,RS32
,DISP16DST
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
457 SOP(O(O_MOV_TO_MEM
,SL
),6,"mov.l"),{RS32
,DISP
|L_24
|DST
,E
},{ PREFIX32
,0x7,0x8,B31
|DISPREG
,0x0,0x6,0xB,0xA,RS32
,0x0,0x0,DST
|DISP24LIST
,E
},0,0,0,0 EOP
,
458 SOP(O(O_MOV_TO_MEM
,SL
),6,"mov.l"),{RS32
,RDDEC
,E
}, { PREFIX32
,0x6,0xD,RDDEC
|B31
,RS32
,E
,0,0,0,0},0,0,0,0 EOP
,
459 SOP(O(O_MOV_TO_MEM
,SL
),6,"mov.l"),{RS32
,ABS16DST
,E
}, { PREFIX32
,0x6,0xB,0x8,RS32
,ABS16DST
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
460 SOP(O(O_MOV_TO_MEM
,SL
),6,"mov.l"),{RS32
,ABS24DST
,E
}, { PREFIX32
,0x6,0xB,0xA,RS32
,0x0,0x0,DST
|ABS24LIST
,E
},0,0,0 EOP
,
462 SOP(O(O_MOV_TO_REG
,SB
),10,"movfpe"),{ABS16SRC
,RD8
,E
},{ 0x6,0xA,0x4,RD8
,ABS16SRC
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
463 SOP(O(O_MOV_TO_MEM
,SB
),10,"movtpe"),{RS8
,ABS16DST
,E
},{ 0x6,0xA,0xC,RS8
,ABS16DST
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
465 NEW_SOP(O(O_MULU
,SB
),1,14,"mulxu.b"),{RS8
,RD16
,E
},{ 0x5,0x0,RS8
,RD16
,E
,0,0,0,0},0,0,0,0 EOP
,
466 NEW_SOP(O(O_MULU
,SW
),0,14,"mulxu.w"),{RS16
,RD32
,E
},{ 0x5,0x2,RS16
,B30
|RD32
,E
,0,0,0,0},0,0,0,0 EOP
,
468 NEW_SOP(O(O_MULS
,SB
),0,20,"mulxs.b"),{RS8
,RD16
,E
},{ 0x0,0x1,0xc,0x0,0x5,0x0,RS8
,RD16
,E
},0,0,0,0 EOP
,
469 NEW_SOP(O(O_MULS
,SW
),0,20,"mulxs.w"),{RS16
,RD32
,E
},{ 0x0,0x1,0xc,0x0,0x5,0x2,RS16
,RD32
,E
},0,0,0,0 EOP
,
471 NEW_SOP(O(O_NEG
,SB
),1,2,"neg.b"),{ OR8
,E
, 0},{ 0x1,0x7,0x8,OR8
,E
,0,0,0,0},0,0,0,0 EOP
,
472 NEW_SOP(O(O_NEG
,SW
),0,2,"neg.w"),{ OR16
,E
,0},{ 0x1,0x7,0x9,OR16
,E
},0,0,0,0 EOP
,
473 NEW_SOP(O(O_NEG
,SL
),0,2,"neg.l"),{ OR32
,E
,0},{ 0x1,0x7,0xB,B30
|OR32
,E
},0,0,0,0 EOP
,
475 NEW_SOP(O(O_NOP
,SB
),1,2,"nop"),{E
,0,0},{ 0x0,0x0,0x0,0x0,E
,0,0,0,0},0,0,0,0 EOP
,
477 NEW_SOP(O(O_NOT
,SB
),1,2,"not.b"),{ OR8
,E
, 0},{ 0x1,0x7,0x0,OR8
,E
,0,0,0,0},0,0,0,0 EOP
,
478 NEW_SOP(O(O_NOT
,SW
),0,2,"not.w"),{ OR16
,E
,0},{ 0x1,0x7,0x1,OR16
,E
},0,0,0,0 EOP
,
479 NEW_SOP(O(O_NOT
,SL
),0,2,"not.l"),{ OR32
,E
,0},{ 0x1,0x7,0x3,B30
|OR32
,E
},0,0,0,0 EOP
,
481 TWOOP(O(O_OR
, SB
),"or.b",0xC,0x1,0x4),
482 NEW_SOP(O(O_OR
,SW
),0,4,"or.w"),{IMM16
,RD16
,E
},{0x7,0x9,0x4,RD16
,IMM16
,IGNORE
,IGNORE
,IGNORE
,E
} EOP
,
483 NEW_SOP(O(O_OR
,SW
),0,2,"or.w"),{RS16
,RD16
,E
},{0x6,0x4,RS16
,RD16
,E
} EOP
,
485 NEW_SOP(O(O_OR
,SL
),0,6,"or.l"),{IMM32
,RD32
,E
},{0x7,0xA,0x4,B30
|RD32
,IMM32LIST
,E
} EOP
,
486 NEW_SOP(O(O_OR
,SL
),0,2,"or.l") ,{RS32
,RD32
,E
},{0x0,0x1,0xF,0x0,0x6,0x4,B30
|RS32
,B30
|RD32
,E
} EOP
,
488 NEW_SOP(O(O_ORC
,SB
),1,2,"orc"),{IMM8
,CCR
,E
},{ 0x0,0x4,IMM8
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
490 NEW_SOP(O(O_MOV_TO_REG
,SW
),1,6,"pop.w"),{OR16
,E
,0},{ 0x6,0xD,0x7,OR16
,E
,0,0,0,0},0,0,0,0 EOP
,
491 NEW_SOP(O(O_MOV_TO_REG
,SL
),0,6,"pop.l"),{OR32
,E
,0},{ PREFIX32
,0x6,0xD,0x7,OR32
,E
,0,0,0,0},0,0,0,0 EOP
,
492 NEW_SOP(O(O_MOV_TO_MEM
,SW
),1,6,"push.w"),{OR16
,E
,0},{ 0x6,0xD,0xF,OR16
,E
,0,0,0,0},0,0,0,0 EOP
,
493 NEW_SOP(O(O_MOV_TO_MEM
,SL
),0,6,"push.l"),{OR32
,E
,0},{ PREFIX32
,0x6,0xD,0xF,OR32
,E
,0,0,0,0},0,0,0,0 EOP
,
495 UNOP3(O_ROTL
, "rotl",0x1,0x2,0x8),
496 UNOP3(O_ROTR
, "rotr",0x1,0x3,0x8),
497 UNOP3(O_ROTXL
, "rotxl",0x1,0x2,0x0),
498 UNOP3(O_ROTXR
, "rotxr",0x1,0x3,0x0),
500 SOP(O(O_BPT
,SB
), 10,"bpt"),{E
,0,0},{ 0x7,0xA,0xF,0xF,E
,0,0,0,0},0,0,0,0 EOP
,
501 SOP(O(O_RTE
,SB
), 10,"rte"),{E
,0,0},{ 0x5,0x6,0x7,0x0,E
,0,0,0,0},0,0,0,0 EOP
,
502 SOP(O(O_RTS
,SB
), 8,"rts"),{E
,0,0},{ 0x5,0x4,0x7,0x0,E
,0,0,0,0},0,0,0,0 EOP
,
504 UNOP3(O_SHAL
, "shal",0x1,0x0,0x8),
505 UNOP3(O_SHAR
, "shar",0x1,0x1,0x8),
506 UNOP3(O_SHLL
, "shll",0x1,0x0,0x0),
507 UNOP3(O_SHLR
, "shlr",0x1,0x1,0x0),
509 SOP(O(O_SLEEP
,SB
),2,"sleep"),{E
,0,0},{ 0x0,0x1,0x8,0x0,E
,0,0,0,0} EOP
,
511 NEW_SOP(O(O_STC
,SB
), 1,2,"stc"),{CCR
,RD8
,E
},{ 0x0,0x2,0x0,RD8
,E
,0,0,0,0} EOP
,
513 NEW_SOP(O(O_STC
,SB
),0,2,"stc"),{CCR
,RSIND
,E
}, {PREFIXLDC
,0x6,0x9,B31
|RDIND
,0x0,E
} EOP
,
514 NEW_SOP(O(O_STC
,SB
),0,2,"stc"),{CCR
,DISP
|DST
|L_16
,E
},{PREFIXLDC
,0x6,0x9,B31
|DISPREG
,0,DST
|DISP
|L_16
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
515 NEW_SOP(O(O_STC
,SB
),0,2,"stc"),{CCR
,DISP
|DST
|L_24
,E
},{PREFIXLDC
,0x7,0x8,B31
|DISPREG
,0,0x6,0xB,0x2,0x0,0x0,0x0,DST
|DISP24LIST
,E
},0,0,0,0 EOP
,
516 NEW_SOP(O(O_STC
,SB
),0,2,"stc"),{CCR
,RDDEC
,E
}, {PREFIXLDC
,0x6,0xD,B31
|RDDEC
,0x0,E
},0,0,0,0 EOP
,
518 NEW_SOP(O(O_STC
,SB
),0,2,"stc"),{CCR
,ABS16SRC
,E
}, {PREFIXLDC
,0x6,0xB,0x8,0x0,ABS16DST
,IGNORE
,IGNORE
,IGNORE
,E
},0,0,0,0 EOP
,
519 NEW_SOP(O(O_STC
,SB
),0,2,"stc"),{CCR
,ABS24SRC
,E
}, {PREFIXLDC
,0x6,0xB,0xA,0x0,0x0,0x0,DST
|ABS24LIST
,E
},0,0,0,0 EOP
,
522 SOP(O(O_SUB
,SB
),2,"sub.b"),{RS8
,RD8
,E
},{ 0x1,0x8,RS8
,RD8
,E
,0,0,0,0},0,0,0,0 EOP
,
524 NEW_SOP(O(O_SUB
,SW
),1,2,"sub.w"),{RS16
,RD16
,E
}, {0x1,0x9,RS16
,RD16
,E
} EOP
,
525 NEW_SOP(O(O_SUB
,SW
),0,4,"sub.w"),{IMM16
,RD16
,E
}, {0x7,0x9,0x3,RD16
,IMM16
,IGNORE
,IGNORE
,IGNORE
,E
} EOP
,
526 NEW_SOP(O(O_SUB
,SL
),0,2,"sub.l") ,{RS32
,RD32
,E
}, {0x1,0xA,B31
|RS32
,B30
|RD32
,E
} EOP
,
527 NEW_SOP(O(O_SUB
,SL
),0,6,"sub.l"), {IMM32
,RD32
,E
},{0x7,0xA,0x3,B30
|RD32
,IMM32LIST
,E
} EOP
,
529 SOP(O(O_SUBS
,SL
),2,"subs"),{KBIT
,RDP
,E
},{ 0x1,0xB,KBIT
,RDP
,E
,0,0,0,0},0,0,0,0 EOP
,
530 TWOOP(O(O_SUBX
,SB
),"subx",0xB,0x1,0xE),
532 NEW_SOP(O(O_TRAPA
,SB
),0,2,"trapa"),{ IMM8
,E
}, {0x5,0x7,IMM8
,IGNORE
,E
},0,0,0,0 EOP
,
534 TWOOP(O(O_XOR
, SB
),"xor",0xD,0x1,0x5),
536 NEW_SOP(O(O_XOR
,SW
),0,4,"xor.w"),{IMM16
,RD16
,E
},{0x7,0x9,0x5,RD16
,IMM16
,IGNORE
,IGNORE
,IGNORE
,E
} EOP
,
537 NEW_SOP(O(O_XOR
,SW
),0,2,"xor.w"),{RS16
,RD16
,E
},{0x6,0x5,RS16
,RD16
,E
} EOP
,
539 NEW_SOP(O(O_XOR
,SL
),0,6,"xor.l"),{IMM32
,RD32
,E
},{0x7,0xA,0x4,B30
|RD32
,IMM32LIST
,E
} EOP
,
540 NEW_SOP(O(O_XOR
,SL
),0,2,"xor.l") ,{RS32
,RD32
,E
},{0x0,0x1,0xF,0x0,0x6,0x5,B30
|RS32
,B30
|RD32
,E
} EOP
,
542 SOP(O(O_XORC
,SB
),2,"xorc"),{IMM8
,CCR
,E
},{ 0x0,0x5,IMM8
,IGNORE
,E
,0,0,0,0},0,0,0,0 EOP
,
546 extern struct h8_opcode h8_opcodes
[] ;
This page took 0.056329 seconds and 4 git commands to generate.