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* ld-scripts/script.t: Put .pr in .text, and .rw in .data, for
[deliverable/binutils-gdb.git] / include / opcode / rs6k.h
1 /* IBM RS/6000 instruction set definitions, for GNU software. */
2
3 /* These are all possible instruction formats as used in IBM Assembler
4 Language Reference, Appendix A. */
5
6 typedef enum { A=0, B, D, I, M, SC, X, XL, XO, XFL, XFX } InsnFmt;
7
8 /* Extended opcode masks. Used for extracting extended opcode values from
9 instructions. Each instruction's format decides which mask applies.
10 They *should* retain the same order as the above formats. */
11
12 static int eopMask[] =
13 { 0x1f, 0, 0, 0, 0, 0, 0x3ff, 0x3ff, 0x1ff, 0x3ff, 0x3ff };
14
15 /* All the things you need to know about an opcode. */
16
17 typedef struct rs6000_insn {
18 char *operator; /* opcode name */
19 char *opr_ext; /* opcode name extension */
20 InsnFmt format; /* opcode format */
21 char p_opcode; /* primary opcode */
22 int e_opcode; /* extended opcode */
23 char oprnd_format[6]; /* operand format */
24 } OPCODE;
25
26 /* operand format specifiers */
27
28 #define TO 1
29 #define RA 2
30 #define SI 3
31 #define RT 4
32 #define UI 5
33 #define BF 6
34 #define BFA 7
35 #define BT 8
36 #define BA 9
37 #define BB 10
38 #define BO 11
39 #define BI 12
40 #define RB 13
41 #define RS 14
42 #define SH 15
43 #define MB 16
44 #define ME 17
45 #define SPR 18
46 #define DIS 19
47 #define FXM 21
48 #define FRT 22
49 #define NB 23
50 #define FRS 24
51 #define FRA 25
52 #define FRB 26
53 #define FRC 27
54 #define FLM 28
55 #define I 29
56 #define LI 30
57 #define A2 31
58 #define TA14 32 /* 14 bit representation of target address */
59 #define TA24 33 /* 24 bit representation of target address */
60 #define FL1 34
61 #define FL2 35
62 #define LEV 36
63
64 /* RS/6000 INSTRUCTION SET
65 (sorted on primary and extended opcode)
66
67 oprtr primary ext.
68 operator ext format opcode opcode operand format
69 ------- ------- ------ ------- ------ --------------- */
70
71 struct rs6000_insn rs6k_ops [] = {
72
73 {"ti", 0, D, 3, -1, {TO,RA,SI,0} },
74 {"muli", 0, D, 7, -1, {RT,RA,SI,0} },
75 {"sfi", 0, D, 8, -1, {RT,RA,SI,0} },
76 {"dozi", 0, D, 9, -1, {RT,RA,SI,0} },
77 {"cmpli", 0, D, 10, -1, {BF,RA,UI,0} },
78 {"cmpi", 0, D, 11, -1, {BF,RA,SI,0} },
79 {"ai", 0, D, 12, -1, {RT,RA,SI,0} },
80 {"ai.", 0, D, 13, -1, {RT,RA,SI,0} },
81 {"lil", 0, D, 14, -1, {RT,SI,0} }, /* same as `cal' */
82 {"cal", 0, D, 14, -1, {RT,DIS,RA,0} },
83 {"liu", 0, D, 15, -1, {RT, UI,0} }, /* same as `cau' */
84 {"cau", 0, D, 15, -1, {RT,RA,UI,0} },
85
86 /* "1" indicates an exception--"bb" is only usable for some values of
87 BO, so the disassembler first matches this instruction and then changes
88 it to "bc" if that is the case. */
89 {"bb", "1tfla", B, 16, -1, {LI,A2,0} },
90 {"bc", "la", B, 16, -1, {BO,BI,TA14,0} },
91
92 {"svc", "la", SC, 17, -1, {LEV,FL1,FL2,0} },
93 {"b", "la", I, 18, -1, {TA24,0} },
94 {"mcrf", 0, XL, 19, 0, {BF,BFA,0} },
95 {"bcr", "l", XL, 19, 16, {BO,BI,0} },
96 {"crnor", 0, XL, 19, 33, {BT,BA,BB,0} },
97 {"rfi", 0, X, 19, 50, {0} },
98 {"rfsvc", 0, X, 19, 82, {0} },
99 {"crandc", 0, XL, 19, 129, {BT,BA,BB,0} },
100 {"ics", 0, X, 19, 150, {0} },
101 {"crxor", 0, XL, 19, 193, {BT,BA,BB,0} },
102 {"crnand", 0, XL, 19, 225, {BT,BA,BB,0} },
103 {"crand", 0, XL, 19, 257, {BT,BA,BB,0} },
104 {"creqv", 0, XL, 19, 289, {BT,BA,BB,0} },
105 {"crorc", 0, XL, 19, 417, {BT,BA,BB,0} },
106 {"cror", 0, XL, 19, 449, {BT,BA,BB,0} },
107 {"bcc", "l", XL, 19, 528, {BO,BI,0} },
108 {"rlimi", ".", M, 20, -1, {RA,RS,SH,MB,ME,0} /*??*/},
109 {"rlinm", ".", M, 21, -1, {RA,RS,SH,MB,ME,0} /*??*/},
110 {"rlmi", ".", M, 22, -1, {RA,RS,RB,MB,ME,0} /*??*/},
111 {"rlnm", ".", M, 23, -1, {RA,RS,RB,MB,ME,0} /*??*/},
112 {"oril", 0, D, 24, -1, {RA,RS,UI,0} },
113 {"oriu", 0, D, 25, -1, {RA,RS,UI,0} },
114 {"xoril", 0, D, 26, -1, {RA,RS,UI,0} },
115 {"xoriu", 0, D, 27, -1, {RA,RS,UI,0} },
116 {"andil.", 0, D, 28, -1, {RA,RS,UI,0} },
117 {"andiu.", 0, D, 29, -1, {RA,RS,UI,0} },
118 {"cmp", 0, X, 31, 0, {BF,RA,RB,0} },
119 {"t", 0, X, 31, 4, {TO,RA,RB,0} },
120 {"sf", "o.", XO, 31, 8, {RT,RA,RB,0} },
121 {"a", "o.", XO, 31, 10, {RT,RA,RB,0} },
122 {"mfcr", 0, X, 31, 19, {RT,0} },
123 {"lx", 0, X, 31, 23, {RT,RA,RB,0} },
124 {"sl", ".", X, 31, 24, {RA,RS,RB,0} },
125 {"cntlz", ".", XO, 31, 26, {RA,RS,0} },
126 {"and", ".", X, 31, 28, {RA,RS,RB,0} },
127 {"maskg", ".", X, 31, 29, {RA,RS,RB,0} },
128 {"cmpl", 0, X, 31, 32, {BF,RA,RB,0} },
129 {"sfe", "o.", XO, 31, 136, {RT,RA,RB,0} },
130 {"lux", 0, X, 31, 55, {RT,RA,RB,0} },
131 {"andc", ".", X, 31, 60, {RA,RS,RB,0} },
132 {"mfmsr", 0, X, 31, 83, {RT,0} },
133 {"lbzx", 0, X, 31, 87, {RT,RA,RB,0} },
134 {"neg", "o.", XO, 31, 104, {RT,RA,0} },
135 {"mul", "o.", XO, 31, 107, {RT,RA,RB,0} },
136 {"lbzux", 0, X, 31, 119, {RT,RA,RB,0} },
137 {"nor", ".", X, 31, 124, {RA,RS,RB,0} },
138 {"ae", "o.", XO, 31, 138, {RT,RA,RB,0} },
139 {"mtcrf", 0, XFX, 31, 144, {FXM,RS,0} },
140 {"stx", 0, X, 31, 151, {RS,RA,RB,0} },
141 {"slq", ".", X, 31, 152, {RA,RS,RB,0} },
142 {"sle", ".", X, 31, 153, {RA,RS,RB,0} },
143 {"stux", 0, X, 31, 183, {RS,RA,RB,0} },
144 {"sliq", ".", X, 31, 184, {RA,RS,SH,0} },
145 {"sfze", "o.", XO, 31, 200, {RT,RA,0} },
146 {"aze", "o.", XO, 31, 202, {RT,RA,0} },
147 {"stbx", 0, X, 31, 215, {RS,RA,RB,0} },
148 {"sllq", ".", X, 31, 216, {RA,RS,RB,0} },
149 {"sleq", ".", X, 31, 217, {RA,RS,RB,0} },
150 {"sfme", "o.", XO, 31, 232, {RT,RA,0} },
151 {"ame", "o.", XO, 31, 234, {RT,RA,0} },
152 {"muls", "o.", XO, 31, 235, {RT,RA,RB,0} },
153 {"stbux", 0, X, 31, 247, {RS,RA,RB,0} },
154 {"slliq", ".", X, 31, 248, {RA,RS,SH,0} },
155 {"doz", "o.", X, 31, 264, {RT,RA,RB,0} },
156 {"cax", "o.", XO, 31, 266, {RT,RA,RB,0} },
157 {"lscbx", ".", X, 31, 277, {RT,RA,RB,0} },
158 {"lhzx", 0, X, 31, 279, {RT,RA,RB,0} },
159 {"eqv", ".", X, 31, 284, {RA,RS,RB,0} },
160 {"lhzux", 0, X, 31, 311, {RT,RA,RB,0} },
161 {"xor", ".", X, 31, 316, {RA,RS,RB,0} },
162 {"div", "o.", XO, 31, 331, {RT,RA,RB,0} },
163 {"mfspr", 0, X, 31, 339, {RT,SPR,0} },
164 {"lhax", 0, X, 31, 343, {RT,RA,RB,0} },
165 {"abs", "o.", XO, 31, 360, {RT,RA,0} },
166 {"divs", "o.", XO, 31, 363, {RT,RA,RB,0} },
167 {"lhaux", 0, X, 31, 375, {RT,RA,RB,0} },
168 {"sthx", 0, X, 31, 407, {RS,RA,RB,0} },
169 {"orc", ".", X, 31, 412, {RA,RS,RB,0} },
170 {"sthux", 0, X, 31, 439, {RS,RA,RB,0} },
171 {"or", ".", X, 31, 444, {RA,RS,RB,0} },
172 {"mtspr", 0, X, 31, 467, {SPR,RS,0} },
173 {"nand", ".", X, 31, 476, {RA,RS,RB,0} },
174 {"nabs", "o.", XO, 31, 488, {RT,RA,0} },
175 {"mcrxr", 0, X, 31, 512, {BF,0} },
176 {"lsx", 0, X, 31, 533, {RT,RA,RB,0} },
177 {"lbrx", 0, X, 31, 534, {RT,RA,RB,0} },
178 {"lfsx", 0, X, 31, 535, {FRT,RA,RB,0} },
179 {"sr", ".", X, 31, 536, {RA,RS,RB,0} },
180 {"rrib", ".", X, 31, 537, {RA,RS,RB,0} },
181 {"maskir", ".", X, 31, 541, {RA,RS,RB,0} },
182 {"lfsux", 0, X, 31, 567, {FRT,RA,RB,0} },
183 {"lsi", 0, X, 31, 597, {RT,RA,NB,0} },
184 {"lfdx", 0, X, 31, 599, {FRT,RA,RB,0} },
185 {"lfdux", 0, X, 31, 631, {FRT,RA,RB,0} },
186 {"stsx", 0, X, 31, 661, {RS,RA,RB,0} },
187 {"stbrx", 0, X, 31, 662, {RS,RA,RB,0} },
188 {"stfsx", 0, X, 31, 663, {FRS,RA,RB,0} },
189 {"srq", ".", X, 31, 664, {RA,RS,RB,0} },
190 {"sre", ".", X, 31, 665, {RA,RS,RB,0} },
191 {"stfsux", 0, X, 31, 695, {FRS,RA,RB,0} },
192 {"sriq", ".", X, 31, 696, {RA,RS,SH,0} },
193 {"stsi", 0, X, 31, 725, {RS,RA,NB,0} },
194 {"stfdx", 0, X, 31, 727, {FRS,RA,RB,0} },
195 {"srlq", ".", X, 31, 728, {RA,RS,RB,0} },
196 {"sreq", ".", X, 31, 729, {RA,RS,RB,0} },
197 {"stfdux", 0, X, 31, 759, {FRS,RA,RB,0} },
198 {"srliq", ".", X, 31, 760, {RA,RS,SH,0} },
199 {"lhbrx", 0, X, 31, 790, {RT,RA,RB,0} },
200 {"sra", ".", X, 31, 792, {RA,RS,RB,0} },
201 {"srai", ".", X, 31, 824, {RA,RS,SH,0} },
202 {"sthbrx", 0, X, 31, 918, {RS,RA,RB,0} },
203 {"sraq", ".", X, 31, 920, {RA,RS,RB,0} },
204 {"srea", ".", X, 31, 921, {RA,RS,RB,0} },
205 {"exts", ".", X, 31, 922, {RA,RS,0} },
206 {"sraiq", ".", X, 31, 952, {RA,RS,SH,0} },
207 {"l", 0, D, 32, -1, {RT,DIS,RA,0} },
208 {"lu", 0, D, 33, -1, {RT,DIS,RA,0} },
209 {"lbz", 0, D, 34, -1, {RT,DIS,RA,0} },
210 {"lbzu", 0, D, 35, -1, {RT,DIS,RA,0} },
211 {"st", 0, D, 36, -1, {RS,DIS,RA,0} },
212 {"stu", 0, D, 37, -1, {RS,DIS,RA,0} },
213 {"stb", 0, D, 38, -1, {RS,DIS,RA,0} },
214 {"stbu", 0, D, 39, -1, {RS,DIS,RA,0} },
215 {"lhz", 0, D, 40, -1, {RT,DIS,RA,0} },
216 {"lhzu", 0, D, 41, -1, {RT,DIS,RA,0} },
217 {"lha", 0, D, 42, -1, {RT,DIS,RA,0} },
218 {"lhau", 0, D, 43, -1, {RT,DIS,RA,0} },
219 {"sth", 0, D, 44, -1, {RS,DIS,RA,0} },
220 {"sthu", 0, D, 45, -1, {RS,DIS,RA,0} },
221 {"lm", 0, D, 46, -1, {RT,DIS,RA,0} },
222 {"stm", 0, D, 47, -1, {RS,DIS,RA,0} },
223 {"lfs", 0, D, 48, -1, {FRT,DIS,RA,0} },
224 {"lfsu", 0, D, 49, -1, {FRT,DIS,RA,0} },
225 {"lfd", 0, D, 50, -1, {FRT,DIS,RA,0} },
226 {"lfdu", 0, D, 51, -1, {FRT,DIS,RA,0} },
227 {"stfs", 0, D, 52, -1, {FRS,DIS,RA,0} },
228 {"stfsu", 0, D, 53, -1, {FRS,DIS,RA,0} },
229 {"stfd", 0, D, 54, -1, {FRS,DIS,RA,0} },
230 {"stfdu", 0, D, 55, -1, {FRS,DIS,RA,0} },
231 {"fcmpu", 0, X, 63, 0, {BF,FRA,FRB,0} },
232 {"frsp", ".", X, 63, 12, {FRT,FRB,0} },
233 {"fd", ".", A, 63, 18, {FRT,FRA,FRB,0} },
234 {"fs", ".", A, 63, 20, {FRT,FRA,FRB,0} },
235 {"fa", ".", A, 63, 21, {FRT,FRA,FRB,0} },
236 {"fm", ".", A, 63, 25, {FRT,FRA,FRC,0} },
237 {"fms", ".", A, 63, 28, {FRT,FRA,FRC,FRB,0} },
238 {"fma", ".", A, 63, 29, {FRT,FRA,FRC,FRB,0} },
239 {"fnms", ".", A, 63, 30, {FRT,FRA,FRC,FRB,0} },
240 {"fnma", ".", A, 63, 31, {FRT,FRA,FRC,FRB,0} },
241 {"fcmpo", 0, X, 63, 32, {BF,FRA,FRB,0} },
242 {"mtfsb1", ".", X, 63, 38, {BT,0} },
243 {"fneg", ".", X, 63, 40, {FRT,FRB,0} },
244 {"mcrfs", 0, X, 63, 64, {BF,BFA,0} },
245 {"mtfsb0", ".", X, 63, 70, {BT,0} },
246 {"fmr", ".", X, 63, 72, {FRT,FRB,0} },
247 {"mtfsfi", ".", X, 63, 134, {BF,I,0} },
248 {"fnabs", ".", X, 63, 136, {FRT,FRB,0} },
249 {"fabs", ".", X, 63, 264, {FRT,FRB,0} },
250 {"mffs", ".", X, 63, 583, {FRT,0} },
251 {"mtfsf", ".", XFL, 63, 711, {FLM,FRB,0} },
252 };
253
254 #define NOPCODES (sizeof (rs6k_ops) / sizeof (struct rs6000_insn))
GDB Binutils - Deliverables
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