1 /* tic80.h -- Header file for TI TMS320C80 (MV) opcode table
2 Copyright 1996, 1997 Free Software Foundation, Inc.
3 Written by Fred Fish (fnf@cygnus.com), Cygnus Support
5 This file is part of GDB, GAS, and the GNU binutils.
7 GDB, GAS, and the GNU binutils are free software; you can redistribute
8 them and/or modify them under the terms of the GNU General Public
9 License as published by the Free Software Foundation; either version
10 1, or (at your option) any later version.
12 GDB, GAS, and the GNU binutils are distributed in the hope that they
13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 the GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 /* The opcode table is an array of struct tic80_opcode. */
28 /* The opcode name. */
32 /* The opcode itself. Those bits which will be filled in with operands
37 /* The opcode mask. This is used by the disassembler. This is a mask
38 containing ones indicating those bits which must match the opcode
39 field, and zeroes indicating those bits which need not match (and are
40 presumably filled in by operands). */
44 /* The format of this opcode. I.E. short-immediate, register, long
45 immediate, etc. FIXME: Will this ever be used? */
49 /* An array of operand codes. Each code is an index into the operand
50 table. They appear in the order which the operands must appear in
51 assembly code, and are terminated by a zero. FIXME: Adjust size to
52 match actual requirements when TIc80 support is complete */
54 unsigned char operands
[8];
57 /* The table itself is sorted by major opcode number, and is otherwise in
58 the order in which the disassembler should consider instructions.
59 FIXME: This isn't currently true. */
61 extern const struct tic80_opcode tic80_opcodes
[];
62 extern const int tic80_num_opcodes
;
65 /* The operands table is an array of struct tic80_operand. */
69 /* The number of bits in the operand. */
73 /* How far the operand is left shifted in the instruction. */
77 /* Insertion function. This is used by the assembler. To insert an
78 operand value into an instruction, check this field.
80 If it is NULL, execute
81 i |= (op & ((1 << o->bits) - 1)) << o->shift;
82 (i is the instruction which we are filling in, o is a pointer to
83 this structure, and op is the opcode value; this assumes twos
84 complement arithmetic).
86 If this field is not NULL, then simply call it with the
87 instruction and the operand value. It will return the new value
88 of the instruction. If the ERRMSG argument is not NULL, then if
89 the operand value is illegal, *ERRMSG will be set to a warning
90 string (the operand will be inserted in any case). If the
91 operand value is legal, *ERRMSG will be unchanged (most operands
92 can accept any value). */
94 unsigned long (*insert
) PARAMS ((unsigned long instruction
, long op
,
95 const char **errmsg
));
97 /* Extraction function. This is used by the disassembler. To
98 extract this operand type from an instruction, check this field.
100 If it is NULL, compute
101 op = ((i) >> o->shift) & ((1 << o->bits) - 1);
102 if ((o->flags & PPC_OPERAND_SIGNED) != 0
103 && (op & (1 << (o->bits - 1))) != 0)
105 (i is the instruction, o is a pointer to this structure, and op
106 is the result; this assumes twos complement arithmetic).
108 If this field is not NULL, then simply call it with the
109 instruction value. It will return the value of the operand. If
110 the INVALID argument is not NULL, *INVALID will be set to
111 non-zero if this operand type can not actually be extracted from
112 this operand (i.e., the instruction does not match). If the
113 operand is valid, *INVALID will not be changed. */
115 long (*extract
) PARAMS ((unsigned long instruction
, int *invalid
));
117 /* One bit syntax flags. */
122 /* Elements in the table are retrieved by indexing with values from
123 the operands field of the tic80_opcodes table. */
125 extern const struct tic80_operand tic80_operands
[];
127 /* Values defined for the flags field of a struct tic80_operand. */
129 /* This operand takes signed values. */
130 #define TIC80_OPERAND_SIGNED (01)
132 /* The next operand should be wrapped in parentheses rather than separated
133 from this one by a comma. This is used for various instructions, like
134 the load and store instructions, which want their operands to look like
135 "displacement(reg)" */
136 #define TIC80_OPERAND_PARENS (02)
138 /* This operand is a bit number and may use symbolic names such as "eq.b",
140 #define TIC80_OPERAND_BITNUM (04)
142 /* This operand names a register. The disassembler uses this to print
143 register names with a leading 'r'. */
144 #define TIC80_OPERAND_GPR (010)
146 /* This operand names a floating point accumulator register. The disassembler
147 prints these with a leading 'a'. */
148 #define TIC80_OPERAND_FPA (020)
150 /* This operand is a relative branch displacement. The disassembler
151 prints these symbolically if possible. */
152 #define TIC80_OPERAND_RELATIVE (040)
154 /* This flag is a hint to the disassembler for using hex as the prefered
155 printing format, even for small positive or negative immediate values.
156 Normally values in the range -999 to 999 are printed as signed decimal
157 values and other values are printed in hex. */
158 #define TIC80_OPERAND_BITFIELD (0100)
160 /* This operand is a condition code, which may be given symbolically as
161 "eq0.b", "ne0.w", etc. */
162 #define TIC80_OPERAND_CC (0200)
164 /* This operand is a control register number, or may also be given
165 symbolically as "EIP", "EPC", etc. */
166 #define TIC80_OPERAND_CR (0400)
168 /* This operand may have a ":m" modifier specified by bit 17 in a short
169 immediate form instruction. */
170 #define TIC80_OPERAND_M_SI (01000)
172 /* This operand may have a ":m" modifier specified by bit 15 in a long
173 immediate or register form instruction. */
174 #define TIC80_OPERAND_M_LI (02000)
176 /* Values which go in the struct tic80_opcode format field to distinguish
177 between various types of instructions with the same mnemonic. FIXME: Not
180 #define FMT_UNUSED 0 /* Unused */
181 #define FMT_SI 1 /* Short immediate format */
182 #define FMT_LI 2 /* Long immediate format */
183 #define FMT_REG 3 /* Register format */