include/rseq/arch/generic/common.h

   1 /* SPDX-License-Identifier: MIT */
   2 /* SPDX-FileCopyrightText: 2024 Mathieu Desnoyers <mathieu.desnoyers@efficios.com> */
   3
   4 /*
   5  * rseq/arch/generic/common.h: Common architecture support macros.
   6  */
   7
   8 #ifndef _RSEQ_GENERIC_COMMON_H
   9 #define _RSEQ_GENERIC_COMMON_H
  10
  11 /* Only used in RSEQ_ASM_DEFINE_TABLE. */
  12 #define __RSEQ_ASM_DEFINE_TABLE(label, version, flags,                  \
  13                                 start_ip, post_commit_offset, abort_ip) \
  14                 ".pushsection __rseq_cs, \"aw\"\n\t"                    \
  15                 ".balign 32\n\t"                                        \
  16                 __rseq_str(label) ":\n\t"                               \
  17                 RSEQ_ASM_U32(__rseq_str(version)) "\n\t"                \
  18                 RSEQ_ASM_U32(__rseq_str(flags)) "\n\t"                  \
  19                 RSEQ_ASM_U64_PTR(__rseq_str(start_ip)) "\n\t"           \
  20                 RSEQ_ASM_U64_PTR(__rseq_str(post_commit_offset)) "\n\t" \
  21                 RSEQ_ASM_U64_PTR(__rseq_str(abort_ip)) "\n\t"           \
  22                 ".popsection\n\t"                                       \
  23                 ".pushsection __rseq_cs_ptr_array, \"aw\"\n\t"          \
  24                 RSEQ_ASM_U64_PTR(__rseq_str(label) "b") "\n\t"          \
  25                 ".popsection\n\t"
  26
  27 /*
  28  * Define an rseq critical section structure of version 0 with no flags.
  29  *
  30  *  @label:
  31  *    Local label for the beginning of the critical section descriptor
  32  *    structure.
  33  *  @start_ip:
  34  *    Pointer to the first instruction of the sequence of consecutive assembly
  35  *    instructions.
  36  *  @post_commit_ip:
  37  *    Pointer to the instruction after the last instruction of the sequence of
  38  *    consecutive assembly instructions.
  39  *  @abort_ip:
  40  *    Pointer to the instruction where to move the execution flow in case of
  41  *    abort of the sequence of consecutive assembly instructions.
  42  */
  43 #define RSEQ_ASM_DEFINE_TABLE(label, start_ip, post_commit_ip, abort_ip) \
  44         __RSEQ_ASM_DEFINE_TABLE(label, 0x0, 0x0, start_ip,              \
  45                                 (post_commit_ip) - (start_ip), abort_ip)
  46
  47 /*
  48  * Define the @exit_ip pointer as an exit point for the sequence of consecutive
  49  * assembly instructions at @start_ip.
  50  *
  51  *  @start_ip:
  52  *    Pointer to the first instruction of the sequence of consecutive assembly
  53  *    instructions.
  54  *  @exit_ip:
  55  *    Pointer to an exit point instruction.
  56  *
  57  * Exit points of a rseq critical section consist of all instructions outside
  58  * of the critical section where a critical section can either branch to or
  59  * reach through the normal course of its execution. The abort IP and the
  60  * post-commit IP are already part of the __rseq_cs section and should not be
  61  * explicitly defined as additional exit points. Knowing all exit points is
  62  * useful to assist debuggers stepping over the critical section.
  63  */
  64 #define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip)                   \
  65                 ".pushsection __rseq_exit_point_array, \"aw\"\n\t"      \
  66                 RSEQ_ASM_U64_PTR(__rseq_str(start_ip)) "\n\t"           \
  67                 RSEQ_ASM_U64_PTR(__rseq_str(exit_ip)) "\n\t"            \
  68                 ".popsection\n\t"
  69
  70 #endif