[SCSI] libsas: sgpio write support
[deliverable/linux.git] / include / scsi / sas.h
1 /*
2 * SAS structures and definitions header file
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
23 *
24 */
25
26 #ifndef _SAS_H_
27 #define _SAS_H_
28
29 #include <linux/types.h>
30 #include <asm/byteorder.h>
31
32 #define SAS_ADDR_SIZE 8
33 #define HASHED_SAS_ADDR_SIZE 3
34 #define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
35
36 #define SMP_REQUEST 0x40
37 #define SMP_RESPONSE 0x41
38
39 #define SSP_DATA 0x01
40 #define SSP_XFER_RDY 0x05
41 #define SSP_COMMAND 0x06
42 #define SSP_RESPONSE 0x07
43 #define SSP_TASK 0x16
44
45 #define SMP_REPORT_GENERAL 0x00
46 #define SMP_REPORT_MANUF_INFO 0x01
47 #define SMP_READ_GPIO_REG 0x02
48 #define SMP_DISCOVER 0x10
49 #define SMP_REPORT_PHY_ERR_LOG 0x11
50 #define SMP_REPORT_PHY_SATA 0x12
51 #define SMP_REPORT_ROUTE_INFO 0x13
52 #define SMP_WRITE_GPIO_REG 0x82
53 #define SMP_CONF_ROUTE_INFO 0x90
54 #define SMP_PHY_CONTROL 0x91
55 #define SMP_PHY_TEST_FUNCTION 0x92
56
57 #define SMP_RESP_FUNC_ACC 0x00
58 #define SMP_RESP_FUNC_UNK 0x01
59 #define SMP_RESP_FUNC_FAILED 0x02
60 #define SMP_RESP_INV_FRM_LEN 0x03
61 #define SMP_RESP_NO_PHY 0x10
62 #define SMP_RESP_NO_INDEX 0x11
63 #define SMP_RESP_PHY_NO_SATA 0x12
64 #define SMP_RESP_PHY_UNK_OP 0x13
65 #define SMP_RESP_PHY_UNK_TESTF 0x14
66 #define SMP_RESP_PHY_TEST_INPROG 0x15
67 #define SMP_RESP_PHY_VACANT 0x16
68
69 /* SAM TMFs */
70 #define TMF_ABORT_TASK 0x01
71 #define TMF_ABORT_TASK_SET 0x02
72 #define TMF_CLEAR_TASK_SET 0x04
73 #define TMF_LU_RESET 0x08
74 #define TMF_CLEAR_ACA 0x40
75 #define TMF_QUERY_TASK 0x80
76
77 /* SAS TMF responses */
78 #define TMF_RESP_FUNC_COMPLETE 0x00
79 #define TMF_RESP_INVALID_FRAME 0x02
80 #define TMF_RESP_FUNC_ESUPP 0x04
81 #define TMF_RESP_FUNC_FAILED 0x05
82 #define TMF_RESP_FUNC_SUCC 0x08
83 #define TMF_RESP_NO_LUN 0x09
84 #define TMF_RESP_OVERLAPPED_TAG 0x0A
85
86 enum sas_oob_mode {
87 OOB_NOT_CONNECTED,
88 SATA_OOB_MODE,
89 SAS_OOB_MODE
90 };
91
92 /* See sas_discover.c if you plan on changing these.
93 */
94 enum sas_dev_type {
95 NO_DEVICE = 0, /* protocol */
96 SAS_END_DEV = 1, /* protocol */
97 EDGE_DEV = 2, /* protocol */
98 FANOUT_DEV = 3, /* protocol */
99 SAS_HA = 4,
100 SATA_DEV = 5,
101 SATA_PM = 7,
102 SATA_PM_PORT= 8,
103 };
104
105 enum sas_protocol {
106 SAS_PROTOCOL_SATA = 0x01,
107 SAS_PROTOCOL_SMP = 0x02,
108 SAS_PROTOCOL_STP = 0x04,
109 SAS_PROTOCOL_SSP = 0x08,
110 SAS_PROTOCOL_ALL = 0x0E,
111 };
112
113 /* From the spec; local phys only */
114 enum phy_func {
115 PHY_FUNC_NOP,
116 PHY_FUNC_LINK_RESET, /* Enables the phy */
117 PHY_FUNC_HARD_RESET,
118 PHY_FUNC_DISABLE,
119 PHY_FUNC_CLEAR_ERROR_LOG = 5,
120 PHY_FUNC_CLEAR_AFFIL,
121 PHY_FUNC_TX_SATA_PS_SIGNAL,
122 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
123 PHY_FUNC_SET_LINK_RATE,
124 };
125
126 /* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
127 * Most of those are here for completeness.
128 */
129 enum sas_prim {
130 SAS_PRIM_AIP_NORMAL = 1,
131 SAS_PRIM_AIP_R0 = 2,
132 SAS_PRIM_AIP_R1 = 3,
133 SAS_PRIM_AIP_R2 = 4,
134 SAS_PRIM_AIP_WC = 5,
135 SAS_PRIM_AIP_WD = 6,
136 SAS_PRIM_AIP_WP = 7,
137 SAS_PRIM_AIP_RWP = 8,
138
139 SAS_PRIM_BC_CH = 9,
140 SAS_PRIM_BC_RCH0 = 10,
141 SAS_PRIM_BC_RCH1 = 11,
142 SAS_PRIM_BC_R0 = 12,
143 SAS_PRIM_BC_R1 = 13,
144 SAS_PRIM_BC_R2 = 14,
145 SAS_PRIM_BC_R3 = 15,
146 SAS_PRIM_BC_R4 = 16,
147
148 SAS_PRIM_NOTIFY_ENSP= 17,
149 SAS_PRIM_NOTIFY_R0 = 18,
150 SAS_PRIM_NOTIFY_R1 = 19,
151 SAS_PRIM_NOTIFY_R2 = 20,
152
153 SAS_PRIM_CLOSE_CLAF = 21,
154 SAS_PRIM_CLOSE_NORM = 22,
155 SAS_PRIM_CLOSE_R0 = 23,
156 SAS_PRIM_CLOSE_R1 = 24,
157
158 SAS_PRIM_OPEN_RTRY = 25,
159 SAS_PRIM_OPEN_RJCT = 26,
160 SAS_PRIM_OPEN_ACPT = 27,
161
162 SAS_PRIM_DONE = 28,
163 SAS_PRIM_BREAK = 29,
164
165 SATA_PRIM_DMAT = 33,
166 SATA_PRIM_PMNAK = 34,
167 SATA_PRIM_PMACK = 35,
168 SATA_PRIM_PMREQ_S = 36,
169 SATA_PRIM_PMREQ_P = 37,
170 SATA_SATA_R_ERR = 38,
171 };
172
173 enum sas_open_rej_reason {
174 /* Abandon open */
175 SAS_OREJ_UNKNOWN = 0,
176 SAS_OREJ_BAD_DEST = 1,
177 SAS_OREJ_CONN_RATE = 2,
178 SAS_OREJ_EPROTO = 3,
179 SAS_OREJ_RESV_AB0 = 4,
180 SAS_OREJ_RESV_AB1 = 5,
181 SAS_OREJ_RESV_AB2 = 6,
182 SAS_OREJ_RESV_AB3 = 7,
183 SAS_OREJ_WRONG_DEST= 8,
184 SAS_OREJ_STP_NORES = 9,
185
186 /* Retry open */
187 SAS_OREJ_NO_DEST = 10,
188 SAS_OREJ_PATH_BLOCKED = 11,
189 SAS_OREJ_RSVD_CONT0 = 12,
190 SAS_OREJ_RSVD_CONT1 = 13,
191 SAS_OREJ_RSVD_INIT0 = 14,
192 SAS_OREJ_RSVD_INIT1 = 15,
193 SAS_OREJ_RSVD_STOP0 = 16,
194 SAS_OREJ_RSVD_STOP1 = 17,
195 SAS_OREJ_RSVD_RETRY = 18,
196 };
197
198 enum sas_gpio_reg_type {
199 SAS_GPIO_REG_CFG = 0,
200 SAS_GPIO_REG_RX = 1,
201 SAS_GPIO_REG_RX_GP = 2,
202 SAS_GPIO_REG_TX = 3,
203 SAS_GPIO_REG_TX_GP = 4,
204 };
205
206 struct dev_to_host_fis {
207 u8 fis_type; /* 0x34 */
208 u8 flags;
209 u8 status;
210 u8 error;
211
212 u8 lbal;
213 union { u8 lbam; u8 byte_count_low; };
214 union { u8 lbah; u8 byte_count_high; };
215 u8 device;
216
217 u8 lbal_exp;
218 u8 lbam_exp;
219 u8 lbah_exp;
220 u8 _r_a;
221
222 union { u8 sector_count; u8 interrupt_reason; };
223 u8 sector_count_exp;
224 u8 _r_b;
225 u8 _r_c;
226
227 u32 _r_d;
228 } __attribute__ ((packed));
229
230 struct host_to_dev_fis {
231 u8 fis_type; /* 0x27 */
232 u8 flags;
233 u8 command;
234 u8 features;
235
236 u8 lbal;
237 union { u8 lbam; u8 byte_count_low; };
238 union { u8 lbah; u8 byte_count_high; };
239 u8 device;
240
241 u8 lbal_exp;
242 u8 lbam_exp;
243 u8 lbah_exp;
244 u8 features_exp;
245
246 union { u8 sector_count; u8 interrupt_reason; };
247 u8 sector_count_exp;
248 u8 _r_a;
249 u8 control;
250
251 u32 _r_b;
252 } __attribute__ ((packed));
253
254 /* Prefer to have code clarity over header file clarity.
255 */
256 #ifdef __LITTLE_ENDIAN_BITFIELD
257 struct sas_identify_frame {
258 /* Byte 0 */
259 u8 frame_type:4;
260 u8 dev_type:3;
261 u8 _un0:1;
262
263 /* Byte 1 */
264 u8 _un1;
265
266 /* Byte 2 */
267 union {
268 struct {
269 u8 _un20:1;
270 u8 smp_iport:1;
271 u8 stp_iport:1;
272 u8 ssp_iport:1;
273 u8 _un247:4;
274 };
275 u8 initiator_bits;
276 };
277
278 /* Byte 3 */
279 union {
280 struct {
281 u8 _un30:1;
282 u8 smp_tport:1;
283 u8 stp_tport:1;
284 u8 ssp_tport:1;
285 u8 _un347:4;
286 };
287 u8 target_bits;
288 };
289
290 /* Byte 4 - 11 */
291 u8 _un4_11[8];
292
293 /* Byte 12 - 19 */
294 u8 sas_addr[SAS_ADDR_SIZE];
295
296 /* Byte 20 */
297 u8 phy_id;
298
299 u8 _un21_27[7];
300
301 __be32 crc;
302 } __attribute__ ((packed));
303
304 struct ssp_frame_hdr {
305 u8 frame_type;
306 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
307 u8 _r_a;
308 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
309 __be16 _r_b;
310
311 u8 changing_data_ptr:1;
312 u8 retransmit:1;
313 u8 retry_data_frames:1;
314 u8 _r_c:5;
315
316 u8 num_fill_bytes:2;
317 u8 _r_d:6;
318
319 u32 _r_e;
320 __be16 tag;
321 __be16 tptt;
322 __be32 data_offs;
323 } __attribute__ ((packed));
324
325 struct ssp_response_iu {
326 u8 _r_a[10];
327
328 u8 datapres:2;
329 u8 _r_b:6;
330
331 u8 status;
332
333 u32 _r_c;
334
335 __be32 sense_data_len;
336 __be32 response_data_len;
337
338 u8 resp_data[0];
339 u8 sense_data[0];
340 } __attribute__ ((packed));
341
342 /* ---------- SMP ---------- */
343
344 struct report_general_resp {
345 __be16 change_count;
346 __be16 route_indexes;
347 u8 _r_a;
348 u8 num_phys;
349
350 u8 conf_route_table:1;
351 u8 configuring:1;
352 u8 _r_b:6;
353
354 u8 _r_c;
355
356 u8 enclosure_logical_id[8];
357
358 u8 _r_d[12];
359 } __attribute__ ((packed));
360
361 struct discover_resp {
362 u8 _r_a[5];
363
364 u8 phy_id;
365 __be16 _r_b;
366
367 u8 _r_c:4;
368 u8 attached_dev_type:3;
369 u8 _r_d:1;
370
371 u8 linkrate:4;
372 u8 _r_e:4;
373
374 u8 attached_sata_host:1;
375 u8 iproto:3;
376 u8 _r_f:4;
377
378 u8 attached_sata_dev:1;
379 u8 tproto:3;
380 u8 _r_g:3;
381 u8 attached_sata_ps:1;
382
383 u8 sas_addr[8];
384 u8 attached_sas_addr[8];
385 u8 attached_phy_id;
386
387 u8 _r_h[7];
388
389 u8 hmin_linkrate:4;
390 u8 pmin_linkrate:4;
391 u8 hmax_linkrate:4;
392 u8 pmax_linkrate:4;
393
394 u8 change_count;
395
396 u8 pptv:4;
397 u8 _r_i:3;
398 u8 virtual:1;
399
400 u8 routing_attr:4;
401 u8 _r_j:4;
402
403 u8 conn_type;
404 u8 conn_el_index;
405 u8 conn_phy_link;
406
407 u8 _r_k[8];
408 } __attribute__ ((packed));
409
410 struct report_phy_sata_resp {
411 u8 _r_a[5];
412
413 u8 phy_id;
414 u8 _r_b;
415
416 u8 affil_valid:1;
417 u8 affil_supp:1;
418 u8 _r_c:6;
419
420 u32 _r_d;
421
422 u8 stp_sas_addr[8];
423
424 struct dev_to_host_fis fis;
425
426 u32 _r_e;
427
428 u8 affil_stp_ini_addr[8];
429
430 __be32 crc;
431 } __attribute__ ((packed));
432
433 struct smp_resp {
434 u8 frame_type;
435 u8 function;
436 u8 result;
437 u8 reserved;
438 union {
439 struct report_general_resp rg;
440 struct discover_resp disc;
441 struct report_phy_sata_resp rps;
442 };
443 } __attribute__ ((packed));
444
445 #elif defined(__BIG_ENDIAN_BITFIELD)
446 struct sas_identify_frame {
447 /* Byte 0 */
448 u8 _un0:1;
449 u8 dev_type:3;
450 u8 frame_type:4;
451
452 /* Byte 1 */
453 u8 _un1;
454
455 /* Byte 2 */
456 union {
457 struct {
458 u8 _un247:4;
459 u8 ssp_iport:1;
460 u8 stp_iport:1;
461 u8 smp_iport:1;
462 u8 _un20:1;
463 };
464 u8 initiator_bits;
465 };
466
467 /* Byte 3 */
468 union {
469 struct {
470 u8 _un347:4;
471 u8 ssp_tport:1;
472 u8 stp_tport:1;
473 u8 smp_tport:1;
474 u8 _un30:1;
475 };
476 u8 target_bits;
477 };
478
479 /* Byte 4 - 11 */
480 u8 _un4_11[8];
481
482 /* Byte 12 - 19 */
483 u8 sas_addr[SAS_ADDR_SIZE];
484
485 /* Byte 20 */
486 u8 phy_id;
487
488 u8 _un21_27[7];
489
490 __be32 crc;
491 } __attribute__ ((packed));
492
493 struct ssp_frame_hdr {
494 u8 frame_type;
495 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
496 u8 _r_a;
497 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
498 __be16 _r_b;
499
500 u8 _r_c:5;
501 u8 retry_data_frames:1;
502 u8 retransmit:1;
503 u8 changing_data_ptr:1;
504
505 u8 _r_d:6;
506 u8 num_fill_bytes:2;
507
508 u32 _r_e;
509 __be16 tag;
510 __be16 tptt;
511 __be32 data_offs;
512 } __attribute__ ((packed));
513
514 struct ssp_response_iu {
515 u8 _r_a[10];
516
517 u8 _r_b:6;
518 u8 datapres:2;
519
520 u8 status;
521
522 u32 _r_c;
523
524 __be32 sense_data_len;
525 __be32 response_data_len;
526
527 u8 resp_data[0];
528 u8 sense_data[0];
529 } __attribute__ ((packed));
530
531 /* ---------- SMP ---------- */
532
533 struct report_general_resp {
534 __be16 change_count;
535 __be16 route_indexes;
536 u8 _r_a;
537 u8 num_phys;
538
539 u8 _r_b:6;
540 u8 configuring:1;
541 u8 conf_route_table:1;
542
543 u8 _r_c;
544
545 u8 enclosure_logical_id[8];
546
547 u8 _r_d[12];
548 } __attribute__ ((packed));
549
550 struct discover_resp {
551 u8 _r_a[5];
552
553 u8 phy_id;
554 __be16 _r_b;
555
556 u8 _r_d:1;
557 u8 attached_dev_type:3;
558 u8 _r_c:4;
559
560 u8 _r_e:4;
561 u8 linkrate:4;
562
563 u8 _r_f:4;
564 u8 iproto:3;
565 u8 attached_sata_host:1;
566
567 u8 attached_sata_ps:1;
568 u8 _r_g:3;
569 u8 tproto:3;
570 u8 attached_sata_dev:1;
571
572 u8 sas_addr[8];
573 u8 attached_sas_addr[8];
574 u8 attached_phy_id;
575
576 u8 _r_h[7];
577
578 u8 pmin_linkrate:4;
579 u8 hmin_linkrate:4;
580 u8 pmax_linkrate:4;
581 u8 hmax_linkrate:4;
582
583 u8 change_count;
584
585 u8 virtual:1;
586 u8 _r_i:3;
587 u8 pptv:4;
588
589 u8 _r_j:4;
590 u8 routing_attr:4;
591
592 u8 conn_type;
593 u8 conn_el_index;
594 u8 conn_phy_link;
595
596 u8 _r_k[8];
597 } __attribute__ ((packed));
598
599 struct report_phy_sata_resp {
600 u8 _r_a[5];
601
602 u8 phy_id;
603 u8 _r_b;
604
605 u8 _r_c:6;
606 u8 affil_supp:1;
607 u8 affil_valid:1;
608
609 u32 _r_d;
610
611 u8 stp_sas_addr[8];
612
613 struct dev_to_host_fis fis;
614
615 u32 _r_e;
616
617 u8 affil_stp_ini_addr[8];
618
619 __be32 crc;
620 } __attribute__ ((packed));
621
622 struct smp_resp {
623 u8 frame_type;
624 u8 function;
625 u8 result;
626 u8 reserved;
627 union {
628 struct report_general_resp rg;
629 struct discover_resp disc;
630 struct report_phy_sata_resp rps;
631 };
632 } __attribute__ ((packed));
633
634 #else
635 #error "Bitfield order not defined!"
636 #endif
637
638 #endif /* _SAS_H_ */
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