include/sound/hdaudio.h

   1 /*
   2  * HD-audio core stuff
   3  */
   4
   5 #ifndef __SOUND_HDAUDIO_H
   6 #define __SOUND_HDAUDIO_H
   7
   8 #include <linux/device.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/timecounter.h>
  11 #include <sound/core.h>
  12 #include <sound/memalloc.h>
  13 #include <sound/hda_verbs.h>
  14
  15 /* codec node id */
  16 typedef u16 hda_nid_t;
  17
  18 struct hdac_bus;
  19 struct hdac_stream;
  20 struct hdac_device;
  21 struct hdac_driver;
  22 struct hdac_widget_tree;
  23
  24 /*
  25  * exported bus type
  26  */
  27 extern struct bus_type snd_hda_bus_type;
  28
  29 /*
  30  * generic arrays
  31  */
  32 struct snd_array {
  33         unsigned int used;
  34         unsigned int alloced;
  35         unsigned int elem_size;
  36         unsigned int alloc_align;
  37         void *list;
  38 };
  39
  40 /*
  41  * HD-audio codec base device
  42  */
  43 struct hdac_device {
  44         struct device dev;
  45         int type;
  46         struct hdac_bus *bus;
  47         unsigned int addr;              /* codec address */
  48         struct list_head list;          /* list point for bus codec_list */
  49
  50         hda_nid_t afg;                  /* AFG node id */
  51         hda_nid_t mfg;                  /* MFG node id */
  52
  53         /* ids */
  54         unsigned int vendor_id;
  55         unsigned int subsystem_id;
  56         unsigned int revision_id;
  57         unsigned int afg_function_id;
  58         unsigned int mfg_function_id;
  59         unsigned int afg_unsol:1;
  60         unsigned int mfg_unsol:1;
  61
  62         unsigned int power_caps;        /* FG power caps */
  63
  64         const char *vendor_name;        /* codec vendor name */
  65         const char *chip_name;          /* codec chip name */
  66
  67         /* verb exec op override */
  68         int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
  69                          unsigned int flags, unsigned int *res);
  70
  71         /* widgets */
  72         unsigned int num_nodes;
  73         hda_nid_t start_nid, end_nid;
  74
  75         /* misc flags */
  76         atomic_t in_pm;         /* suspend/resume being performed */
  77
  78         /* sysfs */
  79         struct hdac_widget_tree *widgets;
  80
  81         /* regmap */
  82         struct regmap *regmap;
  83         struct snd_array vendor_verbs;
  84         bool lazy_cache:1;      /* don't wake up for writes */
  85         bool caps_overwriting:1; /* caps overwrite being in process */
  86         bool cache_coef:1;      /* cache COEF read/write too */
  87 };
  88
  89 /* device/driver type used for matching */
  90 enum {
  91         HDA_DEV_CORE,
  92         HDA_DEV_LEGACY,
  93         HDA_DEV_ASOC,
  94 };
  95
  96 /* direction */
  97 enum {
  98         HDA_INPUT, HDA_OUTPUT
  99 };
 100
 101 #define dev_to_hdac_dev(_dev)   container_of(_dev, struct hdac_device, dev)
 102
 103 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
 104                          const char *name, unsigned int addr);
 105 void snd_hdac_device_exit(struct hdac_device *dev);
 106 int snd_hdac_device_register(struct hdac_device *codec);
 107 void snd_hdac_device_unregister(struct hdac_device *codec);
 108
 109 int snd_hdac_refresh_widgets(struct hdac_device *codec);
 110
 111 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
 112                                unsigned int verb, unsigned int parm);
 113 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
 114                        unsigned int flags, unsigned int *res);
 115 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
 116                   unsigned int verb, unsigned int parm, unsigned int *res);
 117 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
 118                         unsigned int *res);
 119 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
 120                                 int parm);
 121 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
 122                            unsigned int parm, unsigned int val);
 123 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
 124                              hda_nid_t *conn_list, int max_conns);
 125 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
 126                            hda_nid_t *start_id);
 127 unsigned int snd_hdac_calc_stream_format(unsigned int rate,
 128                                          unsigned int channels,
 129                                          unsigned int format,
 130                                          unsigned int maxbps,
 131                                          unsigned short spdif_ctls);
 132 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
 133                                 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
 134 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
 135                                   unsigned int format);
 136
 137 /**
 138  * snd_hdac_read_parm - read a codec parameter
 139  * @codec: the codec object
 140  * @nid: NID to read a parameter
 141  * @parm: parameter to read
 142  *
 143  * Returns -1 for error.  If you need to distinguish the error more
 144  * strictly, use _snd_hdac_read_parm() directly.
 145  */
 146 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
 147                                      int parm)
 148 {
 149         unsigned int val;
 150
 151         return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
 152 }
 153
 154 #ifdef CONFIG_PM
 155 void snd_hdac_power_up(struct hdac_device *codec);
 156 void snd_hdac_power_down(struct hdac_device *codec);
 157 void snd_hdac_power_up_pm(struct hdac_device *codec);
 158 void snd_hdac_power_down_pm(struct hdac_device *codec);
 159 #else
 160 static inline void snd_hdac_power_up(struct hdac_device *codec) {}
 161 static inline void snd_hdac_power_down(struct hdac_device *codec) {}
 162 static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
 163 static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
 164 #endif
 165
 166 /*
 167  * HD-audio codec base driver
 168  */
 169 struct hdac_driver {
 170         struct device_driver driver;
 171         int type;
 172         int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
 173         void (*unsol_event)(struct hdac_device *dev, unsigned int event);
 174 };
 175
 176 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
 177
 178 /*
 179  * Bus verb operators
 180  */
 181 struct hdac_bus_ops {
 182         /* send a single command */
 183         int (*command)(struct hdac_bus *bus, unsigned int cmd);
 184         /* get a response from the last command */
 185         int (*get_response)(struct hdac_bus *bus, unsigned int addr,
 186                             unsigned int *res);
 187 };
 188
 189 /*
 190  * Lowlevel I/O operators
 191  */
 192 struct hdac_io_ops {
 193         /* mapped register accesses */
 194         void (*reg_writel)(u32 value, u32 __iomem *addr);
 195         u32 (*reg_readl)(u32 __iomem *addr);
 196         void (*reg_writew)(u16 value, u16 __iomem *addr);
 197         u16 (*reg_readw)(u16 __iomem *addr);
 198         void (*reg_writeb)(u8 value, u8 __iomem *addr);
 199         u8 (*reg_readb)(u8 __iomem *addr);
 200         /* Allocation ops */
 201         int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
 202                                struct snd_dma_buffer *buf);
 203         void (*dma_free_pages)(struct hdac_bus *bus,
 204                                struct snd_dma_buffer *buf);
 205 };
 206
 207 #define HDA_UNSOL_QUEUE_SIZE    64
 208 #define HDA_MAX_CODECS          8       /* limit by controller side */
 209
 210 /* HD Audio class code */
 211 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO   0x0403
 212
 213 /*
 214  * CORB/RIRB
 215  *
 216  * Each CORB entry is 4byte, RIRB is 8byte
 217  */
 218 struct hdac_rb {
 219         __le32 *buf;            /* virtual address of CORB/RIRB buffer */
 220         dma_addr_t addr;        /* physical address of CORB/RIRB buffer */
 221         unsigned short rp, wp;  /* RIRB read/write pointers */
 222         int cmds[HDA_MAX_CODECS];       /* number of pending requests */
 223         u32 res[HDA_MAX_CODECS];        /* last read value */
 224 };
 225
 226 /*
 227  * HD-audio bus base driver
 228  */
 229 struct hdac_bus {
 230         struct device *dev;
 231         const struct hdac_bus_ops *ops;
 232         const struct hdac_io_ops *io_ops;
 233
 234         /* h/w resources */
 235         unsigned long addr;
 236         void __iomem *remap_addr;
 237         int irq;
 238
 239         /* codec linked list */
 240         struct list_head codec_list;
 241         unsigned int num_codecs;
 242
 243         /* link caddr -> codec */
 244         struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
 245
 246         /* unsolicited event queue */
 247         u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
 248         unsigned int unsol_rp, unsol_wp;
 249         struct work_struct unsol_work;
 250
 251         /* bit flags of detected codecs */
 252         unsigned long codec_mask;
 253
 254         /* bit flags of powered codecs */
 255         unsigned long codec_powered;
 256
 257         /* CORB/RIRB */
 258         struct hdac_rb corb;
 259         struct hdac_rb rirb;
 260         unsigned int last_cmd[HDA_MAX_CODECS];  /* last sent command */
 261
 262         /* CORB/RIRB and position buffers */
 263         struct snd_dma_buffer rb;
 264         struct snd_dma_buffer posbuf;
 265
 266         /* hdac_stream linked list */
 267         struct list_head stream_list;
 268
 269         /* operation state */
 270         bool chip_init:1;               /* h/w initialized */
 271
 272         /* behavior flags */
 273         bool sync_write:1;              /* sync after verb write */
 274         bool use_posbuf:1;              /* use position buffer */
 275         bool snoop:1;                   /* enable snooping */
 276         bool align_bdle_4k:1;           /* BDLE align 4K boundary */
 277         bool reverse_assign:1;          /* assign devices in reverse order */
 278         bool corbrp_self_clear:1;       /* CORBRP clears itself after reset */
 279
 280         int bdl_pos_adj;                /* BDL position adjustment */
 281
 282         /* locks */
 283         spinlock_t reg_lock;
 284         struct mutex cmd_mutex;
 285 };
 286
 287 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
 288                       const struct hdac_bus_ops *ops,
 289                       const struct hdac_io_ops *io_ops);
 290 void snd_hdac_bus_exit(struct hdac_bus *bus);
 291 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
 292                            unsigned int cmd, unsigned int *res);
 293 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
 294                                     unsigned int cmd, unsigned int *res);
 295 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
 296
 297 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
 298 void snd_hdac_bus_remove_device(struct hdac_bus *bus,
 299                                 struct hdac_device *codec);
 300
 301 static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
 302 {
 303         set_bit(codec->addr, &codec->bus->codec_powered);
 304 }
 305
 306 static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
 307 {
 308         clear_bit(codec->addr, &codec->bus->codec_powered);
 309 }
 310
 311 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
 312 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
 313                               unsigned int *res);
 314
 315 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
 316 void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
 317 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
 318 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
 319 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
 320 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
 321
 322 void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
 323 void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
 324                                     void (*ack)(struct hdac_bus *,
 325                                                 struct hdac_stream *));
 326
 327 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
 328 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
 329
 330 /*
 331  * macros for easy use
 332  */
 333 #define _snd_hdac_chip_write(type, chip, reg, value) \
 334         ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
 335 #define _snd_hdac_chip_read(type, chip, reg) \
 336         ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
 337
 338 /* read/write a register, pass without AZX_REG_ prefix */
 339 #define snd_hdac_chip_writel(chip, reg, value) \
 340         _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
 341 #define snd_hdac_chip_writew(chip, reg, value) \
 342         _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
 343 #define snd_hdac_chip_writeb(chip, reg, value) \
 344         _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
 345 #define snd_hdac_chip_readl(chip, reg) \
 346         _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
 347 #define snd_hdac_chip_readw(chip, reg) \
 348         _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
 349 #define snd_hdac_chip_readb(chip, reg) \
 350         _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
 351
 352 /* update a register, pass without AZX_REG_ prefix */
 353 #define snd_hdac_chip_updatel(chip, reg, mask, val) \
 354         snd_hdac_chip_writel(chip, reg, \
 355                              (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
 356 #define snd_hdac_chip_updatew(chip, reg, mask, val) \
 357         snd_hdac_chip_writew(chip, reg, \
 358                              (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
 359 #define snd_hdac_chip_updateb(chip, reg, mask, val) \
 360         snd_hdac_chip_writeb(chip, reg, \
 361                              (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
 362
 363 /*
 364  * HD-audio stream
 365  */
 366 struct hdac_stream {
 367         struct hdac_bus *bus;
 368         struct snd_dma_buffer bdl; /* BDL buffer */
 369         __le32 *posbuf;         /* position buffer pointer */
 370         int direction;          /* playback / capture (SNDRV_PCM_STREAM_*) */
 371
 372         unsigned int bufsize;   /* size of the play buffer in bytes */
 373         unsigned int period_bytes; /* size of the period in bytes */
 374         unsigned int frags;     /* number for period in the play buffer */
 375         unsigned int fifo_size; /* FIFO size */
 376
 377         void __iomem *sd_addr;  /* stream descriptor pointer */
 378
 379         u32 sd_int_sta_mask;    /* stream int status mask */
 380
 381         /* pcm support */
 382         struct snd_pcm_substream *substream;    /* assigned substream,
 383                                                  * set in PCM open
 384                                                  */
 385         unsigned int format_val;        /* format value to be set in the
 386                                          * controller and the codec
 387                                          */
 388         unsigned char stream_tag;       /* assigned stream */
 389         unsigned char index;            /* stream index */
 390         int assigned_key;               /* last device# key assigned to */
 391
 392         bool opened:1;
 393         bool running:1;
 394         bool prepared:1;
 395         bool no_period_wakeup:1;
 396         bool locked:1;
 397
 398         /* timestamp */
 399         unsigned long start_wallclk;    /* start + minimum wallclk */
 400         unsigned long period_wallclk;   /* wallclk for period */
 401         struct timecounter  tc;
 402         struct cyclecounter cc;
 403         int delay_negative_threshold;
 404
 405         struct list_head list;
 406 #ifdef CONFIG_SND_HDA_DSP_LOADER
 407         /* DSP access mutex */
 408         struct mutex dsp_mutex;
 409 #endif
 410 };
 411
 412 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
 413                           int idx, int direction, int tag);
 414 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
 415                                            struct snd_pcm_substream *substream);
 416 void snd_hdac_stream_release(struct hdac_stream *azx_dev);
 417
 418 int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
 419 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
 420 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
 421 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
 422 void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
 423 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
 424 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
 425 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
 426                                   unsigned int streams, unsigned int reg);
 427 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
 428                           unsigned int streams);
 429 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
 430                                       unsigned int streams);
 431 /*
 432  * macros for easy use
 433  */
 434 #define _snd_hdac_stream_write(type, dev, reg, value)                   \
 435         ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
 436 #define _snd_hdac_stream_read(type, dev, reg)                           \
 437         ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
 438
 439 /* read/write a register, pass without AZX_REG_ prefix */
 440 #define snd_hdac_stream_writel(dev, reg, value) \
 441         _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
 442 #define snd_hdac_stream_writew(dev, reg, value) \
 443         _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
 444 #define snd_hdac_stream_writeb(dev, reg, value) \
 445         _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
 446 #define snd_hdac_stream_readl(dev, reg) \
 447         _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
 448 #define snd_hdac_stream_readw(dev, reg) \
 449         _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
 450 #define snd_hdac_stream_readb(dev, reg) \
 451         _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
 452
 453 /* update a register, pass without AZX_REG_ prefix */
 454 #define snd_hdac_stream_updatel(dev, reg, mask, val) \
 455         snd_hdac_stream_writel(dev, reg, \
 456                                (snd_hdac_stream_readl(dev, reg) & \
 457                                 ~(mask)) | (val))
 458 #define snd_hdac_stream_updatew(dev, reg, mask, val) \
 459         snd_hdac_stream_writew(dev, reg, \
 460                                (snd_hdac_stream_readw(dev, reg) & \
 461                                 ~(mask)) | (val))
 462 #define snd_hdac_stream_updateb(dev, reg, mask, val) \
 463         snd_hdac_stream_writeb(dev, reg, \
 464                                (snd_hdac_stream_readb(dev, reg) & \
 465                                 ~(mask)) | (val))
 466
 467 #ifdef CONFIG_SND_HDA_DSP_LOADER
 468 /* DSP lock helpers */
 469 #define snd_hdac_dsp_lock_init(dev)     mutex_init(&(dev)->dsp_mutex)
 470 #define snd_hdac_dsp_lock(dev)          mutex_lock(&(dev)->dsp_mutex)
 471 #define snd_hdac_dsp_unlock(dev)        mutex_unlock(&(dev)->dsp_mutex)
 472 #define snd_hdac_stream_is_locked(dev)  ((dev)->locked)
 473 /* DSP loader helpers */
 474 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
 475                          unsigned int byte_size, struct snd_dma_buffer *bufp);
 476 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
 477 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
 478                           struct snd_dma_buffer *dmab);
 479 #else /* CONFIG_SND_HDA_DSP_LOADER */
 480 #define snd_hdac_dsp_lock_init(dev)     do {} while (0)
 481 #define snd_hdac_dsp_lock(dev)          do {} while (0)
 482 #define snd_hdac_dsp_unlock(dev)        do {} while (0)
 483 #define snd_hdac_stream_is_locked(dev)  0
 484
 485 static inline int
 486 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
 487                      unsigned int byte_size, struct snd_dma_buffer *bufp)
 488 {
 489         return 0;
 490 }
 491
 492 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
 493 {
 494 }
 495
 496 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
 497                                         struct snd_dma_buffer *dmab)
 498 {
 499 }
 500 #endif /* CONFIG_SND_HDA_DSP_LOADER */
 501
 502
 503 /*
 504  * generic array helpers
 505  */
 506 void *snd_array_new(struct snd_array *array);
 507 void snd_array_free(struct snd_array *array);
 508 static inline void snd_array_init(struct snd_array *array, unsigned int size,
 509                                   unsigned int align)
 510 {
 511         array->elem_size = size;
 512         array->alloc_align = align;
 513 }
 514
 515 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
 516 {
 517         return array->list + idx * array->elem_size;
 518 }
 519
 520 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
 521 {
 522         return (unsigned long)(ptr - array->list) / array->elem_size;
 523 }
 524
 525 #endif /* __SOUND_HDAUDIO_H */