include/uapi/drm/drm_mode.h

   1 /*
   2  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
   4  * Copyright (c) 2008 Red Hat Inc.
   5  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
   6  * Copyright (c) 2007-2008 Intel Corporation
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24  * IN THE SOFTWARE.
  25  */
  26
  27 #ifndef _DRM_MODE_H
  28 #define _DRM_MODE_H
  29
  30 #include <linux/types.h>
  31
  32 #define DRM_DISPLAY_INFO_LEN    32
  33 #define DRM_CONNECTOR_NAME_LEN  32
  34 #define DRM_DISPLAY_MODE_LEN    32
  35 #define DRM_PROP_NAME_LEN       32
  36
  37 #define DRM_MODE_TYPE_BUILTIN   (1<<0)
  38 #define DRM_MODE_TYPE_CLOCK_C   ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  39 #define DRM_MODE_TYPE_CRTC_C    ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  40 #define DRM_MODE_TYPE_PREFERRED (1<<3)
  41 #define DRM_MODE_TYPE_DEFAULT   (1<<4)
  42 #define DRM_MODE_TYPE_USERDEF   (1<<5)
  43 #define DRM_MODE_TYPE_DRIVER    (1<<6)
  44
  45 /* Video mode flags */
  46 /* bit compatible with the xorg definitions. */
  47 #define DRM_MODE_FLAG_PHSYNC                    (1<<0)
  48 #define DRM_MODE_FLAG_NHSYNC                    (1<<1)
  49 #define DRM_MODE_FLAG_PVSYNC                    (1<<2)
  50 #define DRM_MODE_FLAG_NVSYNC                    (1<<3)
  51 #define DRM_MODE_FLAG_INTERLACE                 (1<<4)
  52 #define DRM_MODE_FLAG_DBLSCAN                   (1<<5)
  53 #define DRM_MODE_FLAG_CSYNC                     (1<<6)
  54 #define DRM_MODE_FLAG_PCSYNC                    (1<<7)
  55 #define DRM_MODE_FLAG_NCSYNC                    (1<<8)
  56 #define DRM_MODE_FLAG_HSKEW                     (1<<9) /* hskew provided */
  57 #define DRM_MODE_FLAG_BCAST                     (1<<10)
  58 #define DRM_MODE_FLAG_PIXMUX                    (1<<11)
  59 #define DRM_MODE_FLAG_DBLCLK                    (1<<12)
  60 #define DRM_MODE_FLAG_CLKDIV2                   (1<<13)
  61  /*
  62   * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
  63   * (define not exposed to user space).
  64   */
  65 #define DRM_MODE_FLAG_3D_MASK                   (0x1f<<14)
  66 #define  DRM_MODE_FLAG_3D_NONE                  (0<<14)
  67 #define  DRM_MODE_FLAG_3D_FRAME_PACKING         (1<<14)
  68 #define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE     (2<<14)
  69 #define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE      (3<<14)
  70 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL     (4<<14)
  71 #define  DRM_MODE_FLAG_3D_L_DEPTH               (5<<14)
  72 #define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
  73 #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM        (7<<14)
  74 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF     (8<<14)
  75
  76
  77 /* DPMS flags */
  78 /* bit compatible with the xorg definitions. */
  79 #define DRM_MODE_DPMS_ON        0
  80 #define DRM_MODE_DPMS_STANDBY   1
  81 #define DRM_MODE_DPMS_SUSPEND   2
  82 #define DRM_MODE_DPMS_OFF       3
  83
  84 /* Scaling mode options */
  85 #define DRM_MODE_SCALE_NONE             0 /* Unmodified timing (display or
  86                                              software can still scale) */
  87 #define DRM_MODE_SCALE_FULLSCREEN       1 /* Full screen, ignore aspect */
  88 #define DRM_MODE_SCALE_CENTER           2 /* Centered, no scaling */
  89 #define DRM_MODE_SCALE_ASPECT           3 /* Full screen, preserve aspect */
  90
  91 /* Picture aspect ratio options */
  92 #define DRM_MODE_PICTURE_ASPECT_NONE    0
  93 #define DRM_MODE_PICTURE_ASPECT_4_3     1
  94 #define DRM_MODE_PICTURE_ASPECT_16_9    2
  95
  96 /* Dithering mode options */
  97 #define DRM_MODE_DITHERING_OFF  0
  98 #define DRM_MODE_DITHERING_ON   1
  99 #define DRM_MODE_DITHERING_AUTO 2
 100
 101 /* Dirty info options */
 102 #define DRM_MODE_DIRTY_OFF      0
 103 #define DRM_MODE_DIRTY_ON       1
 104 #define DRM_MODE_DIRTY_ANNOTATE 2
 105
 106 struct drm_mode_modeinfo {
 107         __u32 clock;
 108         __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
 109         __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
 110
 111         __u32 vrefresh;
 112
 113         __u32 flags;
 114         __u32 type;
 115         char name[DRM_DISPLAY_MODE_LEN];
 116 };
 117
 118 struct drm_mode_card_res {
 119         __u64 fb_id_ptr;
 120         __u64 crtc_id_ptr;
 121         __u64 connector_id_ptr;
 122         __u64 encoder_id_ptr;
 123         __u32 count_fbs;
 124         __u32 count_crtcs;
 125         __u32 count_connectors;
 126         __u32 count_encoders;
 127         __u32 min_width, max_width;
 128         __u32 min_height, max_height;
 129 };
 130
 131 struct drm_mode_crtc {
 132         __u64 set_connectors_ptr;
 133         __u32 count_connectors;
 134
 135         __u32 crtc_id; /**< Id */
 136         __u32 fb_id; /**< Id of framebuffer */
 137
 138         __u32 x, y; /**< Position on the frameuffer */
 139
 140         __u32 gamma_size;
 141         __u32 mode_valid;
 142         struct drm_mode_modeinfo mode;
 143 };
 144
 145 #define DRM_MODE_PRESENT_TOP_FIELD      (1<<0)
 146 #define DRM_MODE_PRESENT_BOTTOM_FIELD   (1<<1)
 147
 148 /* Planes blend with or override other bits on the CRTC */
 149 struct drm_mode_set_plane {
 150         __u32 plane_id;
 151         __u32 crtc_id;
 152         __u32 fb_id; /* fb object contains surface format type */
 153         __u32 flags; /* see above flags */
 154
 155         /* Signed dest location allows it to be partially off screen */
 156         __s32 crtc_x, crtc_y;
 157         __u32 crtc_w, crtc_h;
 158
 159         /* Source values are 16.16 fixed point */
 160         __u32 src_x, src_y;
 161         __u32 src_h, src_w;
 162 };
 163
 164 struct drm_mode_get_plane {
 165         __u32 plane_id;
 166
 167         __u32 crtc_id;
 168         __u32 fb_id;
 169
 170         __u32 possible_crtcs;
 171         __u32 gamma_size;
 172
 173         __u32 count_format_types;
 174         __u64 format_type_ptr;
 175 };
 176
 177 struct drm_mode_get_plane_res {
 178         __u64 plane_id_ptr;
 179         __u32 count_planes;
 180 };
 181
 182 #define DRM_MODE_ENCODER_NONE   0
 183 #define DRM_MODE_ENCODER_DAC    1
 184 #define DRM_MODE_ENCODER_TMDS   2
 185 #define DRM_MODE_ENCODER_LVDS   3
 186 #define DRM_MODE_ENCODER_TVDAC  4
 187 #define DRM_MODE_ENCODER_VIRTUAL 5
 188 #define DRM_MODE_ENCODER_DSI    6
 189 #define DRM_MODE_ENCODER_DPMST  7
 190
 191 struct drm_mode_get_encoder {
 192         __u32 encoder_id;
 193         __u32 encoder_type;
 194
 195         __u32 crtc_id; /**< Id of crtc */
 196
 197         __u32 possible_crtcs;
 198         __u32 possible_clones;
 199 };
 200
 201 /* This is for connectors with multiple signal types. */
 202 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
 203 #define DRM_MODE_SUBCONNECTOR_Automatic 0
 204 #define DRM_MODE_SUBCONNECTOR_Unknown   0
 205 #define DRM_MODE_SUBCONNECTOR_DVID      3
 206 #define DRM_MODE_SUBCONNECTOR_DVIA      4
 207 #define DRM_MODE_SUBCONNECTOR_Composite 5
 208 #define DRM_MODE_SUBCONNECTOR_SVIDEO    6
 209 #define DRM_MODE_SUBCONNECTOR_Component 8
 210 #define DRM_MODE_SUBCONNECTOR_SCART     9
 211
 212 #define DRM_MODE_CONNECTOR_Unknown      0
 213 #define DRM_MODE_CONNECTOR_VGA          1
 214 #define DRM_MODE_CONNECTOR_DVII         2
 215 #define DRM_MODE_CONNECTOR_DVID         3
 216 #define DRM_MODE_CONNECTOR_DVIA         4
 217 #define DRM_MODE_CONNECTOR_Composite    5
 218 #define DRM_MODE_CONNECTOR_SVIDEO       6
 219 #define DRM_MODE_CONNECTOR_LVDS         7
 220 #define DRM_MODE_CONNECTOR_Component    8
 221 #define DRM_MODE_CONNECTOR_9PinDIN      9
 222 #define DRM_MODE_CONNECTOR_DisplayPort  10
 223 #define DRM_MODE_CONNECTOR_HDMIA        11
 224 #define DRM_MODE_CONNECTOR_HDMIB        12
 225 #define DRM_MODE_CONNECTOR_TV           13
 226 #define DRM_MODE_CONNECTOR_eDP          14
 227 #define DRM_MODE_CONNECTOR_VIRTUAL      15
 228 #define DRM_MODE_CONNECTOR_DSI          16
 229
 230 struct drm_mode_get_connector {
 231
 232         __u64 encoders_ptr;
 233         __u64 modes_ptr;
 234         __u64 props_ptr;
 235         __u64 prop_values_ptr;
 236
 237         __u32 count_modes;
 238         __u32 count_props;
 239         __u32 count_encoders;
 240
 241         __u32 encoder_id; /**< Current Encoder */
 242         __u32 connector_id; /**< Id */
 243         __u32 connector_type;
 244         __u32 connector_type_id;
 245
 246         __u32 connection;
 247         __u32 mm_width, mm_height; /**< HxW in millimeters */
 248         __u32 subpixel;
 249
 250         __u32 pad;
 251 };
 252
 253 #define DRM_MODE_PROP_PENDING   (1<<0)
 254 #define DRM_MODE_PROP_RANGE     (1<<1)
 255 #define DRM_MODE_PROP_IMMUTABLE (1<<2)
 256 #define DRM_MODE_PROP_ENUM      (1<<3) /* enumerated type with text strings */
 257 #define DRM_MODE_PROP_BLOB      (1<<4)
 258 #define DRM_MODE_PROP_BITMASK   (1<<5) /* bitmask of enumerated types */
 259
 260 /* non-extended types: legacy bitmask, one bit per type: */
 261 #define DRM_MODE_PROP_LEGACY_TYPE  ( \
 262                 DRM_MODE_PROP_RANGE | \
 263                 DRM_MODE_PROP_ENUM | \
 264                 DRM_MODE_PROP_BLOB | \
 265                 DRM_MODE_PROP_BITMASK)
 266
 267 /* extended-types: rather than continue to consume a bit per type,
 268  * grab a chunk of the bits to use as integer type id.
 269  */
 270 #define DRM_MODE_PROP_EXTENDED_TYPE     0x0000ffc0
 271 #define DRM_MODE_PROP_TYPE(n)           ((n) << 6)
 272 #define DRM_MODE_PROP_OBJECT            DRM_MODE_PROP_TYPE(1)
 273 #define DRM_MODE_PROP_SIGNED_RANGE      DRM_MODE_PROP_TYPE(2)
 274
 275 struct drm_mode_property_enum {
 276         __u64 value;
 277         char name[DRM_PROP_NAME_LEN];
 278 };
 279
 280 struct drm_mode_get_property {
 281         __u64 values_ptr; /* values and blob lengths */
 282         __u64 enum_blob_ptr; /* enum and blob id ptrs */
 283
 284         __u32 prop_id;
 285         __u32 flags;
 286         char name[DRM_PROP_NAME_LEN];
 287
 288         __u32 count_values;
 289         /* This is only used to count enum values, not blobs. The _blobs is
 290          * simply because of a historical reason, i.e. backwards compat. */
 291         __u32 count_enum_blobs;
 292 };
 293
 294 struct drm_mode_connector_set_property {
 295         __u64 value;
 296         __u32 prop_id;
 297         __u32 connector_id;
 298 };
 299
 300 struct drm_mode_obj_get_properties {
 301         __u64 props_ptr;
 302         __u64 prop_values_ptr;
 303         __u32 count_props;
 304         __u32 obj_id;
 305         __u32 obj_type;
 306 };
 307
 308 struct drm_mode_obj_set_property {
 309         __u64 value;
 310         __u32 prop_id;
 311         __u32 obj_id;
 312         __u32 obj_type;
 313 };
 314
 315 struct drm_mode_get_blob {
 316         __u32 blob_id;
 317         __u32 length;
 318         __u64 data;
 319 };
 320
 321 struct drm_mode_fb_cmd {
 322         __u32 fb_id;
 323         __u32 width, height;
 324         __u32 pitch;
 325         __u32 bpp;
 326         __u32 depth;
 327         /* driver specific handle */
 328         __u32 handle;
 329 };
 330
 331 #define DRM_MODE_FB_INTERLACED  (1<<0) /* for interlaced framebuffers */
 332
 333 struct drm_mode_fb_cmd2 {
 334         __u32 fb_id;
 335         __u32 width, height;
 336         __u32 pixel_format; /* fourcc code from drm_fourcc.h */
 337         __u32 flags; /* see above flags */
 338
 339         /*
 340          * In case of planar formats, this ioctl allows up to 4
 341          * buffer objects with offsets and pitches per plane.
 342          * The pitch and offset order is dictated by the fourcc,
 343          * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
 344          *
 345          *   YUV 4:2:0 image with a plane of 8 bit Y samples
 346          *   followed by an interleaved U/V plane containing
 347          *   8 bit 2x2 subsampled colour difference samples.
 348          *
 349          * So it would consist of Y as offsets[0] and UV as
 350          * offsets[1].  Note that offsets[0] will generally
 351          * be 0 (but this is not required).
 352          */
 353         __u32 handles[4];
 354         __u32 pitches[4]; /* pitch for each plane */
 355         __u32 offsets[4]; /* offset of each plane */
 356 };
 357
 358 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
 359 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
 360 #define DRM_MODE_FB_DIRTY_FLAGS         0x03
 361
 362 #define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
 363
 364 /*
 365  * Mark a region of a framebuffer as dirty.
 366  *
 367  * Some hardware does not automatically update display contents
 368  * as a hardware or software draw to a framebuffer. This ioctl
 369  * allows userspace to tell the kernel and the hardware what
 370  * regions of the framebuffer have changed.
 371  *
 372  * The kernel or hardware is free to update more then just the
 373  * region specified by the clip rects. The kernel or hardware
 374  * may also delay and/or coalesce several calls to dirty into a
 375  * single update.
 376  *
 377  * Userspace may annotate the updates, the annotates are a
 378  * promise made by the caller that the change is either a copy
 379  * of pixels or a fill of a single color in the region specified.
 380  *
 381  * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
 382  * the number of updated regions are half of num_clips given,
 383  * where the clip rects are paired in src and dst. The width and
 384  * height of each one of the pairs must match.
 385  *
 386  * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
 387  * promises that the region specified of the clip rects is filled
 388  * completely with a single color as given in the color argument.
 389  */
 390
 391 struct drm_mode_fb_dirty_cmd {
 392         __u32 fb_id;
 393         __u32 flags;
 394         __u32 color;
 395         __u32 num_clips;
 396         __u64 clips_ptr;
 397 };
 398
 399 struct drm_mode_mode_cmd {
 400         __u32 connector_id;
 401         struct drm_mode_modeinfo mode;
 402 };
 403
 404 #define DRM_MODE_CURSOR_BO      0x01
 405 #define DRM_MODE_CURSOR_MOVE    0x02
 406 #define DRM_MODE_CURSOR_FLAGS   0x03
 407
 408 /*
 409  * depending on the value in flags different members are used.
 410  *
 411  * CURSOR_BO uses
 412  *    crtc_id
 413  *    width
 414  *    height
 415  *    handle - if 0 turns the cursor off
 416  *
 417  * CURSOR_MOVE uses
 418  *    crtc_id
 419  *    x
 420  *    y
 421  */
 422 struct drm_mode_cursor {
 423         __u32 flags;
 424         __u32 crtc_id;
 425         __s32 x;
 426         __s32 y;
 427         __u32 width;
 428         __u32 height;
 429         /* driver specific handle */
 430         __u32 handle;
 431 };
 432
 433 struct drm_mode_cursor2 {
 434         __u32 flags;
 435         __u32 crtc_id;
 436         __s32 x;
 437         __s32 y;
 438         __u32 width;
 439         __u32 height;
 440         /* driver specific handle */
 441         __u32 handle;
 442         __s32 hot_x;
 443         __s32 hot_y;
 444 };
 445
 446 struct drm_mode_crtc_lut {
 447         __u32 crtc_id;
 448         __u32 gamma_size;
 449
 450         /* pointers to arrays */
 451         __u64 red;
 452         __u64 green;
 453         __u64 blue;
 454 };
 455
 456 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
 457 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
 458 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
 459
 460 /*
 461  * Request a page flip on the specified crtc.
 462  *
 463  * This ioctl will ask KMS to schedule a page flip for the specified
 464  * crtc.  Once any pending rendering targeting the specified fb (as of
 465  * ioctl time) has completed, the crtc will be reprogrammed to display
 466  * that fb after the next vertical refresh.  The ioctl returns
 467  * immediately, but subsequent rendering to the current fb will block
 468  * in the execbuffer ioctl until the page flip happens.  If a page
 469  * flip is already pending as the ioctl is called, EBUSY will be
 470  * returned.
 471  *
 472  * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
 473  * event (see drm.h: struct drm_event_vblank) when the page flip is
 474  * done.  The user_data field passed in with this ioctl will be
 475  * returned as the user_data field in the vblank event struct.
 476  *
 477  * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
 478  * 'as soon as possible', meaning that it not delay waiting for vblank.
 479  * This may cause tearing on the screen.
 480  *
 481  * The reserved field must be zero until we figure out something
 482  * clever to use it for.
 483  */
 484
 485 struct drm_mode_crtc_page_flip {
 486         __u32 crtc_id;
 487         __u32 fb_id;
 488         __u32 flags;
 489         __u32 reserved;
 490         __u64 user_data;
 491 };
 492
 493 /* create a dumb scanout buffer */
 494 struct drm_mode_create_dumb {
 495         uint32_t height;
 496         uint32_t width;
 497         uint32_t bpp;
 498         uint32_t flags;
 499         /* handle, pitch, size will be returned */
 500         uint32_t handle;
 501         uint32_t pitch;
 502         uint64_t size;
 503 };
 504
 505 /* set up for mmap of a dumb scanout buffer */
 506 struct drm_mode_map_dumb {
 507         /** Handle for the object being mapped. */
 508         __u32 handle;
 509         __u32 pad;
 510         /**
 511          * Fake offset to use for subsequent mmap call
 512          *
 513          * This is a fixed-size type for 32/64 compatibility.
 514          */
 515         __u64 offset;
 516 };
 517
 518 struct drm_mode_destroy_dumb {
 519         uint32_t handle;
 520 };
 521
 522 #endif