include/uapi/linux/nvme.h

   1 /*
   2  * Definitions for the NVM Express interface
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef _UAPI_LINUX_NVME_H
  16 #define _UAPI_LINUX_NVME_H
  17
  18 #include <linux/types.h>
  19
  20 struct nvme_id_power_state {
  21         __le16                  max_power;      /* centiwatts */
  22         __u8                    rsvd2;
  23         __u8                    flags;
  24         __le32                  entry_lat;      /* microseconds */
  25         __le32                  exit_lat;       /* microseconds */
  26         __u8                    read_tput;
  27         __u8                    read_lat;
  28         __u8                    write_tput;
  29         __u8                    write_lat;
  30         __le16                  idle_power;
  31         __u8                    idle_scale;
  32         __u8                    rsvd19;
  33         __le16                  active_power;
  34         __u8                    active_work_scale;
  35         __u8                    rsvd23[9];
  36 };
  37
  38 enum {
  39         NVME_PS_FLAGS_MAX_POWER_SCALE   = 1 << 0,
  40         NVME_PS_FLAGS_NON_OP_STATE      = 1 << 1,
  41 };
  42
  43 struct nvme_id_ctrl {
  44         __le16                  vid;
  45         __le16                  ssvid;
  46         char                    sn[20];
  47         char                    mn[40];
  48         char                    fr[8];
  49         __u8                    rab;
  50         __u8                    ieee[3];
  51         __u8                    mic;
  52         __u8                    mdts;
  53         __u16                   cntlid;
  54         __u32                   ver;
  55         __u8                    rsvd84[172];
  56         __le16                  oacs;
  57         __u8                    acl;
  58         __u8                    aerl;
  59         __u8                    frmw;
  60         __u8                    lpa;
  61         __u8                    elpe;
  62         __u8                    npss;
  63         __u8                    avscc;
  64         __u8                    apsta;
  65         __le16                  wctemp;
  66         __le16                  cctemp;
  67         __u8                    rsvd270[242];
  68         __u8                    sqes;
  69         __u8                    cqes;
  70         __u8                    rsvd514[2];
  71         __le32                  nn;
  72         __le16                  oncs;
  73         __le16                  fuses;
  74         __u8                    fna;
  75         __u8                    vwc;
  76         __le16                  awun;
  77         __le16                  awupf;
  78         __u8                    nvscc;
  79         __u8                    rsvd531;
  80         __le16                  acwu;
  81         __u8                    rsvd534[2];
  82         __le32                  sgls;
  83         __u8                    rsvd540[1508];
  84         struct nvme_id_power_state      psd[32];
  85         __u8                    vs[1024];
  86 };
  87
  88 enum {
  89         NVME_CTRL_ONCS_COMPARE                  = 1 << 0,
  90         NVME_CTRL_ONCS_WRITE_UNCORRECTABLE      = 1 << 1,
  91         NVME_CTRL_ONCS_DSM                      = 1 << 2,
  92         NVME_CTRL_VWC_PRESENT                   = 1 << 0,
  93 };
  94
  95 struct nvme_lbaf {
  96         __le16                  ms;
  97         __u8                    ds;
  98         __u8                    rp;
  99 };
 100
 101 struct nvme_id_ns {
 102         __le64                  nsze;
 103         __le64                  ncap;
 104         __le64                  nuse;
 105         __u8                    nsfeat;
 106         __u8                    nlbaf;
 107         __u8                    flbas;
 108         __u8                    mc;
 109         __u8                    dpc;
 110         __u8                    dps;
 111         __u8                    nmic;
 112         __u8                    rescap;
 113         __u8                    fpi;
 114         __u8                    rsvd33;
 115         __le16                  nawun;
 116         __le16                  nawupf;
 117         __le16                  nacwu;
 118         __u8                    rsvd40[80];
 119         __u8                    eui64[8];
 120         struct nvme_lbaf        lbaf[16];
 121         __u8                    rsvd192[192];
 122         __u8                    vs[3712];
 123 };
 124
 125 enum {
 126         NVME_NS_FEAT_THIN       = 1 << 0,
 127         NVME_NS_FLBAS_LBA_MASK  = 0xf,
 128         NVME_NS_FLBAS_META_EXT  = 0x10,
 129         NVME_LBAF_RP_BEST       = 0,
 130         NVME_LBAF_RP_BETTER     = 1,
 131         NVME_LBAF_RP_GOOD       = 2,
 132         NVME_LBAF_RP_DEGRADED   = 3,
 133         NVME_NS_DPC_PI_LAST     = 1 << 4,
 134         NVME_NS_DPC_PI_FIRST    = 1 << 3,
 135         NVME_NS_DPC_PI_TYPE3    = 1 << 2,
 136         NVME_NS_DPC_PI_TYPE2    = 1 << 1,
 137         NVME_NS_DPC_PI_TYPE1    = 1 << 0,
 138         NVME_NS_DPS_PI_FIRST    = 1 << 3,
 139         NVME_NS_DPS_PI_MASK     = 0x7,
 140         NVME_NS_DPS_PI_TYPE1    = 1,
 141         NVME_NS_DPS_PI_TYPE2    = 2,
 142         NVME_NS_DPS_PI_TYPE3    = 3,
 143 };
 144
 145 struct nvme_smart_log {
 146         __u8                    critical_warning;
 147         __u8                    temperature[2];
 148         __u8                    avail_spare;
 149         __u8                    spare_thresh;
 150         __u8                    percent_used;
 151         __u8                    rsvd6[26];
 152         __u8                    data_units_read[16];
 153         __u8                    data_units_written[16];
 154         __u8                    host_reads[16];
 155         __u8                    host_writes[16];
 156         __u8                    ctrl_busy_time[16];
 157         __u8                    power_cycles[16];
 158         __u8                    power_on_hours[16];
 159         __u8                    unsafe_shutdowns[16];
 160         __u8                    media_errors[16];
 161         __u8                    num_err_log_entries[16];
 162         __le32                  warning_temp_time;
 163         __le32                  critical_comp_time;
 164         __le16                  temp_sensor[8];
 165         __u8                    rsvd216[296];
 166 };
 167
 168 enum {
 169         NVME_SMART_CRIT_SPARE           = 1 << 0,
 170         NVME_SMART_CRIT_TEMPERATURE     = 1 << 1,
 171         NVME_SMART_CRIT_RELIABILITY     = 1 << 2,
 172         NVME_SMART_CRIT_MEDIA           = 1 << 3,
 173         NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
 174 };
 175
 176 struct nvme_lba_range_type {
 177         __u8                    type;
 178         __u8                    attributes;
 179         __u8                    rsvd2[14];
 180         __u64                   slba;
 181         __u64                   nlb;
 182         __u8                    guid[16];
 183         __u8                    rsvd48[16];
 184 };
 185
 186 enum {
 187         NVME_LBART_TYPE_FS      = 0x01,
 188         NVME_LBART_TYPE_RAID    = 0x02,
 189         NVME_LBART_TYPE_CACHE   = 0x03,
 190         NVME_LBART_TYPE_SWAP    = 0x04,
 191
 192         NVME_LBART_ATTRIB_TEMP  = 1 << 0,
 193         NVME_LBART_ATTRIB_HIDE  = 1 << 1,
 194 };
 195
 196 struct nvme_reservation_status {
 197         __le32  gen;
 198         __u8    rtype;
 199         __u8    regctl[2];
 200         __u8    resv5[2];
 201         __u8    ptpls;
 202         __u8    resv10[13];
 203         struct {
 204                 __le16  cntlid;
 205                 __u8    rcsts;
 206                 __u8    resv3[5];
 207                 __le64  hostid;
 208                 __le64  rkey;
 209         } regctl_ds[];
 210 };
 211
 212 /* I/O commands */
 213
 214 enum nvme_opcode {
 215         nvme_cmd_flush          = 0x00,
 216         nvme_cmd_write          = 0x01,
 217         nvme_cmd_read           = 0x02,
 218         nvme_cmd_write_uncor    = 0x04,
 219         nvme_cmd_compare        = 0x05,
 220         nvme_cmd_write_zeroes   = 0x08,
 221         nvme_cmd_dsm            = 0x09,
 222         nvme_cmd_resv_register  = 0x0d,
 223         nvme_cmd_resv_report    = 0x0e,
 224         nvme_cmd_resv_acquire   = 0x11,
 225         nvme_cmd_resv_release   = 0x15,
 226 };
 227
 228 struct nvme_common_command {
 229         __u8                    opcode;
 230         __u8                    flags;
 231         __u16                   command_id;
 232         __le32                  nsid;
 233         __le32                  cdw2[2];
 234         __le64                  metadata;
 235         __le64                  prp1;
 236         __le64                  prp2;
 237         __le32                  cdw10[6];
 238 };
 239
 240 struct nvme_rw_command {
 241         __u8                    opcode;
 242         __u8                    flags;
 243         __u16                   command_id;
 244         __le32                  nsid;
 245         __u64                   rsvd2;
 246         __le64                  metadata;
 247         __le64                  prp1;
 248         __le64                  prp2;
 249         __le64                  slba;
 250         __le16                  length;
 251         __le16                  control;
 252         __le32                  dsmgmt;
 253         __le32                  reftag;
 254         __le16                  apptag;
 255         __le16                  appmask;
 256 };
 257
 258 enum {
 259         NVME_RW_LR                      = 1 << 15,
 260         NVME_RW_FUA                     = 1 << 14,
 261         NVME_RW_DSM_FREQ_UNSPEC         = 0,
 262         NVME_RW_DSM_FREQ_TYPICAL        = 1,
 263         NVME_RW_DSM_FREQ_RARE           = 2,
 264         NVME_RW_DSM_FREQ_READS          = 3,
 265         NVME_RW_DSM_FREQ_WRITES         = 4,
 266         NVME_RW_DSM_FREQ_RW             = 5,
 267         NVME_RW_DSM_FREQ_ONCE           = 6,
 268         NVME_RW_DSM_FREQ_PREFETCH       = 7,
 269         NVME_RW_DSM_FREQ_TEMP           = 8,
 270         NVME_RW_DSM_LATENCY_NONE        = 0 << 4,
 271         NVME_RW_DSM_LATENCY_IDLE        = 1 << 4,
 272         NVME_RW_DSM_LATENCY_NORM        = 2 << 4,
 273         NVME_RW_DSM_LATENCY_LOW         = 3 << 4,
 274         NVME_RW_DSM_SEQ_REQ             = 1 << 6,
 275         NVME_RW_DSM_COMPRESSED          = 1 << 7,
 276         NVME_RW_PRINFO_PRCHK_REF        = 1 << 10,
 277         NVME_RW_PRINFO_PRCHK_APP        = 1 << 11,
 278         NVME_RW_PRINFO_PRCHK_GUARD      = 1 << 12,
 279         NVME_RW_PRINFO_PRACT            = 1 << 13,
 280 };
 281
 282 struct nvme_dsm_cmd {
 283         __u8                    opcode;
 284         __u8                    flags;
 285         __u16                   command_id;
 286         __le32                  nsid;
 287         __u64                   rsvd2[2];
 288         __le64                  prp1;
 289         __le64                  prp2;
 290         __le32                  nr;
 291         __le32                  attributes;
 292         __u32                   rsvd12[4];
 293 };
 294
 295 enum {
 296         NVME_DSMGMT_IDR         = 1 << 0,
 297         NVME_DSMGMT_IDW         = 1 << 1,
 298         NVME_DSMGMT_AD          = 1 << 2,
 299 };
 300
 301 struct nvme_dsm_range {
 302         __le32                  cattr;
 303         __le32                  nlb;
 304         __le64                  slba;
 305 };
 306
 307 /* Admin commands */
 308
 309 enum nvme_admin_opcode {
 310         nvme_admin_delete_sq            = 0x00,
 311         nvme_admin_create_sq            = 0x01,
 312         nvme_admin_get_log_page         = 0x02,
 313         nvme_admin_delete_cq            = 0x04,
 314         nvme_admin_create_cq            = 0x05,
 315         nvme_admin_identify             = 0x06,
 316         nvme_admin_abort_cmd            = 0x08,
 317         nvme_admin_set_features         = 0x09,
 318         nvme_admin_get_features         = 0x0a,
 319         nvme_admin_async_event          = 0x0c,
 320         nvme_admin_activate_fw          = 0x10,
 321         nvme_admin_download_fw          = 0x11,
 322         nvme_admin_format_nvm           = 0x80,
 323         nvme_admin_security_send        = 0x81,
 324         nvme_admin_security_recv        = 0x82,
 325 };
 326
 327 enum {
 328         NVME_QUEUE_PHYS_CONTIG  = (1 << 0),
 329         NVME_CQ_IRQ_ENABLED     = (1 << 1),
 330         NVME_SQ_PRIO_URGENT     = (0 << 1),
 331         NVME_SQ_PRIO_HIGH       = (1 << 1),
 332         NVME_SQ_PRIO_MEDIUM     = (2 << 1),
 333         NVME_SQ_PRIO_LOW        = (3 << 1),
 334         NVME_FEAT_ARBITRATION   = 0x01,
 335         NVME_FEAT_POWER_MGMT    = 0x02,
 336         NVME_FEAT_LBA_RANGE     = 0x03,
 337         NVME_FEAT_TEMP_THRESH   = 0x04,
 338         NVME_FEAT_ERR_RECOVERY  = 0x05,
 339         NVME_FEAT_VOLATILE_WC   = 0x06,
 340         NVME_FEAT_NUM_QUEUES    = 0x07,
 341         NVME_FEAT_IRQ_COALESCE  = 0x08,
 342         NVME_FEAT_IRQ_CONFIG    = 0x09,
 343         NVME_FEAT_WRITE_ATOMIC  = 0x0a,
 344         NVME_FEAT_ASYNC_EVENT   = 0x0b,
 345         NVME_FEAT_AUTO_PST      = 0x0c,
 346         NVME_FEAT_SW_PROGRESS   = 0x80,
 347         NVME_FEAT_HOST_ID       = 0x81,
 348         NVME_FEAT_RESV_MASK     = 0x82,
 349         NVME_FEAT_RESV_PERSIST  = 0x83,
 350         NVME_LOG_ERROR          = 0x01,
 351         NVME_LOG_SMART          = 0x02,
 352         NVME_LOG_FW_SLOT        = 0x03,
 353         NVME_LOG_RESERVATION    = 0x80,
 354         NVME_FWACT_REPL         = (0 << 3),
 355         NVME_FWACT_REPL_ACTV    = (1 << 3),
 356         NVME_FWACT_ACTV         = (2 << 3),
 357 };
 358
 359 struct nvme_identify {
 360         __u8                    opcode;
 361         __u8                    flags;
 362         __u16                   command_id;
 363         __le32                  nsid;
 364         __u64                   rsvd2[2];
 365         __le64                  prp1;
 366         __le64                  prp2;
 367         __le32                  cns;
 368         __u32                   rsvd11[5];
 369 };
 370
 371 struct nvme_features {
 372         __u8                    opcode;
 373         __u8                    flags;
 374         __u16                   command_id;
 375         __le32                  nsid;
 376         __u64                   rsvd2[2];
 377         __le64                  prp1;
 378         __le64                  prp2;
 379         __le32                  fid;
 380         __le32                  dword11;
 381         __u32                   rsvd12[4];
 382 };
 383
 384 struct nvme_create_cq {
 385         __u8                    opcode;
 386         __u8                    flags;
 387         __u16                   command_id;
 388         __u32                   rsvd1[5];
 389         __le64                  prp1;
 390         __u64                   rsvd8;
 391         __le16                  cqid;
 392         __le16                  qsize;
 393         __le16                  cq_flags;
 394         __le16                  irq_vector;
 395         __u32                   rsvd12[4];
 396 };
 397
 398 struct nvme_create_sq {
 399         __u8                    opcode;
 400         __u8                    flags;
 401         __u16                   command_id;
 402         __u32                   rsvd1[5];
 403         __le64                  prp1;
 404         __u64                   rsvd8;
 405         __le16                  sqid;
 406         __le16                  qsize;
 407         __le16                  sq_flags;
 408         __le16                  cqid;
 409         __u32                   rsvd12[4];
 410 };
 411
 412 struct nvme_delete_queue {
 413         __u8                    opcode;
 414         __u8                    flags;
 415         __u16                   command_id;
 416         __u32                   rsvd1[9];
 417         __le16                  qid;
 418         __u16                   rsvd10;
 419         __u32                   rsvd11[5];
 420 };
 421
 422 struct nvme_abort_cmd {
 423         __u8                    opcode;
 424         __u8                    flags;
 425         __u16                   command_id;
 426         __u32                   rsvd1[9];
 427         __le16                  sqid;
 428         __u16                   cid;
 429         __u32                   rsvd11[5];
 430 };
 431
 432 struct nvme_download_firmware {
 433         __u8                    opcode;
 434         __u8                    flags;
 435         __u16                   command_id;
 436         __u32                   rsvd1[5];
 437         __le64                  prp1;
 438         __le64                  prp2;
 439         __le32                  numd;
 440         __le32                  offset;
 441         __u32                   rsvd12[4];
 442 };
 443
 444 struct nvme_format_cmd {
 445         __u8                    opcode;
 446         __u8                    flags;
 447         __u16                   command_id;
 448         __le32                  nsid;
 449         __u64                   rsvd2[4];
 450         __le32                  cdw10;
 451         __u32                   rsvd11[5];
 452 };
 453
 454 struct nvme_command {
 455         union {
 456                 struct nvme_common_command common;
 457                 struct nvme_rw_command rw;
 458                 struct nvme_identify identify;
 459                 struct nvme_features features;
 460                 struct nvme_create_cq create_cq;
 461                 struct nvme_create_sq create_sq;
 462                 struct nvme_delete_queue delete_queue;
 463                 struct nvme_download_firmware dlfw;
 464                 struct nvme_format_cmd format;
 465                 struct nvme_dsm_cmd dsm;
 466                 struct nvme_abort_cmd abort;
 467         };
 468 };
 469
 470 enum {
 471         NVME_SC_SUCCESS                 = 0x0,
 472         NVME_SC_INVALID_OPCODE          = 0x1,
 473         NVME_SC_INVALID_FIELD           = 0x2,
 474         NVME_SC_CMDID_CONFLICT          = 0x3,
 475         NVME_SC_DATA_XFER_ERROR         = 0x4,
 476         NVME_SC_POWER_LOSS              = 0x5,
 477         NVME_SC_INTERNAL                = 0x6,
 478         NVME_SC_ABORT_REQ               = 0x7,
 479         NVME_SC_ABORT_QUEUE             = 0x8,
 480         NVME_SC_FUSED_FAIL              = 0x9,
 481         NVME_SC_FUSED_MISSING           = 0xa,
 482         NVME_SC_INVALID_NS              = 0xb,
 483         NVME_SC_CMD_SEQ_ERROR           = 0xc,
 484         NVME_SC_SGL_INVALID_LAST        = 0xd,
 485         NVME_SC_SGL_INVALID_COUNT       = 0xe,
 486         NVME_SC_SGL_INVALID_DATA        = 0xf,
 487         NVME_SC_SGL_INVALID_METADATA    = 0x10,
 488         NVME_SC_SGL_INVALID_TYPE        = 0x11,
 489         NVME_SC_LBA_RANGE               = 0x80,
 490         NVME_SC_CAP_EXCEEDED            = 0x81,
 491         NVME_SC_NS_NOT_READY            = 0x82,
 492         NVME_SC_RESERVATION_CONFLICT    = 0x83,
 493         NVME_SC_CQ_INVALID              = 0x100,
 494         NVME_SC_QID_INVALID             = 0x101,
 495         NVME_SC_QUEUE_SIZE              = 0x102,
 496         NVME_SC_ABORT_LIMIT             = 0x103,
 497         NVME_SC_ABORT_MISSING           = 0x104,
 498         NVME_SC_ASYNC_LIMIT             = 0x105,
 499         NVME_SC_FIRMWARE_SLOT           = 0x106,
 500         NVME_SC_FIRMWARE_IMAGE          = 0x107,
 501         NVME_SC_INVALID_VECTOR          = 0x108,
 502         NVME_SC_INVALID_LOG_PAGE        = 0x109,
 503         NVME_SC_INVALID_FORMAT          = 0x10a,
 504         NVME_SC_FIRMWARE_NEEDS_RESET    = 0x10b,
 505         NVME_SC_INVALID_QUEUE           = 0x10c,
 506         NVME_SC_FEATURE_NOT_SAVEABLE    = 0x10d,
 507         NVME_SC_FEATURE_NOT_CHANGEABLE  = 0x10e,
 508         NVME_SC_FEATURE_NOT_PER_NS      = 0x10f,
 509         NVME_SC_FW_NEEDS_RESET_SUBSYS   = 0x110,
 510         NVME_SC_BAD_ATTRIBUTES          = 0x180,
 511         NVME_SC_INVALID_PI              = 0x181,
 512         NVME_SC_READ_ONLY               = 0x182,
 513         NVME_SC_WRITE_FAULT             = 0x280,
 514         NVME_SC_READ_ERROR              = 0x281,
 515         NVME_SC_GUARD_CHECK             = 0x282,
 516         NVME_SC_APPTAG_CHECK            = 0x283,
 517         NVME_SC_REFTAG_CHECK            = 0x284,
 518         NVME_SC_COMPARE_FAILED          = 0x285,
 519         NVME_SC_ACCESS_DENIED           = 0x286,
 520         NVME_SC_DNR                     = 0x4000,
 521 };
 522
 523 struct nvme_completion {
 524         __le32  result;         /* Used by admin commands to return data */
 525         __u32   rsvd;
 526         __le16  sq_head;        /* how much of this queue may be reclaimed */
 527         __le16  sq_id;          /* submission queue that generated this entry */
 528         __u16   command_id;     /* of the command which completed */
 529         __le16  status;         /* did the command fail, and if so, why? */
 530 };
 531
 532 struct nvme_user_io {
 533         __u8    opcode;
 534         __u8    flags;
 535         __u16   control;
 536         __u16   nblocks;
 537         __u16   rsvd;
 538         __u64   metadata;
 539         __u64   addr;
 540         __u64   slba;
 541         __u32   dsmgmt;
 542         __u32   reftag;
 543         __u16   apptag;
 544         __u16   appmask;
 545 };
 546
 547 struct nvme_passthru_cmd {
 548         __u8    opcode;
 549         __u8    flags;
 550         __u16   rsvd1;
 551         __u32   nsid;
 552         __u32   cdw2;
 553         __u32   cdw3;
 554         __u64   metadata;
 555         __u64   addr;
 556         __u32   metadata_len;
 557         __u32   data_len;
 558         __u32   cdw10;
 559         __u32   cdw11;
 560         __u32   cdw12;
 561         __u32   cdw13;
 562         __u32   cdw14;
 563         __u32   cdw15;
 564         __u32   timeout_ms;
 565         __u32   result;
 566 };
 567
 568 #define nvme_admin_cmd nvme_passthru_cmd
 569
 570 #define NVME_IOCTL_ID           _IO('N', 0x40)
 571 #define NVME_IOCTL_ADMIN_CMD    _IOWR('N', 0x41, struct nvme_admin_cmd)
 572 #define NVME_IOCTL_SUBMIT_IO    _IOW('N', 0x42, struct nvme_user_io)
 573 #define NVME_IOCTL_IO_CMD       _IOWR('N', 0x43, struct nvme_passthru_cmd)
 574
 575 #endif /* _UAPI_LINUX_NVME_H */