include/uapi/linux/nvme.h

   1 /*
   2  * Definitions for the NVM Express interface
   3  * Copyright (c) 2011-2013, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  */
  18
  19 #ifndef _UAPI_LINUX_NVME_H
  20 #define _UAPI_LINUX_NVME_H
  21
  22 #include <linux/types.h>
  23
  24 struct nvme_id_power_state {
  25         __le16                  max_power;      /* centiwatts */
  26         __u8                    rsvd2;
  27         __u8                    flags;
  28         __le32                  entry_lat;      /* microseconds */
  29         __le32                  exit_lat;       /* microseconds */
  30         __u8                    read_tput;
  31         __u8                    read_lat;
  32         __u8                    write_tput;
  33         __u8                    write_lat;
  34         __u8                    rsvd16[16];
  35 };
  36
  37 enum {
  38         NVME_PS_FLAGS_MAX_POWER_SCALE   = 1 << 0,
  39         NVME_PS_FLAGS_NON_OP_STATE      = 1 << 1,
  40 };
  41
  42 struct nvme_id_ctrl {
  43         __le16                  vid;
  44         __le16                  ssvid;
  45         char                    sn[20];
  46         char                    mn[40];
  47         char                    fr[8];
  48         __u8                    rab;
  49         __u8                    ieee[3];
  50         __u8                    mic;
  51         __u8                    mdts;
  52         __u8                    rsvd78[178];
  53         __le16                  oacs;
  54         __u8                    acl;
  55         __u8                    aerl;
  56         __u8                    frmw;
  57         __u8                    lpa;
  58         __u8                    elpe;
  59         __u8                    npss;
  60         __u8                    rsvd264[248];
  61         __u8                    sqes;
  62         __u8                    cqes;
  63         __u8                    rsvd514[2];
  64         __le32                  nn;
  65         __le16                  oncs;
  66         __le16                  fuses;
  67         __u8                    fna;
  68         __u8                    vwc;
  69         __le16                  awun;
  70         __le16                  awupf;
  71         __u8                    rsvd530[1518];
  72         struct nvme_id_power_state      psd[32];
  73         __u8                    vs[1024];
  74 };
  75
  76 enum {
  77         NVME_CTRL_ONCS_COMPARE                  = 1 << 0,
  78         NVME_CTRL_ONCS_WRITE_UNCORRECTABLE      = 1 << 1,
  79         NVME_CTRL_ONCS_DSM                      = 1 << 2,
  80 };
  81
  82 struct nvme_lbaf {
  83         __le16                  ms;
  84         __u8                    ds;
  85         __u8                    rp;
  86 };
  87
  88 struct nvme_id_ns {
  89         __le64                  nsze;
  90         __le64                  ncap;
  91         __le64                  nuse;
  92         __u8                    nsfeat;
  93         __u8                    nlbaf;
  94         __u8                    flbas;
  95         __u8                    mc;
  96         __u8                    dpc;
  97         __u8                    dps;
  98         __u8                    rsvd30[98];
  99         struct nvme_lbaf        lbaf[16];
 100         __u8                    rsvd192[192];
 101         __u8                    vs[3712];
 102 };
 103
 104 enum {
 105         NVME_NS_FEAT_THIN       = 1 << 0,
 106         NVME_LBAF_RP_BEST       = 0,
 107         NVME_LBAF_RP_BETTER     = 1,
 108         NVME_LBAF_RP_GOOD       = 2,
 109         NVME_LBAF_RP_DEGRADED   = 3,
 110 };
 111
 112 struct nvme_smart_log {
 113         __u8                    critical_warning;
 114         __u8                    temperature[2];
 115         __u8                    avail_spare;
 116         __u8                    spare_thresh;
 117         __u8                    percent_used;
 118         __u8                    rsvd6[26];
 119         __u8                    data_units_read[16];
 120         __u8                    data_units_written[16];
 121         __u8                    host_reads[16];
 122         __u8                    host_writes[16];
 123         __u8                    ctrl_busy_time[16];
 124         __u8                    power_cycles[16];
 125         __u8                    power_on_hours[16];
 126         __u8                    unsafe_shutdowns[16];
 127         __u8                    media_errors[16];
 128         __u8                    num_err_log_entries[16];
 129         __u8                    rsvd192[320];
 130 };
 131
 132 enum {
 133         NVME_SMART_CRIT_SPARE           = 1 << 0,
 134         NVME_SMART_CRIT_TEMPERATURE     = 1 << 1,
 135         NVME_SMART_CRIT_RELIABILITY     = 1 << 2,
 136         NVME_SMART_CRIT_MEDIA           = 1 << 3,
 137         NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
 138 };
 139
 140 struct nvme_lba_range_type {
 141         __u8                    type;
 142         __u8                    attributes;
 143         __u8                    rsvd2[14];
 144         __u64                   slba;
 145         __u64                   nlb;
 146         __u8                    guid[16];
 147         __u8                    rsvd48[16];
 148 };
 149
 150 enum {
 151         NVME_LBART_TYPE_FS      = 0x01,
 152         NVME_LBART_TYPE_RAID    = 0x02,
 153         NVME_LBART_TYPE_CACHE   = 0x03,
 154         NVME_LBART_TYPE_SWAP    = 0x04,
 155
 156         NVME_LBART_ATTRIB_TEMP  = 1 << 0,
 157         NVME_LBART_ATTRIB_HIDE  = 1 << 1,
 158 };
 159
 160 /* I/O commands */
 161
 162 enum nvme_opcode {
 163         nvme_cmd_flush          = 0x00,
 164         nvme_cmd_write          = 0x01,
 165         nvme_cmd_read           = 0x02,
 166         nvme_cmd_write_uncor    = 0x04,
 167         nvme_cmd_compare        = 0x05,
 168         nvme_cmd_dsm            = 0x09,
 169 };
 170
 171 struct nvme_common_command {
 172         __u8                    opcode;
 173         __u8                    flags;
 174         __u16                   command_id;
 175         __le32                  nsid;
 176         __le32                  cdw2[2];
 177         __le64                  metadata;
 178         __le64                  prp1;
 179         __le64                  prp2;
 180         __le32                  cdw10[6];
 181 };
 182
 183 struct nvme_rw_command {
 184         __u8                    opcode;
 185         __u8                    flags;
 186         __u16                   command_id;
 187         __le32                  nsid;
 188         __u64                   rsvd2;
 189         __le64                  metadata;
 190         __le64                  prp1;
 191         __le64                  prp2;
 192         __le64                  slba;
 193         __le16                  length;
 194         __le16                  control;
 195         __le32                  dsmgmt;
 196         __le32                  reftag;
 197         __le16                  apptag;
 198         __le16                  appmask;
 199 };
 200
 201 enum {
 202         NVME_RW_LR                      = 1 << 15,
 203         NVME_RW_FUA                     = 1 << 14,
 204         NVME_RW_DSM_FREQ_UNSPEC         = 0,
 205         NVME_RW_DSM_FREQ_TYPICAL        = 1,
 206         NVME_RW_DSM_FREQ_RARE           = 2,
 207         NVME_RW_DSM_FREQ_READS          = 3,
 208         NVME_RW_DSM_FREQ_WRITES         = 4,
 209         NVME_RW_DSM_FREQ_RW             = 5,
 210         NVME_RW_DSM_FREQ_ONCE           = 6,
 211         NVME_RW_DSM_FREQ_PREFETCH       = 7,
 212         NVME_RW_DSM_FREQ_TEMP           = 8,
 213         NVME_RW_DSM_LATENCY_NONE        = 0 << 4,
 214         NVME_RW_DSM_LATENCY_IDLE        = 1 << 4,
 215         NVME_RW_DSM_LATENCY_NORM        = 2 << 4,
 216         NVME_RW_DSM_LATENCY_LOW         = 3 << 4,
 217         NVME_RW_DSM_SEQ_REQ             = 1 << 6,
 218         NVME_RW_DSM_COMPRESSED          = 1 << 7,
 219 };
 220
 221 struct nvme_dsm_cmd {
 222         __u8                    opcode;
 223         __u8                    flags;
 224         __u16                   command_id;
 225         __le32                  nsid;
 226         __u64                   rsvd2[2];
 227         __le64                  prp1;
 228         __le64                  prp2;
 229         __le32                  nr;
 230         __le32                  attributes;
 231         __u32                   rsvd12[4];
 232 };
 233
 234 enum {
 235         NVME_DSMGMT_IDR         = 1 << 0,
 236         NVME_DSMGMT_IDW         = 1 << 1,
 237         NVME_DSMGMT_AD          = 1 << 2,
 238 };
 239
 240 struct nvme_dsm_range {
 241         __le32                  cattr;
 242         __le32                  nlb;
 243         __le64                  slba;
 244 };
 245
 246 /* Admin commands */
 247
 248 enum nvme_admin_opcode {
 249         nvme_admin_delete_sq            = 0x00,
 250         nvme_admin_create_sq            = 0x01,
 251         nvme_admin_get_log_page         = 0x02,
 252         nvme_admin_delete_cq            = 0x04,
 253         nvme_admin_create_cq            = 0x05,
 254         nvme_admin_identify             = 0x06,
 255         nvme_admin_abort_cmd            = 0x08,
 256         nvme_admin_set_features         = 0x09,
 257         nvme_admin_get_features         = 0x0a,
 258         nvme_admin_async_event          = 0x0c,
 259         nvme_admin_activate_fw          = 0x10,
 260         nvme_admin_download_fw          = 0x11,
 261         nvme_admin_format_nvm           = 0x80,
 262         nvme_admin_security_send        = 0x81,
 263         nvme_admin_security_recv        = 0x82,
 264 };
 265
 266 enum {
 267         NVME_QUEUE_PHYS_CONTIG  = (1 << 0),
 268         NVME_CQ_IRQ_ENABLED     = (1 << 1),
 269         NVME_SQ_PRIO_URGENT     = (0 << 1),
 270         NVME_SQ_PRIO_HIGH       = (1 << 1),
 271         NVME_SQ_PRIO_MEDIUM     = (2 << 1),
 272         NVME_SQ_PRIO_LOW        = (3 << 1),
 273         NVME_FEAT_ARBITRATION   = 0x01,
 274         NVME_FEAT_POWER_MGMT    = 0x02,
 275         NVME_FEAT_LBA_RANGE     = 0x03,
 276         NVME_FEAT_TEMP_THRESH   = 0x04,
 277         NVME_FEAT_ERR_RECOVERY  = 0x05,
 278         NVME_FEAT_VOLATILE_WC   = 0x06,
 279         NVME_FEAT_NUM_QUEUES    = 0x07,
 280         NVME_FEAT_IRQ_COALESCE  = 0x08,
 281         NVME_FEAT_IRQ_CONFIG    = 0x09,
 282         NVME_FEAT_WRITE_ATOMIC  = 0x0a,
 283         NVME_FEAT_ASYNC_EVENT   = 0x0b,
 284         NVME_FEAT_SW_PROGRESS   = 0x0c,
 285         NVME_FWACT_REPL         = (0 << 3),
 286         NVME_FWACT_REPL_ACTV    = (1 << 3),
 287         NVME_FWACT_ACTV         = (2 << 3),
 288 };
 289
 290 struct nvme_identify {
 291         __u8                    opcode;
 292         __u8                    flags;
 293         __u16                   command_id;
 294         __le32                  nsid;
 295         __u64                   rsvd2[2];
 296         __le64                  prp1;
 297         __le64                  prp2;
 298         __le32                  cns;
 299         __u32                   rsvd11[5];
 300 };
 301
 302 struct nvme_features {
 303         __u8                    opcode;
 304         __u8                    flags;
 305         __u16                   command_id;
 306         __le32                  nsid;
 307         __u64                   rsvd2[2];
 308         __le64                  prp1;
 309         __le64                  prp2;
 310         __le32                  fid;
 311         __le32                  dword11;
 312         __u32                   rsvd12[4];
 313 };
 314
 315 struct nvme_create_cq {
 316         __u8                    opcode;
 317         __u8                    flags;
 318         __u16                   command_id;
 319         __u32                   rsvd1[5];
 320         __le64                  prp1;
 321         __u64                   rsvd8;
 322         __le16                  cqid;
 323         __le16                  qsize;
 324         __le16                  cq_flags;
 325         __le16                  irq_vector;
 326         __u32                   rsvd12[4];
 327 };
 328
 329 struct nvme_create_sq {
 330         __u8                    opcode;
 331         __u8                    flags;
 332         __u16                   command_id;
 333         __u32                   rsvd1[5];
 334         __le64                  prp1;
 335         __u64                   rsvd8;
 336         __le16                  sqid;
 337         __le16                  qsize;
 338         __le16                  sq_flags;
 339         __le16                  cqid;
 340         __u32                   rsvd12[4];
 341 };
 342
 343 struct nvme_delete_queue {
 344         __u8                    opcode;
 345         __u8                    flags;
 346         __u16                   command_id;
 347         __u32                   rsvd1[9];
 348         __le16                  qid;
 349         __u16                   rsvd10;
 350         __u32                   rsvd11[5];
 351 };
 352
 353 struct nvme_abort_cmd {
 354         __u8                    opcode;
 355         __u8                    flags;
 356         __u16                   command_id;
 357         __u32                   rsvd1[9];
 358         __le16                  sqid;
 359         __u16                   cid;
 360         __u32                   rsvd11[5];
 361 };
 362
 363 struct nvme_download_firmware {
 364         __u8                    opcode;
 365         __u8                    flags;
 366         __u16                   command_id;
 367         __u32                   rsvd1[5];
 368         __le64                  prp1;
 369         __le64                  prp2;
 370         __le32                  numd;
 371         __le32                  offset;
 372         __u32                   rsvd12[4];
 373 };
 374
 375 struct nvme_format_cmd {
 376         __u8                    opcode;
 377         __u8                    flags;
 378         __u16                   command_id;
 379         __le32                  nsid;
 380         __u64                   rsvd2[4];
 381         __le32                  cdw10;
 382         __u32                   rsvd11[5];
 383 };
 384
 385 struct nvme_command {
 386         union {
 387                 struct nvme_common_command common;
 388                 struct nvme_rw_command rw;
 389                 struct nvme_identify identify;
 390                 struct nvme_features features;
 391                 struct nvme_create_cq create_cq;
 392                 struct nvme_create_sq create_sq;
 393                 struct nvme_delete_queue delete_queue;
 394                 struct nvme_download_firmware dlfw;
 395                 struct nvme_format_cmd format;
 396                 struct nvme_dsm_cmd dsm;
 397                 struct nvme_abort_cmd abort;
 398         };
 399 };
 400
 401 enum {
 402         NVME_SC_SUCCESS                 = 0x0,
 403         NVME_SC_INVALID_OPCODE          = 0x1,
 404         NVME_SC_INVALID_FIELD           = 0x2,
 405         NVME_SC_CMDID_CONFLICT          = 0x3,
 406         NVME_SC_DATA_XFER_ERROR         = 0x4,
 407         NVME_SC_POWER_LOSS              = 0x5,
 408         NVME_SC_INTERNAL                = 0x6,
 409         NVME_SC_ABORT_REQ               = 0x7,
 410         NVME_SC_ABORT_QUEUE             = 0x8,
 411         NVME_SC_FUSED_FAIL              = 0x9,
 412         NVME_SC_FUSED_MISSING           = 0xa,
 413         NVME_SC_INVALID_NS              = 0xb,
 414         NVME_SC_CMD_SEQ_ERROR           = 0xc,
 415         NVME_SC_LBA_RANGE               = 0x80,
 416         NVME_SC_CAP_EXCEEDED            = 0x81,
 417         NVME_SC_NS_NOT_READY            = 0x82,
 418         NVME_SC_CQ_INVALID              = 0x100,
 419         NVME_SC_QID_INVALID             = 0x101,
 420         NVME_SC_QUEUE_SIZE              = 0x102,
 421         NVME_SC_ABORT_LIMIT             = 0x103,
 422         NVME_SC_ABORT_MISSING           = 0x104,
 423         NVME_SC_ASYNC_LIMIT             = 0x105,
 424         NVME_SC_FIRMWARE_SLOT           = 0x106,
 425         NVME_SC_FIRMWARE_IMAGE          = 0x107,
 426         NVME_SC_INVALID_VECTOR          = 0x108,
 427         NVME_SC_INVALID_LOG_PAGE        = 0x109,
 428         NVME_SC_INVALID_FORMAT          = 0x10a,
 429         NVME_SC_BAD_ATTRIBUTES          = 0x180,
 430         NVME_SC_WRITE_FAULT             = 0x280,
 431         NVME_SC_READ_ERROR              = 0x281,
 432         NVME_SC_GUARD_CHECK             = 0x282,
 433         NVME_SC_APPTAG_CHECK            = 0x283,
 434         NVME_SC_REFTAG_CHECK            = 0x284,
 435         NVME_SC_COMPARE_FAILED          = 0x285,
 436         NVME_SC_ACCESS_DENIED           = 0x286,
 437 };
 438
 439 struct nvme_completion {
 440         __le32  result;         /* Used by admin commands to return data */
 441         __u32   rsvd;
 442         __le16  sq_head;        /* how much of this queue may be reclaimed */
 443         __le16  sq_id;          /* submission queue that generated this entry */
 444         __u16   command_id;     /* of the command which completed */
 445         __le16  status;         /* did the command fail, and if so, why? */
 446 };
 447
 448 struct nvme_user_io {
 449         __u8    opcode;
 450         __u8    flags;
 451         __u16   control;
 452         __u16   nblocks;
 453         __u16   rsvd;
 454         __u64   metadata;
 455         __u64   addr;
 456         __u64   slba;
 457         __u32   dsmgmt;
 458         __u32   reftag;
 459         __u16   apptag;
 460         __u16   appmask;
 461 };
 462
 463 struct nvme_admin_cmd {
 464         __u8    opcode;
 465         __u8    flags;
 466         __u16   rsvd1;
 467         __u32   nsid;
 468         __u32   cdw2;
 469         __u32   cdw3;
 470         __u64   metadata;
 471         __u64   addr;
 472         __u32   metadata_len;
 473         __u32   data_len;
 474         __u32   cdw10;
 475         __u32   cdw11;
 476         __u32   cdw12;
 477         __u32   cdw13;
 478         __u32   cdw14;
 479         __u32   cdw15;
 480         __u32   timeout_ms;
 481         __u32   result;
 482 };
 483
 484 #define NVME_IOCTL_ID           _IO('N', 0x40)
 485 #define NVME_IOCTL_ADMIN_CMD    _IOWR('N', 0x41, struct nvme_admin_cmd)
 486 #define NVME_IOCTL_SUBMIT_IO    _IOW('N', 0x42, struct nvme_user_io)
 487
 488 #endif /* _UAPI_LINUX_NVME_H */