4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
8 * Data type definitions, declarations, prototypes.
10 * Started by: Thomas Gleixner and Ingo Molnar
12 * For licencing details see kernel-base/COPYING
14 #ifndef _UAPI_LINUX_PERF_EVENT_H
15 #define _UAPI_LINUX_PERF_EVENT_H
17 #include <linux/types.h>
18 #include <linux/ioctl.h>
19 #include <asm/byteorder.h>
22 * User-space ABI bits:
29 PERF_TYPE_HARDWARE
= 0,
30 PERF_TYPE_SOFTWARE
= 1,
31 PERF_TYPE_TRACEPOINT
= 2,
32 PERF_TYPE_HW_CACHE
= 3,
34 PERF_TYPE_BREAKPOINT
= 5,
36 PERF_TYPE_MAX
, /* non-ABI */
40 * Generalized performance event event_id types, used by the
41 * attr.event_id parameter of the sys_perf_event_open()
46 * Common hardware events, generalized by the kernel:
48 PERF_COUNT_HW_CPU_CYCLES
= 0,
49 PERF_COUNT_HW_INSTRUCTIONS
= 1,
50 PERF_COUNT_HW_CACHE_REFERENCES
= 2,
51 PERF_COUNT_HW_CACHE_MISSES
= 3,
52 PERF_COUNT_HW_BRANCH_INSTRUCTIONS
= 4,
53 PERF_COUNT_HW_BRANCH_MISSES
= 5,
54 PERF_COUNT_HW_BUS_CYCLES
= 6,
55 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
= 7,
56 PERF_COUNT_HW_STALLED_CYCLES_BACKEND
= 8,
57 PERF_COUNT_HW_REF_CPU_CYCLES
= 9,
59 PERF_COUNT_HW_MAX
, /* non-ABI */
63 * Generalized hardware cache events:
65 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
66 * { read, write, prefetch } x
67 * { accesses, misses }
69 enum perf_hw_cache_id
{
70 PERF_COUNT_HW_CACHE_L1D
= 0,
71 PERF_COUNT_HW_CACHE_L1I
= 1,
72 PERF_COUNT_HW_CACHE_LL
= 2,
73 PERF_COUNT_HW_CACHE_DTLB
= 3,
74 PERF_COUNT_HW_CACHE_ITLB
= 4,
75 PERF_COUNT_HW_CACHE_BPU
= 5,
76 PERF_COUNT_HW_CACHE_NODE
= 6,
78 PERF_COUNT_HW_CACHE_MAX
, /* non-ABI */
81 enum perf_hw_cache_op_id
{
82 PERF_COUNT_HW_CACHE_OP_READ
= 0,
83 PERF_COUNT_HW_CACHE_OP_WRITE
= 1,
84 PERF_COUNT_HW_CACHE_OP_PREFETCH
= 2,
86 PERF_COUNT_HW_CACHE_OP_MAX
, /* non-ABI */
89 enum perf_hw_cache_op_result_id
{
90 PERF_COUNT_HW_CACHE_RESULT_ACCESS
= 0,
91 PERF_COUNT_HW_CACHE_RESULT_MISS
= 1,
93 PERF_COUNT_HW_CACHE_RESULT_MAX
, /* non-ABI */
97 * Special "software" events provided by the kernel, even if the hardware
98 * does not support performance events. These events measure various
99 * physical and sw events of the kernel (and allow the profiling of them as
103 PERF_COUNT_SW_CPU_CLOCK
= 0,
104 PERF_COUNT_SW_TASK_CLOCK
= 1,
105 PERF_COUNT_SW_PAGE_FAULTS
= 2,
106 PERF_COUNT_SW_CONTEXT_SWITCHES
= 3,
107 PERF_COUNT_SW_CPU_MIGRATIONS
= 4,
108 PERF_COUNT_SW_PAGE_FAULTS_MIN
= 5,
109 PERF_COUNT_SW_PAGE_FAULTS_MAJ
= 6,
110 PERF_COUNT_SW_ALIGNMENT_FAULTS
= 7,
111 PERF_COUNT_SW_EMULATION_FAULTS
= 8,
113 PERF_COUNT_SW_MAX
, /* non-ABI */
117 * Bits that can be set in attr.sample_type to request information
118 * in the overflow packets.
120 enum perf_event_sample_format
{
121 PERF_SAMPLE_IP
= 1U << 0,
122 PERF_SAMPLE_TID
= 1U << 1,
123 PERF_SAMPLE_TIME
= 1U << 2,
124 PERF_SAMPLE_ADDR
= 1U << 3,
125 PERF_SAMPLE_READ
= 1U << 4,
126 PERF_SAMPLE_CALLCHAIN
= 1U << 5,
127 PERF_SAMPLE_ID
= 1U << 6,
128 PERF_SAMPLE_CPU
= 1U << 7,
129 PERF_SAMPLE_PERIOD
= 1U << 8,
130 PERF_SAMPLE_STREAM_ID
= 1U << 9,
131 PERF_SAMPLE_RAW
= 1U << 10,
132 PERF_SAMPLE_BRANCH_STACK
= 1U << 11,
133 PERF_SAMPLE_REGS_USER
= 1U << 12,
134 PERF_SAMPLE_STACK_USER
= 1U << 13,
135 PERF_SAMPLE_WEIGHT
= 1U << 14,
136 PERF_SAMPLE_DATA_SRC
= 1U << 15,
138 PERF_SAMPLE_MAX
= 1U << 16, /* non-ABI */
142 * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
144 * If the user does not pass priv level information via branch_sample_type,
145 * the kernel uses the event's priv level. Branch and event priv levels do
146 * not have to match. Branch priv level is checked for permissions.
148 * The branch types can be combined, however BRANCH_ANY covers all types
149 * of branches and therefore it supersedes all the other types.
151 enum perf_branch_sample_type
{
152 PERF_SAMPLE_BRANCH_USER
= 1U << 0, /* user branches */
153 PERF_SAMPLE_BRANCH_KERNEL
= 1U << 1, /* kernel branches */
154 PERF_SAMPLE_BRANCH_HV
= 1U << 2, /* hypervisor branches */
156 PERF_SAMPLE_BRANCH_ANY
= 1U << 3, /* any branch types */
157 PERF_SAMPLE_BRANCH_ANY_CALL
= 1U << 4, /* any call branch */
158 PERF_SAMPLE_BRANCH_ANY_RETURN
= 1U << 5, /* any return branch */
159 PERF_SAMPLE_BRANCH_IND_CALL
= 1U << 6, /* indirect calls */
160 PERF_SAMPLE_BRANCH_ABORT_TX
= 1U << 7, /* transaction aborts */
161 PERF_SAMPLE_BRANCH_IN_TX
= 1U << 8, /* in transaction */
162 PERF_SAMPLE_BRANCH_NO_TX
= 1U << 9, /* not in transaction */
164 PERF_SAMPLE_BRANCH_MAX
= 1U << 10, /* non-ABI */
167 #define PERF_SAMPLE_BRANCH_PLM_ALL \
168 (PERF_SAMPLE_BRANCH_USER|\
169 PERF_SAMPLE_BRANCH_KERNEL|\
170 PERF_SAMPLE_BRANCH_HV)
173 * Values to determine ABI of the registers dump.
175 enum perf_sample_regs_abi
{
176 PERF_SAMPLE_REGS_ABI_NONE
= 0,
177 PERF_SAMPLE_REGS_ABI_32
= 1,
178 PERF_SAMPLE_REGS_ABI_64
= 2,
182 * The format of the data returned by read() on a perf event fd,
183 * as specified by attr.read_format:
185 * struct read_format {
187 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
188 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
189 * { u64 id; } && PERF_FORMAT_ID
190 * } && !PERF_FORMAT_GROUP
193 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
194 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
196 * { u64 id; } && PERF_FORMAT_ID
198 * } && PERF_FORMAT_GROUP
201 enum perf_event_read_format
{
202 PERF_FORMAT_TOTAL_TIME_ENABLED
= 1U << 0,
203 PERF_FORMAT_TOTAL_TIME_RUNNING
= 1U << 1,
204 PERF_FORMAT_ID
= 1U << 2,
205 PERF_FORMAT_GROUP
= 1U << 3,
207 PERF_FORMAT_MAX
= 1U << 4, /* non-ABI */
210 #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
211 #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */
212 #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */
213 #define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */
214 /* add: sample_stack_user */
217 * Hardware event_id to monitor via a performance monitoring event:
219 struct perf_event_attr
{
222 * Major type: hardware/software/tracepoint/etc.
227 * Size of the attr structure, for fwd/bwd compat.
232 * Type specific configuration information.
244 __u64 disabled
: 1, /* off by default */
245 inherit
: 1, /* children inherit it */
246 pinned
: 1, /* must always be on PMU */
247 exclusive
: 1, /* only group on PMU */
248 exclude_user
: 1, /* don't count user */
249 exclude_kernel
: 1, /* ditto kernel */
250 exclude_hv
: 1, /* ditto hypervisor */
251 exclude_idle
: 1, /* don't count when idle */
252 mmap
: 1, /* include mmap data */
253 comm
: 1, /* include comm data */
254 freq
: 1, /* use freq, not period */
255 inherit_stat
: 1, /* per task counts */
256 enable_on_exec
: 1, /* next exec enables */
257 task
: 1, /* trace fork/exit */
258 watermark
: 1, /* wakeup_watermark */
262 * 0 - SAMPLE_IP can have arbitrary skid
263 * 1 - SAMPLE_IP must have constant skid
264 * 2 - SAMPLE_IP requested to have 0 skid
265 * 3 - SAMPLE_IP must have 0 skid
267 * See also PERF_RECORD_MISC_EXACT_IP
269 precise_ip
: 2, /* skid constraint */
270 mmap_data
: 1, /* non-exec mmap data */
271 sample_id_all
: 1, /* sample_type all events */
273 exclude_host
: 1, /* don't count in host */
274 exclude_guest
: 1, /* don't count in guest */
276 exclude_callchain_kernel
: 1, /* exclude kernel callchains */
277 exclude_callchain_user
: 1, /* exclude user callchains */
282 __u32 wakeup_events
; /* wakeup every n events */
283 __u32 wakeup_watermark
; /* bytes before wakeup */
289 __u64 config1
; /* extension of config */
293 __u64 config2
; /* extension of config1 */
295 __u64 branch_sample_type
; /* enum perf_branch_sample_type */
298 * Defines set of user regs to dump on samples.
299 * See asm/perf_regs.h for details.
301 __u64 sample_regs_user
;
304 * Defines size of the user stack to dump on samples.
306 __u32 sample_stack_user
;
312 #define perf_flags(attr) (*(&(attr)->read_format + 1))
315 * Ioctls that can be done on a perf event fd:
317 #define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
318 #define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
319 #define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
320 #define PERF_EVENT_IOC_RESET _IO ('$', 3)
321 #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
322 #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
323 #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
325 enum perf_event_ioc_flags
{
326 PERF_IOC_FLAG_GROUP
= 1U << 0,
330 * Structure of the page that can be mapped via mmap
332 struct perf_event_mmap_page
{
333 __u32 version
; /* version number of this structure */
334 __u32 compat_version
; /* lowest version this is compat with */
337 * Bits needed to read the hw events in user-space.
339 * u32 seq, time_mult, time_shift, idx, width;
340 * u64 count, enabled, running;
341 * u64 cyc, time_offset;
348 * enabled = pc->time_enabled;
349 * running = pc->time_running;
351 * if (pc->cap_usr_time && enabled != running) {
353 * time_offset = pc->time_offset;
354 * time_mult = pc->time_mult;
355 * time_shift = pc->time_shift;
359 * count = pc->offset;
360 * if (pc->cap_usr_rdpmc && idx) {
361 * width = pc->pmc_width;
362 * pmc = rdpmc(idx - 1);
366 * } while (pc->lock != seq);
368 * NOTE: for obvious reason this only works on self-monitoring
371 __u32 lock
; /* seqlock for synchronization */
372 __u32 index
; /* hardware event identifier */
373 __s64 offset
; /* add to hardware event value */
374 __u64 time_enabled
; /* time event active */
375 __u64 time_running
; /* time event on cpu */
379 __u64 cap_usr_time
: 1,
381 cap_usr_time_zero
: 1,
387 * If cap_usr_rdpmc this field provides the bit-width of the value
388 * read using the rdpmc() or equivalent instruction. This can be used
389 * to sign extend the result like:
391 * pmc <<= 64 - width;
392 * pmc >>= 64 - width; // signed shift right
398 * If cap_usr_time the below fields can be used to compute the time
399 * delta since time_enabled (in ns) using rdtsc or similar.
404 * quot = (cyc >> time_shift);
405 * rem = cyc & ((1 << time_shift) - 1);
406 * delta = time_offset + quot * time_mult +
407 * ((rem * time_mult) >> time_shift);
409 * Where time_offset,time_mult,time_shift and cyc are read in the
410 * seqcount loop described above. This delta can then be added to
411 * enabled and possible running (if idx), improving the scaling:
417 * quot = count / running;
418 * rem = count % running;
419 * count = quot * enabled + (rem * enabled) / running;
425 * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
426 * from sample timestamps.
428 * time = timestamp - time_zero;
429 * quot = time / time_mult;
430 * rem = time % time_mult;
431 * cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
435 * quot = cyc >> time_shift;
436 * rem = cyc & ((1 << time_shift) - 1);
437 * timestamp = time_zero + quot * time_mult +
438 * ((rem * time_mult) >> time_shift);
443 * Hole for extension of the self monitor capabilities
446 __u64 __reserved
[119]; /* align to 1k */
449 * Control data for the mmap() data buffer.
451 * User-space reading the @data_head value should issue an rmb(), on
452 * SMP capable platforms, after reading this value -- see
453 * perf_event_wakeup().
455 * When the mapping is PROT_WRITE the @data_tail value should be
456 * written by userspace to reflect the last read data. In this case
457 * the kernel will not over-write unread data.
459 __u64 data_head
; /* head in the data section */
460 __u64 data_tail
; /* user-space written tail */
463 #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
464 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
465 #define PERF_RECORD_MISC_KERNEL (1 << 0)
466 #define PERF_RECORD_MISC_USER (2 << 0)
467 #define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
468 #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
469 #define PERF_RECORD_MISC_GUEST_USER (5 << 0)
471 #define PERF_RECORD_MISC_MMAP_DATA (1 << 13)
473 * Indicates that the content of PERF_SAMPLE_IP points to
474 * the actual instruction that triggered the event. See also
475 * perf_event_attr::precise_ip.
477 #define PERF_RECORD_MISC_EXACT_IP (1 << 14)
479 * Reserve the last bit to indicate some extended misc field
481 #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
483 struct perf_event_header
{
489 enum perf_event_type
{
492 * If perf_event_attr.sample_id_all is set then all event types will
493 * have the sample_type selected fields related to where/when
494 * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID)
495 * described in PERF_RECORD_SAMPLE below, it will be stashed just after
496 * the perf_event_header and the fields already present for the existing
497 * fields, i.e. at the end of the payload. That way a newer perf.data
498 * file will be supported by older perf tools, with these new optional
499 * fields being ignored.
502 * { u32 pid, tid; } && PERF_SAMPLE_TID
503 * { u64 time; } && PERF_SAMPLE_TIME
504 * { u64 id; } && PERF_SAMPLE_ID
505 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
506 * { u32 cpu, res; } && PERF_SAMPLE_CPU
507 * } && perf_event_attr::sample_id_all
511 * The MMAP events record the PROT_EXEC mappings so that we can
512 * correlate userspace IPs to code. They have the following structure:
515 * struct perf_event_header header;
524 PERF_RECORD_MMAP
= 1,
528 * struct perf_event_header header;
531 * struct sample_id sample_id;
534 PERF_RECORD_LOST
= 2,
538 * struct perf_event_header header;
542 * struct sample_id sample_id;
545 PERF_RECORD_COMM
= 3,
549 * struct perf_event_header header;
553 * struct sample_id sample_id;
556 PERF_RECORD_EXIT
= 4,
560 * struct perf_event_header header;
564 * struct sample_id sample_id;
567 PERF_RECORD_THROTTLE
= 5,
568 PERF_RECORD_UNTHROTTLE
= 6,
572 * struct perf_event_header header;
576 * struct sample_id sample_id;
579 PERF_RECORD_FORK
= 7,
583 * struct perf_event_header header;
586 * struct read_format values;
587 * struct sample_id sample_id;
590 PERF_RECORD_READ
= 8,
594 * struct perf_event_header header;
596 * { u64 ip; } && PERF_SAMPLE_IP
597 * { u32 pid, tid; } && PERF_SAMPLE_TID
598 * { u64 time; } && PERF_SAMPLE_TIME
599 * { u64 addr; } && PERF_SAMPLE_ADDR
600 * { u64 id; } && PERF_SAMPLE_ID
601 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
602 * { u32 cpu, res; } && PERF_SAMPLE_CPU
603 * { u64 period; } && PERF_SAMPLE_PERIOD
605 * { struct read_format values; } && PERF_SAMPLE_READ
608 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
611 * # The RAW record below is opaque data wrt the ABI
613 * # That is, the ABI doesn't make any promises wrt to
614 * # the stability of its content, it may vary depending
615 * # on event, hardware, kernel version and phase of
618 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
622 * char data[size];}&& PERF_SAMPLE_RAW
625 * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
627 * { u64 abi; # enum perf_sample_regs_abi
628 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
632 * u64 dyn_size; } && PERF_SAMPLE_STACK_USER
634 * { u64 weight; } && PERF_SAMPLE_WEIGHT
635 * { u64 data_src; } && PERF_SAMPLE_DATA_SRC
638 PERF_RECORD_SAMPLE
= 9,
640 PERF_RECORD_MAX
, /* non-ABI */
643 #define PERF_MAX_STACK_DEPTH 127
645 enum perf_callchain_context
{
646 PERF_CONTEXT_HV
= (__u64
)-32,
647 PERF_CONTEXT_KERNEL
= (__u64
)-128,
648 PERF_CONTEXT_USER
= (__u64
)-512,
650 PERF_CONTEXT_GUEST
= (__u64
)-2048,
651 PERF_CONTEXT_GUEST_KERNEL
= (__u64
)-2176,
652 PERF_CONTEXT_GUEST_USER
= (__u64
)-2560,
654 PERF_CONTEXT_MAX
= (__u64
)-4095,
657 #define PERF_FLAG_FD_NO_GROUP (1U << 0)
658 #define PERF_FLAG_FD_OUTPUT (1U << 1)
659 #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */
661 union perf_mem_data_src
{
664 __u64 mem_op
:5, /* type of opcode */
665 mem_lvl
:14, /* memory hierarchy level */
666 mem_snoop
:5, /* snoop mode */
667 mem_lock
:2, /* lock instr */
668 mem_dtlb
:7, /* tlb access */
673 /* type of opcode (load/store/prefetch,code) */
674 #define PERF_MEM_OP_NA 0x01 /* not available */
675 #define PERF_MEM_OP_LOAD 0x02 /* load instruction */
676 #define PERF_MEM_OP_STORE 0x04 /* store instruction */
677 #define PERF_MEM_OP_PFETCH 0x08 /* prefetch */
678 #define PERF_MEM_OP_EXEC 0x10 /* code (execution) */
679 #define PERF_MEM_OP_SHIFT 0
681 /* memory hierarchy (memory level, hit or miss) */
682 #define PERF_MEM_LVL_NA 0x01 /* not available */
683 #define PERF_MEM_LVL_HIT 0x02 /* hit level */
684 #define PERF_MEM_LVL_MISS 0x04 /* miss level */
685 #define PERF_MEM_LVL_L1 0x08 /* L1 */
686 #define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */
687 #define PERF_MEM_LVL_L2 0x20 /* L2 */
688 #define PERF_MEM_LVL_L3 0x40 /* L3 */
689 #define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */
690 #define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */
691 #define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */
692 #define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */
693 #define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */
694 #define PERF_MEM_LVL_IO 0x1000 /* I/O memory */
695 #define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */
696 #define PERF_MEM_LVL_SHIFT 5
699 #define PERF_MEM_SNOOP_NA 0x01 /* not available */
700 #define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */
701 #define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */
702 #define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */
703 #define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */
704 #define PERF_MEM_SNOOP_SHIFT 19
706 /* locked instruction */
707 #define PERF_MEM_LOCK_NA 0x01 /* not available */
708 #define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */
709 #define PERF_MEM_LOCK_SHIFT 24
712 #define PERF_MEM_TLB_NA 0x01 /* not available */
713 #define PERF_MEM_TLB_HIT 0x02 /* hit level */
714 #define PERF_MEM_TLB_MISS 0x04 /* miss level */
715 #define PERF_MEM_TLB_L1 0x08 /* L1 */
716 #define PERF_MEM_TLB_L2 0x10 /* L2 */
717 #define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/
718 #define PERF_MEM_TLB_OS 0x40 /* OS fault handler */
719 #define PERF_MEM_TLB_SHIFT 26
721 #define PERF_MEM_S(a, s) \
722 (((u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
724 #endif /* _UAPI_LINUX_PERF_EVENT_H */