1 /* Xtensa configuration settings.
2 Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
3 Free Software Foundation, Inc.
4 Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20 #ifndef XTENSA_CONFIG_H
21 #define XTENSA_CONFIG_H
23 /* The macros defined here match those with the same names in the Xtensa
24 compile-time HAL (Hardware Abstraction Layer). Please refer to the
25 Xtensa System Software Reference Manual for documentation of these
29 #define XCHAL_HAVE_BE 1
31 #undef XCHAL_HAVE_DENSITY
32 #define XCHAL_HAVE_DENSITY 1
34 #undef XCHAL_HAVE_CONST16
35 #define XCHAL_HAVE_CONST16 0
38 #define XCHAL_HAVE_ABS 1
40 #undef XCHAL_HAVE_ADDX
41 #define XCHAL_HAVE_ADDX 1
43 #undef XCHAL_HAVE_L32R
44 #define XCHAL_HAVE_L32R 1
46 #undef XSHAL_USE_ABSOLUTE_LITERALS
47 #define XSHAL_USE_ABSOLUTE_LITERALS 0
49 #undef XCHAL_HAVE_MAC16
50 #define XCHAL_HAVE_MAC16 0
52 #undef XCHAL_HAVE_MUL16
53 #define XCHAL_HAVE_MUL16 1
55 #undef XCHAL_HAVE_MUL32
56 #define XCHAL_HAVE_MUL32 1
58 #undef XCHAL_HAVE_MUL32_HIGH
59 #define XCHAL_HAVE_MUL32_HIGH 0
61 #undef XCHAL_HAVE_DIV32
62 #define XCHAL_HAVE_DIV32 1
65 #define XCHAL_HAVE_NSA 1
67 #undef XCHAL_HAVE_MINMAX
68 #define XCHAL_HAVE_MINMAX 1
70 #undef XCHAL_HAVE_SEXT
71 #define XCHAL_HAVE_SEXT 1
73 #undef XCHAL_HAVE_LOOPS
74 #define XCHAL_HAVE_LOOPS 1
76 #undef XCHAL_HAVE_THREADPTR
77 #define XCHAL_HAVE_THREADPTR 1
79 #undef XCHAL_HAVE_RELEASE_SYNC
80 #define XCHAL_HAVE_RELEASE_SYNC 1
82 #undef XCHAL_HAVE_S32C1I
83 #define XCHAL_HAVE_S32C1I 1
85 #undef XCHAL_HAVE_BOOLEANS
86 #define XCHAL_HAVE_BOOLEANS 0
89 #define XCHAL_HAVE_FP 0
91 #undef XCHAL_HAVE_FP_DIV
92 #define XCHAL_HAVE_FP_DIV 0
94 #undef XCHAL_HAVE_FP_RECIP
95 #define XCHAL_HAVE_FP_RECIP 0
97 #undef XCHAL_HAVE_FP_SQRT
98 #define XCHAL_HAVE_FP_SQRT 0
100 #undef XCHAL_HAVE_FP_RSQRT
101 #define XCHAL_HAVE_FP_RSQRT 0
103 #undef XCHAL_HAVE_WINDOWED
104 #define XCHAL_HAVE_WINDOWED 1
106 #undef XCHAL_NUM_AREGS
107 #define XCHAL_NUM_AREGS 32
109 #undef XCHAL_HAVE_WIDE_BRANCHES
110 #define XCHAL_HAVE_WIDE_BRANCHES 0
112 #undef XCHAL_HAVE_PREDICTED_BRANCHES
113 #define XCHAL_HAVE_PREDICTED_BRANCHES 0
116 #undef XCHAL_ICACHE_SIZE
117 #define XCHAL_ICACHE_SIZE 16384
119 #undef XCHAL_DCACHE_SIZE
120 #define XCHAL_DCACHE_SIZE 16384
122 #undef XCHAL_ICACHE_LINESIZE
123 #define XCHAL_ICACHE_LINESIZE 32
125 #undef XCHAL_DCACHE_LINESIZE
126 #define XCHAL_DCACHE_LINESIZE 32
128 #undef XCHAL_ICACHE_LINEWIDTH
129 #define XCHAL_ICACHE_LINEWIDTH 5
131 #undef XCHAL_DCACHE_LINEWIDTH
132 #define XCHAL_DCACHE_LINEWIDTH 5
134 #undef XCHAL_DCACHE_IS_WRITEBACK
135 #define XCHAL_DCACHE_IS_WRITEBACK 1
138 #undef XCHAL_HAVE_MMU
139 #define XCHAL_HAVE_MMU 1
141 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
142 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12
145 #undef XCHAL_HAVE_DEBUG
146 #define XCHAL_HAVE_DEBUG 1
148 #undef XCHAL_NUM_IBREAK
149 #define XCHAL_NUM_IBREAK 2
151 #undef XCHAL_NUM_DBREAK
152 #define XCHAL_NUM_DBREAK 2
154 #undef XCHAL_DEBUGLEVEL
155 #define XCHAL_DEBUGLEVEL 6
158 #undef XCHAL_MAX_INSTRUCTION_SIZE
159 #define XCHAL_MAX_INSTRUCTION_SIZE 3
161 #undef XCHAL_INST_FETCH_WIDTH
162 #define XCHAL_INST_FETCH_WIDTH 4
166 #undef XTHAL_ABI_WINDOWED
167 #undef XTHAL_ABI_CALL0
168 #define XSHAL_ABI XTHAL_ABI_WINDOWED
169 #define XTHAL_ABI_WINDOWED 0
170 #define XTHAL_ABI_CALL0 1
172 #endif /* !XTENSA_CONFIG_H */
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