Merge branch 'linus' into x86/iommu
[deliverable/linux.git] / lib / swiotlb.c
1 /*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 */
18
19 #include <linux/cache.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/mm.h>
22 #include <linux/module.h>
23 #include <linux/spinlock.h>
24 #include <linux/string.h>
25 #include <linux/types.h>
26 #include <linux/ctype.h>
27
28 #include <asm/io.h>
29 #include <asm/dma.h>
30 #include <asm/scatterlist.h>
31
32 #include <linux/init.h>
33 #include <linux/bootmem.h>
34 #include <linux/iommu-helper.h>
35
36 #define OFFSET(val,align) ((unsigned long) \
37 ( (val) & ( (align) - 1)))
38
39 #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
40 #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
41
42 /*
43 * Maximum allowable number of contiguous slabs to map,
44 * must be a power of 2. What is the appropriate value ?
45 * The complexity of {map,unmap}_single is linearly dependent on this value.
46 */
47 #define IO_TLB_SEGSIZE 128
48
49 /*
50 * log of the size of each IO TLB slab. The number of slabs is command line
51 * controllable.
52 */
53 #define IO_TLB_SHIFT 11
54
55 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
56
57 /*
58 * Minimum IO TLB size to bother booting with. Systems with mainly
59 * 64bit capable cards will only lightly use the swiotlb. If we can't
60 * allocate a contiguous 1MB, we're probably in trouble anyway.
61 */
62 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
63
64 /*
65 * Enumeration for sync targets
66 */
67 enum dma_sync_target {
68 SYNC_FOR_CPU = 0,
69 SYNC_FOR_DEVICE = 1,
70 };
71
72 int swiotlb_force;
73
74 /*
75 * Used to do a quick range check in swiotlb_unmap_single and
76 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
77 * API.
78 */
79 static char *io_tlb_start, *io_tlb_end;
80
81 /*
82 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
83 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
84 */
85 static unsigned long io_tlb_nslabs;
86
87 /*
88 * When the IOMMU overflows we return a fallback buffer. This sets the size.
89 */
90 static unsigned long io_tlb_overflow = 32*1024;
91
92 void *io_tlb_overflow_buffer;
93
94 /*
95 * This is a free list describing the number of free entries available from
96 * each index
97 */
98 static unsigned int *io_tlb_list;
99 static unsigned int io_tlb_index;
100
101 /*
102 * We need to save away the original address corresponding to a mapped entry
103 * for the sync operations.
104 */
105 static unsigned char **io_tlb_orig_addr;
106
107 /*
108 * Protect the above data structures in the map and unmap calls
109 */
110 static DEFINE_SPINLOCK(io_tlb_lock);
111
112 static int __init
113 setup_io_tlb_npages(char *str)
114 {
115 if (isdigit(*str)) {
116 io_tlb_nslabs = simple_strtoul(str, &str, 0);
117 /* avoid tail segment of size < IO_TLB_SEGSIZE */
118 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
119 }
120 if (*str == ',')
121 ++str;
122 if (!strcmp(str, "force"))
123 swiotlb_force = 1;
124 return 1;
125 }
126 __setup("swiotlb=", setup_io_tlb_npages);
127 /* make io_tlb_overflow tunable too? */
128
129 /*
130 * Statically reserve bounce buffer space and initialize bounce buffer data
131 * structures for the software IO TLB used to implement the DMA API.
132 */
133 void __init
134 swiotlb_init_with_default_size(size_t default_size)
135 {
136 unsigned long i, bytes;
137
138 if (!io_tlb_nslabs) {
139 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
140 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
141 }
142
143 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
144
145 /*
146 * Get IO TLB memory from the low pages
147 */
148 io_tlb_start = alloc_bootmem_low_pages(bytes);
149 if (!io_tlb_start)
150 panic("Cannot allocate SWIOTLB buffer");
151 io_tlb_end = io_tlb_start + bytes;
152
153 /*
154 * Allocate and initialize the free list array. This array is used
155 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
156 * between io_tlb_start and io_tlb_end.
157 */
158 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
159 for (i = 0; i < io_tlb_nslabs; i++)
160 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
161 io_tlb_index = 0;
162 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
163
164 /*
165 * Get the overflow emergency buffer
166 */
167 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
168 if (!io_tlb_overflow_buffer)
169 panic("Cannot allocate SWIOTLB overflow buffer!\n");
170
171 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
172 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
173 }
174
175 void __init
176 swiotlb_init(void)
177 {
178 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
179 }
180
181 /*
182 * Systems with larger DMA zones (those that don't support ISA) can
183 * initialize the swiotlb later using the slab allocator if needed.
184 * This should be just like above, but with some error catching.
185 */
186 int
187 swiotlb_late_init_with_default_size(size_t default_size)
188 {
189 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
190 unsigned int order;
191
192 if (!io_tlb_nslabs) {
193 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
194 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
195 }
196
197 /*
198 * Get IO TLB memory from the low pages
199 */
200 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
201 io_tlb_nslabs = SLABS_PER_PAGE << order;
202 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
203
204 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
205 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
206 order);
207 if (io_tlb_start)
208 break;
209 order--;
210 }
211
212 if (!io_tlb_start)
213 goto cleanup1;
214
215 if (order != get_order(bytes)) {
216 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
217 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
218 io_tlb_nslabs = SLABS_PER_PAGE << order;
219 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
220 }
221 io_tlb_end = io_tlb_start + bytes;
222 memset(io_tlb_start, 0, bytes);
223
224 /*
225 * Allocate and initialize the free list array. This array is used
226 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
227 * between io_tlb_start and io_tlb_end.
228 */
229 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
230 get_order(io_tlb_nslabs * sizeof(int)));
231 if (!io_tlb_list)
232 goto cleanup2;
233
234 for (i = 0; i < io_tlb_nslabs; i++)
235 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
236 io_tlb_index = 0;
237
238 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
239 get_order(io_tlb_nslabs * sizeof(char *)));
240 if (!io_tlb_orig_addr)
241 goto cleanup3;
242
243 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
244
245 /*
246 * Get the overflow emergency buffer
247 */
248 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
249 get_order(io_tlb_overflow));
250 if (!io_tlb_overflow_buffer)
251 goto cleanup4;
252
253 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
254 "0x%lx\n", bytes >> 20,
255 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
256
257 return 0;
258
259 cleanup4:
260 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
261 sizeof(char *)));
262 io_tlb_orig_addr = NULL;
263 cleanup3:
264 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
265 sizeof(int)));
266 io_tlb_list = NULL;
267 cleanup2:
268 io_tlb_end = NULL;
269 free_pages((unsigned long)io_tlb_start, order);
270 io_tlb_start = NULL;
271 cleanup1:
272 io_tlb_nslabs = req_nslabs;
273 return -ENOMEM;
274 }
275
276 static int
277 address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
278 {
279 dma_addr_t mask = 0xffffffff;
280 /* If the device has a mask, use it, otherwise default to 32 bits */
281 if (hwdev && hwdev->dma_mask)
282 mask = *hwdev->dma_mask;
283 return !is_buffer_dma_capable(mask, addr, size);
284 }
285
286 static int is_swiotlb_buffer(char *addr)
287 {
288 return addr >= io_tlb_start && addr < io_tlb_end;
289 }
290
291 /*
292 * Allocates bounce buffer and returns its kernel virtual address.
293 */
294 static void *
295 map_single(struct device *hwdev, char *buffer, size_t size, int dir)
296 {
297 unsigned long flags;
298 char *dma_addr;
299 unsigned int nslots, stride, index, wrap;
300 int i;
301 unsigned long start_dma_addr;
302 unsigned long mask;
303 unsigned long offset_slots;
304 unsigned long max_slots;
305
306 mask = dma_get_seg_boundary(hwdev);
307 start_dma_addr = virt_to_bus(io_tlb_start) & mask;
308
309 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
310 max_slots = mask + 1
311 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
312 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
313
314 /*
315 * For mappings greater than a page, we limit the stride (and
316 * hence alignment) to a page size.
317 */
318 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
319 if (size > PAGE_SIZE)
320 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
321 else
322 stride = 1;
323
324 BUG_ON(!nslots);
325
326 /*
327 * Find suitable number of IO TLB entries size that will fit this
328 * request and allocate a buffer from that IO TLB pool.
329 */
330 spin_lock_irqsave(&io_tlb_lock, flags);
331 index = ALIGN(io_tlb_index, stride);
332 if (index >= io_tlb_nslabs)
333 index = 0;
334 wrap = index;
335
336 do {
337 while (iommu_is_span_boundary(index, nslots, offset_slots,
338 max_slots)) {
339 index += stride;
340 if (index >= io_tlb_nslabs)
341 index = 0;
342 if (index == wrap)
343 goto not_found;
344 }
345
346 /*
347 * If we find a slot that indicates we have 'nslots' number of
348 * contiguous buffers, we allocate the buffers from that slot
349 * and mark the entries as '0' indicating unavailable.
350 */
351 if (io_tlb_list[index] >= nslots) {
352 int count = 0;
353
354 for (i = index; i < (int) (index + nslots); i++)
355 io_tlb_list[i] = 0;
356 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
357 io_tlb_list[i] = ++count;
358 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
359
360 /*
361 * Update the indices to avoid searching in the next
362 * round.
363 */
364 io_tlb_index = ((index + nslots) < io_tlb_nslabs
365 ? (index + nslots) : 0);
366
367 goto found;
368 }
369 index += stride;
370 if (index >= io_tlb_nslabs)
371 index = 0;
372 } while (index != wrap);
373
374 not_found:
375 spin_unlock_irqrestore(&io_tlb_lock, flags);
376 return NULL;
377 found:
378 spin_unlock_irqrestore(&io_tlb_lock, flags);
379
380 /*
381 * Save away the mapping from the original address to the DMA address.
382 * This is needed when we sync the memory. Then we sync the buffer if
383 * needed.
384 */
385 for (i = 0; i < nslots; i++)
386 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
387 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
388 memcpy(dma_addr, buffer, size);
389
390 return dma_addr;
391 }
392
393 /*
394 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
395 */
396 static void
397 unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
398 {
399 unsigned long flags;
400 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
401 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
402 char *buffer = io_tlb_orig_addr[index];
403
404 /*
405 * First, sync the memory before unmapping the entry
406 */
407 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
408 /*
409 * bounce... copy the data back into the original buffer * and
410 * delete the bounce buffer.
411 */
412 memcpy(buffer, dma_addr, size);
413
414 /*
415 * Return the buffer to the free list by setting the corresponding
416 * entries to indicate the number of contigous entries available.
417 * While returning the entries to the free list, we merge the entries
418 * with slots below and above the pool being returned.
419 */
420 spin_lock_irqsave(&io_tlb_lock, flags);
421 {
422 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
423 io_tlb_list[index + nslots] : 0);
424 /*
425 * Step 1: return the slots to the free list, merging the
426 * slots with superceeding slots
427 */
428 for (i = index + nslots - 1; i >= index; i--)
429 io_tlb_list[i] = ++count;
430 /*
431 * Step 2: merge the returned slots with the preceding slots,
432 * if available (non zero)
433 */
434 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
435 io_tlb_list[i] = ++count;
436 }
437 spin_unlock_irqrestore(&io_tlb_lock, flags);
438 }
439
440 static void
441 sync_single(struct device *hwdev, char *dma_addr, size_t size,
442 int dir, int target)
443 {
444 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
445 char *buffer = io_tlb_orig_addr[index];
446
447 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
448
449 switch (target) {
450 case SYNC_FOR_CPU:
451 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
452 memcpy(buffer, dma_addr, size);
453 else
454 BUG_ON(dir != DMA_TO_DEVICE);
455 break;
456 case SYNC_FOR_DEVICE:
457 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
458 memcpy(dma_addr, buffer, size);
459 else
460 BUG_ON(dir != DMA_FROM_DEVICE);
461 break;
462 default:
463 BUG();
464 }
465 }
466
467 void *
468 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
469 dma_addr_t *dma_handle, gfp_t flags)
470 {
471 dma_addr_t dev_addr;
472 void *ret;
473 int order = get_order(size);
474
475 ret = (void *)__get_free_pages(flags, order);
476 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret), size)) {
477 /*
478 * The allocated memory isn't reachable by the device.
479 * Fall back on swiotlb_map_single().
480 */
481 free_pages((unsigned long) ret, order);
482 ret = NULL;
483 }
484 if (!ret) {
485 /*
486 * We are either out of memory or the device can't DMA
487 * to GFP_DMA memory; fall back on
488 * swiotlb_map_single(), which will grab memory from
489 * the lowest available address range.
490 */
491 ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE);
492 if (!ret)
493 return NULL;
494 }
495
496 memset(ret, 0, size);
497 dev_addr = virt_to_bus(ret);
498
499 /* Confirm address can be DMA'd by device */
500 if (address_needs_mapping(hwdev, dev_addr, size)) {
501 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
502 (unsigned long long)*hwdev->dma_mask,
503 (unsigned long long)dev_addr);
504 panic("swiotlb_alloc_coherent: allocated memory is out of "
505 "range for device");
506 }
507 *dma_handle = dev_addr;
508 return ret;
509 }
510
511 void
512 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
513 dma_addr_t dma_handle)
514 {
515 WARN_ON(irqs_disabled());
516 if (!is_swiotlb_buffer(vaddr))
517 free_pages((unsigned long) vaddr, get_order(size));
518 else
519 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
520 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
521 }
522
523 static void
524 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
525 {
526 /*
527 * Ran out of IOMMU space for this operation. This is very bad.
528 * Unfortunately the drivers cannot handle this operation properly.
529 * unless they check for dma_mapping_error (most don't)
530 * When the mapping is small enough return a static buffer to limit
531 * the damage, or panic when the transfer is too big.
532 */
533 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
534 "device %s\n", size, dev ? dev->bus_id : "?");
535
536 if (size > io_tlb_overflow && do_panic) {
537 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
538 panic("DMA: Memory would be corrupted\n");
539 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
540 panic("DMA: Random memory would be DMAed\n");
541 }
542 }
543
544 /*
545 * Map a single buffer of the indicated size for DMA in streaming mode. The
546 * physical address to use is returned.
547 *
548 * Once the device is given the dma address, the device owns this memory until
549 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
550 */
551 dma_addr_t
552 swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
553 int dir, struct dma_attrs *attrs)
554 {
555 dma_addr_t dev_addr = virt_to_bus(ptr);
556 void *map;
557
558 BUG_ON(dir == DMA_NONE);
559 /*
560 * If the pointer passed in happens to be in the device's DMA window,
561 * we can safely return the device addr and not worry about bounce
562 * buffering it.
563 */
564 if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force)
565 return dev_addr;
566
567 /*
568 * Oh well, have to allocate and map a bounce buffer.
569 */
570 map = map_single(hwdev, ptr, size, dir);
571 if (!map) {
572 swiotlb_full(hwdev, size, dir, 1);
573 map = io_tlb_overflow_buffer;
574 }
575
576 dev_addr = virt_to_bus(map);
577
578 /*
579 * Ensure that the address returned is DMA'ble
580 */
581 if (address_needs_mapping(hwdev, dev_addr, size))
582 panic("map_single: bounce buffer is not DMA'ble");
583
584 return dev_addr;
585 }
586 EXPORT_SYMBOL(swiotlb_map_single_attrs);
587
588 dma_addr_t
589 swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
590 {
591 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
592 }
593
594 /*
595 * Unmap a single streaming mode DMA translation. The dma_addr and size must
596 * match what was provided for in a previous swiotlb_map_single call. All
597 * other usages are undefined.
598 *
599 * After this call, reads by the cpu to the buffer are guaranteed to see
600 * whatever the device wrote there.
601 */
602 void
603 swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
604 size_t size, int dir, struct dma_attrs *attrs)
605 {
606 char *dma_addr = bus_to_virt(dev_addr);
607
608 BUG_ON(dir == DMA_NONE);
609 if (is_swiotlb_buffer(dma_addr))
610 unmap_single(hwdev, dma_addr, size, dir);
611 else if (dir == DMA_FROM_DEVICE)
612 dma_mark_clean(dma_addr, size);
613 }
614 EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
615
616 void
617 swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
618 int dir)
619 {
620 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
621 }
622 /*
623 * Make physical memory consistent for a single streaming mode DMA translation
624 * after a transfer.
625 *
626 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
627 * using the cpu, yet do not wish to teardown the dma mapping, you must
628 * call this function before doing so. At the next point you give the dma
629 * address back to the card, you must first perform a
630 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
631 */
632 static void
633 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
634 size_t size, int dir, int target)
635 {
636 char *dma_addr = bus_to_virt(dev_addr);
637
638 BUG_ON(dir == DMA_NONE);
639 if (is_swiotlb_buffer(dma_addr))
640 sync_single(hwdev, dma_addr, size, dir, target);
641 else if (dir == DMA_FROM_DEVICE)
642 dma_mark_clean(dma_addr, size);
643 }
644
645 void
646 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
647 size_t size, int dir)
648 {
649 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
650 }
651
652 void
653 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
654 size_t size, int dir)
655 {
656 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
657 }
658
659 /*
660 * Same as above, but for a sub-range of the mapping.
661 */
662 static void
663 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
664 unsigned long offset, size_t size,
665 int dir, int target)
666 {
667 char *dma_addr = bus_to_virt(dev_addr) + offset;
668
669 BUG_ON(dir == DMA_NONE);
670 if (is_swiotlb_buffer(dma_addr))
671 sync_single(hwdev, dma_addr, size, dir, target);
672 else if (dir == DMA_FROM_DEVICE)
673 dma_mark_clean(dma_addr, size);
674 }
675
676 void
677 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
678 unsigned long offset, size_t size, int dir)
679 {
680 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
681 SYNC_FOR_CPU);
682 }
683
684 void
685 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
686 unsigned long offset, size_t size, int dir)
687 {
688 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
689 SYNC_FOR_DEVICE);
690 }
691
692 void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
693 struct dma_attrs *);
694 /*
695 * Map a set of buffers described by scatterlist in streaming mode for DMA.
696 * This is the scatter-gather version of the above swiotlb_map_single
697 * interface. Here the scatter gather list elements are each tagged with the
698 * appropriate dma address and length. They are obtained via
699 * sg_dma_{address,length}(SG).
700 *
701 * NOTE: An implementation may be able to use a smaller number of
702 * DMA address/length pairs than there are SG table elements.
703 * (for example via virtual mapping capabilities)
704 * The routine returns the number of addr/length pairs actually
705 * used, at most nents.
706 *
707 * Device ownership issues as mentioned above for swiotlb_map_single are the
708 * same here.
709 */
710 int
711 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
712 int dir, struct dma_attrs *attrs)
713 {
714 struct scatterlist *sg;
715 void *addr;
716 dma_addr_t dev_addr;
717 int i;
718
719 BUG_ON(dir == DMA_NONE);
720
721 for_each_sg(sgl, sg, nelems, i) {
722 addr = SG_ENT_VIRT_ADDRESS(sg);
723 dev_addr = virt_to_bus(addr);
724 if (swiotlb_force ||
725 address_needs_mapping(hwdev, dev_addr, sg->length)) {
726 void *map = map_single(hwdev, addr, sg->length, dir);
727 if (!map) {
728 /* Don't panic here, we expect map_sg users
729 to do proper error handling. */
730 swiotlb_full(hwdev, sg->length, dir, 0);
731 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
732 attrs);
733 sgl[0].dma_length = 0;
734 return 0;
735 }
736 sg->dma_address = virt_to_bus(map);
737 } else
738 sg->dma_address = dev_addr;
739 sg->dma_length = sg->length;
740 }
741 return nelems;
742 }
743 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
744
745 int
746 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
747 int dir)
748 {
749 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
750 }
751
752 /*
753 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
754 * concerning calls here are the same as for swiotlb_unmap_single() above.
755 */
756 void
757 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
758 int nelems, int dir, struct dma_attrs *attrs)
759 {
760 struct scatterlist *sg;
761 int i;
762
763 BUG_ON(dir == DMA_NONE);
764
765 for_each_sg(sgl, sg, nelems, i) {
766 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
767 unmap_single(hwdev, bus_to_virt(sg->dma_address),
768 sg->dma_length, dir);
769 else if (dir == DMA_FROM_DEVICE)
770 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
771 }
772 }
773 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
774
775 void
776 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
777 int dir)
778 {
779 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
780 }
781
782 /*
783 * Make physical memory consistent for a set of streaming mode DMA translations
784 * after a transfer.
785 *
786 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
787 * and usage.
788 */
789 static void
790 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
791 int nelems, int dir, int target)
792 {
793 struct scatterlist *sg;
794 int i;
795
796 BUG_ON(dir == DMA_NONE);
797
798 for_each_sg(sgl, sg, nelems, i) {
799 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
800 sync_single(hwdev, bus_to_virt(sg->dma_address),
801 sg->dma_length, dir, target);
802 else if (dir == DMA_FROM_DEVICE)
803 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
804 }
805 }
806
807 void
808 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
809 int nelems, int dir)
810 {
811 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
812 }
813
814 void
815 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
816 int nelems, int dir)
817 {
818 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
819 }
820
821 int
822 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
823 {
824 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
825 }
826
827 /*
828 * Return whether the given device DMA address mask can be supported
829 * properly. For example, if your device can only drive the low 24-bits
830 * during bus mastering, then you would pass 0x00ffffff as the mask to
831 * this function.
832 */
833 int
834 swiotlb_dma_supported(struct device *hwdev, u64 mask)
835 {
836 return virt_to_bus(io_tlb_end - 1) <= mask;
837 }
838
839 EXPORT_SYMBOL(swiotlb_map_single);
840 EXPORT_SYMBOL(swiotlb_unmap_single);
841 EXPORT_SYMBOL(swiotlb_map_sg);
842 EXPORT_SYMBOL(swiotlb_unmap_sg);
843 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
844 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
845 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
846 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
847 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
848 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
849 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
850 EXPORT_SYMBOL(swiotlb_alloc_coherent);
851 EXPORT_SYMBOL(swiotlb_free_coherent);
852 EXPORT_SYMBOL(swiotlb_dma_supported);
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