Merge tag 'arc-v3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
[deliverable/linux.git] / lib / swiotlb.c
1 /*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mm.h>
23 #include <linux/export.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
32
33 #include <asm/io.h>
34 #include <asm/dma.h>
35 #include <asm/scatterlist.h>
36
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
40
41 #define CREATE_TRACE_POINTS
42 #include <trace/events/swiotlb.h>
43
44 #define OFFSET(val,align) ((unsigned long) \
45 ( (val) & ( (align) - 1)))
46
47 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
48
49 /*
50 * Minimum IO TLB size to bother booting with. Systems with mainly
51 * 64bit capable cards will only lightly use the swiotlb. If we can't
52 * allocate a contiguous 1MB, we're probably in trouble anyway.
53 */
54 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
55
56 int swiotlb_force;
57
58 /*
59 * Used to do a quick range check in swiotlb_tbl_unmap_single and
60 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
61 * API.
62 */
63 static phys_addr_t io_tlb_start, io_tlb_end;
64
65 /*
66 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
67 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
68 */
69 static unsigned long io_tlb_nslabs;
70
71 /*
72 * When the IOMMU overflows we return a fallback buffer. This sets the size.
73 */
74 static unsigned long io_tlb_overflow = 32*1024;
75
76 static phys_addr_t io_tlb_overflow_buffer;
77
78 /*
79 * This is a free list describing the number of free entries available from
80 * each index
81 */
82 static unsigned int *io_tlb_list;
83 static unsigned int io_tlb_index;
84
85 /*
86 * We need to save away the original address corresponding to a mapped entry
87 * for the sync operations.
88 */
89 static phys_addr_t *io_tlb_orig_addr;
90
91 /*
92 * Protect the above data structures in the map and unmap calls
93 */
94 static DEFINE_SPINLOCK(io_tlb_lock);
95
96 static int late_alloc;
97
98 static int __init
99 setup_io_tlb_npages(char *str)
100 {
101 if (isdigit(*str)) {
102 io_tlb_nslabs = simple_strtoul(str, &str, 0);
103 /* avoid tail segment of size < IO_TLB_SEGSIZE */
104 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
105 }
106 if (*str == ',')
107 ++str;
108 if (!strcmp(str, "force"))
109 swiotlb_force = 1;
110
111 return 0;
112 }
113 early_param("swiotlb", setup_io_tlb_npages);
114 /* make io_tlb_overflow tunable too? */
115
116 unsigned long swiotlb_nr_tbl(void)
117 {
118 return io_tlb_nslabs;
119 }
120 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
121
122 /* default to 64MB */
123 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
124 unsigned long swiotlb_size_or_default(void)
125 {
126 unsigned long size;
127
128 size = io_tlb_nslabs << IO_TLB_SHIFT;
129
130 return size ? size : (IO_TLB_DEFAULT_SIZE);
131 }
132
133 /* Note that this doesn't work with highmem page */
134 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
135 volatile void *address)
136 {
137 return phys_to_dma(hwdev, virt_to_phys(address));
138 }
139
140 static bool no_iotlb_memory;
141
142 void swiotlb_print_info(void)
143 {
144 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
145 unsigned char *vstart, *vend;
146
147 if (no_iotlb_memory) {
148 pr_warn("software IO TLB: No low mem\n");
149 return;
150 }
151
152 vstart = phys_to_virt(io_tlb_start);
153 vend = phys_to_virt(io_tlb_end);
154
155 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
156 (unsigned long long)io_tlb_start,
157 (unsigned long long)io_tlb_end,
158 bytes >> 20, vstart, vend - 1);
159 }
160
161 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
162 {
163 void *v_overflow_buffer;
164 unsigned long i, bytes;
165
166 bytes = nslabs << IO_TLB_SHIFT;
167
168 io_tlb_nslabs = nslabs;
169 io_tlb_start = __pa(tlb);
170 io_tlb_end = io_tlb_start + bytes;
171
172 /*
173 * Get the overflow emergency buffer
174 */
175 v_overflow_buffer = memblock_virt_alloc_nopanic(
176 PAGE_ALIGN(io_tlb_overflow),
177 PAGE_SIZE);
178 if (!v_overflow_buffer)
179 return -ENOMEM;
180
181 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
182
183 /*
184 * Allocate and initialize the free list array. This array is used
185 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
186 * between io_tlb_start and io_tlb_end.
187 */
188 io_tlb_list = memblock_virt_alloc(
189 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
190 PAGE_SIZE);
191 for (i = 0; i < io_tlb_nslabs; i++)
192 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
193 io_tlb_index = 0;
194 io_tlb_orig_addr = memblock_virt_alloc(
195 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
196 PAGE_SIZE);
197
198 if (verbose)
199 swiotlb_print_info();
200
201 return 0;
202 }
203
204 /*
205 * Statically reserve bounce buffer space and initialize bounce buffer data
206 * structures for the software IO TLB used to implement the DMA API.
207 */
208 void __init
209 swiotlb_init(int verbose)
210 {
211 size_t default_size = IO_TLB_DEFAULT_SIZE;
212 unsigned char *vstart;
213 unsigned long bytes;
214
215 if (!io_tlb_nslabs) {
216 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
217 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
218 }
219
220 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
221
222 /* Get IO TLB memory from the low pages */
223 vstart = memblock_virt_alloc_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
224 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
225 return;
226
227 if (io_tlb_start)
228 memblock_free_early(io_tlb_start,
229 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
230 pr_warn("Cannot allocate SWIOTLB buffer");
231 no_iotlb_memory = true;
232 }
233
234 /*
235 * Systems with larger DMA zones (those that don't support ISA) can
236 * initialize the swiotlb later using the slab allocator if needed.
237 * This should be just like above, but with some error catching.
238 */
239 int
240 swiotlb_late_init_with_default_size(size_t default_size)
241 {
242 unsigned long bytes, req_nslabs = io_tlb_nslabs;
243 unsigned char *vstart = NULL;
244 unsigned int order;
245 int rc = 0;
246
247 if (!io_tlb_nslabs) {
248 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
249 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
250 }
251
252 /*
253 * Get IO TLB memory from the low pages
254 */
255 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
256 io_tlb_nslabs = SLABS_PER_PAGE << order;
257 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
258
259 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
260 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
261 order);
262 if (vstart)
263 break;
264 order--;
265 }
266
267 if (!vstart) {
268 io_tlb_nslabs = req_nslabs;
269 return -ENOMEM;
270 }
271 if (order != get_order(bytes)) {
272 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
273 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
274 io_tlb_nslabs = SLABS_PER_PAGE << order;
275 }
276 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
277 if (rc)
278 free_pages((unsigned long)vstart, order);
279 return rc;
280 }
281
282 int
283 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
284 {
285 unsigned long i, bytes;
286 unsigned char *v_overflow_buffer;
287
288 bytes = nslabs << IO_TLB_SHIFT;
289
290 io_tlb_nslabs = nslabs;
291 io_tlb_start = virt_to_phys(tlb);
292 io_tlb_end = io_tlb_start + bytes;
293
294 memset(tlb, 0, bytes);
295
296 /*
297 * Get the overflow emergency buffer
298 */
299 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
300 get_order(io_tlb_overflow));
301 if (!v_overflow_buffer)
302 goto cleanup2;
303
304 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
305
306 /*
307 * Allocate and initialize the free list array. This array is used
308 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
309 * between io_tlb_start and io_tlb_end.
310 */
311 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
312 get_order(io_tlb_nslabs * sizeof(int)));
313 if (!io_tlb_list)
314 goto cleanup3;
315
316 for (i = 0; i < io_tlb_nslabs; i++)
317 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
318 io_tlb_index = 0;
319
320 io_tlb_orig_addr = (phys_addr_t *)
321 __get_free_pages(GFP_KERNEL,
322 get_order(io_tlb_nslabs *
323 sizeof(phys_addr_t)));
324 if (!io_tlb_orig_addr)
325 goto cleanup4;
326
327 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
328
329 swiotlb_print_info();
330
331 late_alloc = 1;
332
333 return 0;
334
335 cleanup4:
336 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
337 sizeof(int)));
338 io_tlb_list = NULL;
339 cleanup3:
340 free_pages((unsigned long)v_overflow_buffer,
341 get_order(io_tlb_overflow));
342 io_tlb_overflow_buffer = 0;
343 cleanup2:
344 io_tlb_end = 0;
345 io_tlb_start = 0;
346 io_tlb_nslabs = 0;
347 return -ENOMEM;
348 }
349
350 void __init swiotlb_free(void)
351 {
352 if (!io_tlb_orig_addr)
353 return;
354
355 if (late_alloc) {
356 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
357 get_order(io_tlb_overflow));
358 free_pages((unsigned long)io_tlb_orig_addr,
359 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
360 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
361 sizeof(int)));
362 free_pages((unsigned long)phys_to_virt(io_tlb_start),
363 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
364 } else {
365 memblock_free_late(io_tlb_overflow_buffer,
366 PAGE_ALIGN(io_tlb_overflow));
367 memblock_free_late(__pa(io_tlb_orig_addr),
368 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
369 memblock_free_late(__pa(io_tlb_list),
370 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
371 memblock_free_late(io_tlb_start,
372 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
373 }
374 io_tlb_nslabs = 0;
375 }
376
377 static int is_swiotlb_buffer(phys_addr_t paddr)
378 {
379 return paddr >= io_tlb_start && paddr < io_tlb_end;
380 }
381
382 /*
383 * Bounce: copy the swiotlb buffer back to the original dma location
384 */
385 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
386 size_t size, enum dma_data_direction dir)
387 {
388 unsigned long pfn = PFN_DOWN(orig_addr);
389 unsigned char *vaddr = phys_to_virt(tlb_addr);
390
391 if (PageHighMem(pfn_to_page(pfn))) {
392 /* The buffer does not have a mapping. Map it in and copy */
393 unsigned int offset = orig_addr & ~PAGE_MASK;
394 char *buffer;
395 unsigned int sz = 0;
396 unsigned long flags;
397
398 while (size) {
399 sz = min_t(size_t, PAGE_SIZE - offset, size);
400
401 local_irq_save(flags);
402 buffer = kmap_atomic(pfn_to_page(pfn));
403 if (dir == DMA_TO_DEVICE)
404 memcpy(vaddr, buffer + offset, sz);
405 else
406 memcpy(buffer + offset, vaddr, sz);
407 kunmap_atomic(buffer);
408 local_irq_restore(flags);
409
410 size -= sz;
411 pfn++;
412 vaddr += sz;
413 offset = 0;
414 }
415 } else if (dir == DMA_TO_DEVICE) {
416 memcpy(vaddr, phys_to_virt(orig_addr), size);
417 } else {
418 memcpy(phys_to_virt(orig_addr), vaddr, size);
419 }
420 }
421
422 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
423 dma_addr_t tbl_dma_addr,
424 phys_addr_t orig_addr, size_t size,
425 enum dma_data_direction dir)
426 {
427 unsigned long flags;
428 phys_addr_t tlb_addr;
429 unsigned int nslots, stride, index, wrap;
430 int i;
431 unsigned long mask;
432 unsigned long offset_slots;
433 unsigned long max_slots;
434
435 if (no_iotlb_memory)
436 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
437
438 mask = dma_get_seg_boundary(hwdev);
439
440 tbl_dma_addr &= mask;
441
442 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
443
444 /*
445 * Carefully handle integer overflow which can occur when mask == ~0UL.
446 */
447 max_slots = mask + 1
448 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
449 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
450
451 /*
452 * For mappings greater than a page, we limit the stride (and
453 * hence alignment) to a page size.
454 */
455 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
456 if (size > PAGE_SIZE)
457 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
458 else
459 stride = 1;
460
461 BUG_ON(!nslots);
462
463 /*
464 * Find suitable number of IO TLB entries size that will fit this
465 * request and allocate a buffer from that IO TLB pool.
466 */
467 spin_lock_irqsave(&io_tlb_lock, flags);
468 index = ALIGN(io_tlb_index, stride);
469 if (index >= io_tlb_nslabs)
470 index = 0;
471 wrap = index;
472
473 do {
474 while (iommu_is_span_boundary(index, nslots, offset_slots,
475 max_slots)) {
476 index += stride;
477 if (index >= io_tlb_nslabs)
478 index = 0;
479 if (index == wrap)
480 goto not_found;
481 }
482
483 /*
484 * If we find a slot that indicates we have 'nslots' number of
485 * contiguous buffers, we allocate the buffers from that slot
486 * and mark the entries as '0' indicating unavailable.
487 */
488 if (io_tlb_list[index] >= nslots) {
489 int count = 0;
490
491 for (i = index; i < (int) (index + nslots); i++)
492 io_tlb_list[i] = 0;
493 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
494 io_tlb_list[i] = ++count;
495 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
496
497 /*
498 * Update the indices to avoid searching in the next
499 * round.
500 */
501 io_tlb_index = ((index + nslots) < io_tlb_nslabs
502 ? (index + nslots) : 0);
503
504 goto found;
505 }
506 index += stride;
507 if (index >= io_tlb_nslabs)
508 index = 0;
509 } while (index != wrap);
510
511 not_found:
512 spin_unlock_irqrestore(&io_tlb_lock, flags);
513 dev_warn(hwdev, "swiotlb buffer is full\n");
514 return SWIOTLB_MAP_ERROR;
515 found:
516 spin_unlock_irqrestore(&io_tlb_lock, flags);
517
518 /*
519 * Save away the mapping from the original address to the DMA address.
520 * This is needed when we sync the memory. Then we sync the buffer if
521 * needed.
522 */
523 for (i = 0; i < nslots; i++)
524 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
525 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
526 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
527
528 return tlb_addr;
529 }
530 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
531
532 /*
533 * Allocates bounce buffer and returns its kernel virtual address.
534 */
535
536 phys_addr_t map_single(struct device *hwdev, phys_addr_t phys, size_t size,
537 enum dma_data_direction dir)
538 {
539 dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
540
541 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
542 }
543
544 /*
545 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
546 */
547 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
548 size_t size, enum dma_data_direction dir)
549 {
550 unsigned long flags;
551 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
552 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
553 phys_addr_t orig_addr = io_tlb_orig_addr[index];
554
555 /*
556 * First, sync the memory before unmapping the entry
557 */
558 if (orig_addr && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
559 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
560
561 /*
562 * Return the buffer to the free list by setting the corresponding
563 * entries to indicate the number of contiguous entries available.
564 * While returning the entries to the free list, we merge the entries
565 * with slots below and above the pool being returned.
566 */
567 spin_lock_irqsave(&io_tlb_lock, flags);
568 {
569 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
570 io_tlb_list[index + nslots] : 0);
571 /*
572 * Step 1: return the slots to the free list, merging the
573 * slots with superceeding slots
574 */
575 for (i = index + nslots - 1; i >= index; i--)
576 io_tlb_list[i] = ++count;
577 /*
578 * Step 2: merge the returned slots with the preceding slots,
579 * if available (non zero)
580 */
581 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
582 io_tlb_list[i] = ++count;
583 }
584 spin_unlock_irqrestore(&io_tlb_lock, flags);
585 }
586 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
587
588 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
589 size_t size, enum dma_data_direction dir,
590 enum dma_sync_target target)
591 {
592 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
593 phys_addr_t orig_addr = io_tlb_orig_addr[index];
594
595 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
596
597 switch (target) {
598 case SYNC_FOR_CPU:
599 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
600 swiotlb_bounce(orig_addr, tlb_addr,
601 size, DMA_FROM_DEVICE);
602 else
603 BUG_ON(dir != DMA_TO_DEVICE);
604 break;
605 case SYNC_FOR_DEVICE:
606 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
607 swiotlb_bounce(orig_addr, tlb_addr,
608 size, DMA_TO_DEVICE);
609 else
610 BUG_ON(dir != DMA_FROM_DEVICE);
611 break;
612 default:
613 BUG();
614 }
615 }
616 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
617
618 void *
619 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
620 dma_addr_t *dma_handle, gfp_t flags)
621 {
622 dma_addr_t dev_addr;
623 void *ret;
624 int order = get_order(size);
625 u64 dma_mask = DMA_BIT_MASK(32);
626
627 if (hwdev && hwdev->coherent_dma_mask)
628 dma_mask = hwdev->coherent_dma_mask;
629
630 ret = (void *)__get_free_pages(flags, order);
631 if (ret) {
632 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
633 if (dev_addr + size - 1 > dma_mask) {
634 /*
635 * The allocated memory isn't reachable by the device.
636 */
637 free_pages((unsigned long) ret, order);
638 ret = NULL;
639 }
640 }
641 if (!ret) {
642 /*
643 * We are either out of memory or the device can't DMA to
644 * GFP_DMA memory; fall back on map_single(), which
645 * will grab memory from the lowest available address range.
646 */
647 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
648 if (paddr == SWIOTLB_MAP_ERROR)
649 return NULL;
650
651 ret = phys_to_virt(paddr);
652 dev_addr = phys_to_dma(hwdev, paddr);
653
654 /* Confirm address can be DMA'd by device */
655 if (dev_addr + size - 1 > dma_mask) {
656 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
657 (unsigned long long)dma_mask,
658 (unsigned long long)dev_addr);
659
660 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
661 swiotlb_tbl_unmap_single(hwdev, paddr,
662 size, DMA_TO_DEVICE);
663 return NULL;
664 }
665 }
666
667 *dma_handle = dev_addr;
668 memset(ret, 0, size);
669
670 return ret;
671 }
672 EXPORT_SYMBOL(swiotlb_alloc_coherent);
673
674 void
675 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
676 dma_addr_t dev_addr)
677 {
678 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
679
680 WARN_ON(irqs_disabled());
681 if (!is_swiotlb_buffer(paddr))
682 free_pages((unsigned long)vaddr, get_order(size));
683 else
684 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
685 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
686 }
687 EXPORT_SYMBOL(swiotlb_free_coherent);
688
689 static void
690 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
691 int do_panic)
692 {
693 /*
694 * Ran out of IOMMU space for this operation. This is very bad.
695 * Unfortunately the drivers cannot handle this operation properly.
696 * unless they check for dma_mapping_error (most don't)
697 * When the mapping is small enough return a static buffer to limit
698 * the damage, or panic when the transfer is too big.
699 */
700 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
701 "device %s\n", size, dev ? dev_name(dev) : "?");
702
703 if (size <= io_tlb_overflow || !do_panic)
704 return;
705
706 if (dir == DMA_BIDIRECTIONAL)
707 panic("DMA: Random memory could be DMA accessed\n");
708 if (dir == DMA_FROM_DEVICE)
709 panic("DMA: Random memory could be DMA written\n");
710 if (dir == DMA_TO_DEVICE)
711 panic("DMA: Random memory could be DMA read\n");
712 }
713
714 /*
715 * Map a single buffer of the indicated size for DMA in streaming mode. The
716 * physical address to use is returned.
717 *
718 * Once the device is given the dma address, the device owns this memory until
719 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
720 */
721 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
722 unsigned long offset, size_t size,
723 enum dma_data_direction dir,
724 struct dma_attrs *attrs)
725 {
726 phys_addr_t map, phys = page_to_phys(page) + offset;
727 dma_addr_t dev_addr = phys_to_dma(dev, phys);
728
729 BUG_ON(dir == DMA_NONE);
730 /*
731 * If the address happens to be in the device's DMA window,
732 * we can safely return the device addr and not worry about bounce
733 * buffering it.
734 */
735 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
736 return dev_addr;
737
738 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
739
740 /* Oh well, have to allocate and map a bounce buffer. */
741 map = map_single(dev, phys, size, dir);
742 if (map == SWIOTLB_MAP_ERROR) {
743 swiotlb_full(dev, size, dir, 1);
744 return phys_to_dma(dev, io_tlb_overflow_buffer);
745 }
746
747 dev_addr = phys_to_dma(dev, map);
748
749 /* Ensure that the address returned is DMA'ble */
750 if (!dma_capable(dev, dev_addr, size)) {
751 swiotlb_tbl_unmap_single(dev, map, size, dir);
752 return phys_to_dma(dev, io_tlb_overflow_buffer);
753 }
754
755 return dev_addr;
756 }
757 EXPORT_SYMBOL_GPL(swiotlb_map_page);
758
759 /*
760 * Unmap a single streaming mode DMA translation. The dma_addr and size must
761 * match what was provided for in a previous swiotlb_map_page call. All
762 * other usages are undefined.
763 *
764 * After this call, reads by the cpu to the buffer are guaranteed to see
765 * whatever the device wrote there.
766 */
767 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
768 size_t size, enum dma_data_direction dir)
769 {
770 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
771
772 BUG_ON(dir == DMA_NONE);
773
774 if (is_swiotlb_buffer(paddr)) {
775 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
776 return;
777 }
778
779 if (dir != DMA_FROM_DEVICE)
780 return;
781
782 /*
783 * phys_to_virt doesn't work with hihgmem page but we could
784 * call dma_mark_clean() with hihgmem page here. However, we
785 * are fine since dma_mark_clean() is null on POWERPC. We can
786 * make dma_mark_clean() take a physical address if necessary.
787 */
788 dma_mark_clean(phys_to_virt(paddr), size);
789 }
790
791 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
792 size_t size, enum dma_data_direction dir,
793 struct dma_attrs *attrs)
794 {
795 unmap_single(hwdev, dev_addr, size, dir);
796 }
797 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
798
799 /*
800 * Make physical memory consistent for a single streaming mode DMA translation
801 * after a transfer.
802 *
803 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
804 * using the cpu, yet do not wish to teardown the dma mapping, you must
805 * call this function before doing so. At the next point you give the dma
806 * address back to the card, you must first perform a
807 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
808 */
809 static void
810 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
811 size_t size, enum dma_data_direction dir,
812 enum dma_sync_target target)
813 {
814 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
815
816 BUG_ON(dir == DMA_NONE);
817
818 if (is_swiotlb_buffer(paddr)) {
819 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
820 return;
821 }
822
823 if (dir != DMA_FROM_DEVICE)
824 return;
825
826 dma_mark_clean(phys_to_virt(paddr), size);
827 }
828
829 void
830 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
831 size_t size, enum dma_data_direction dir)
832 {
833 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
834 }
835 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
836
837 void
838 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
839 size_t size, enum dma_data_direction dir)
840 {
841 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
842 }
843 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
844
845 /*
846 * Map a set of buffers described by scatterlist in streaming mode for DMA.
847 * This is the scatter-gather version of the above swiotlb_map_page
848 * interface. Here the scatter gather list elements are each tagged with the
849 * appropriate dma address and length. They are obtained via
850 * sg_dma_{address,length}(SG).
851 *
852 * NOTE: An implementation may be able to use a smaller number of
853 * DMA address/length pairs than there are SG table elements.
854 * (for example via virtual mapping capabilities)
855 * The routine returns the number of addr/length pairs actually
856 * used, at most nents.
857 *
858 * Device ownership issues as mentioned above for swiotlb_map_page are the
859 * same here.
860 */
861 int
862 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
863 enum dma_data_direction dir, struct dma_attrs *attrs)
864 {
865 struct scatterlist *sg;
866 int i;
867
868 BUG_ON(dir == DMA_NONE);
869
870 for_each_sg(sgl, sg, nelems, i) {
871 phys_addr_t paddr = sg_phys(sg);
872 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
873
874 if (swiotlb_force ||
875 !dma_capable(hwdev, dev_addr, sg->length)) {
876 phys_addr_t map = map_single(hwdev, sg_phys(sg),
877 sg->length, dir);
878 if (map == SWIOTLB_MAP_ERROR) {
879 /* Don't panic here, we expect map_sg users
880 to do proper error handling. */
881 swiotlb_full(hwdev, sg->length, dir, 0);
882 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
883 attrs);
884 sg_dma_len(sgl) = 0;
885 return 0;
886 }
887 sg->dma_address = phys_to_dma(hwdev, map);
888 } else
889 sg->dma_address = dev_addr;
890 sg_dma_len(sg) = sg->length;
891 }
892 return nelems;
893 }
894 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
895
896 int
897 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
898 enum dma_data_direction dir)
899 {
900 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
901 }
902 EXPORT_SYMBOL(swiotlb_map_sg);
903
904 /*
905 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
906 * concerning calls here are the same as for swiotlb_unmap_page() above.
907 */
908 void
909 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
910 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
911 {
912 struct scatterlist *sg;
913 int i;
914
915 BUG_ON(dir == DMA_NONE);
916
917 for_each_sg(sgl, sg, nelems, i)
918 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
919
920 }
921 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
922
923 void
924 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
925 enum dma_data_direction dir)
926 {
927 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
928 }
929 EXPORT_SYMBOL(swiotlb_unmap_sg);
930
931 /*
932 * Make physical memory consistent for a set of streaming mode DMA translations
933 * after a transfer.
934 *
935 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
936 * and usage.
937 */
938 static void
939 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
940 int nelems, enum dma_data_direction dir,
941 enum dma_sync_target target)
942 {
943 struct scatterlist *sg;
944 int i;
945
946 for_each_sg(sgl, sg, nelems, i)
947 swiotlb_sync_single(hwdev, sg->dma_address,
948 sg_dma_len(sg), dir, target);
949 }
950
951 void
952 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
953 int nelems, enum dma_data_direction dir)
954 {
955 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
956 }
957 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
958
959 void
960 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
961 int nelems, enum dma_data_direction dir)
962 {
963 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
964 }
965 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
966
967 int
968 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
969 {
970 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
971 }
972 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
973
974 /*
975 * Return whether the given device DMA address mask can be supported
976 * properly. For example, if your device can only drive the low 24-bits
977 * during bus mastering, then you would pass 0x00ffffff as the mask to
978 * this function.
979 */
980 int
981 swiotlb_dma_supported(struct device *hwdev, u64 mask)
982 {
983 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
984 }
985 EXPORT_SYMBOL(swiotlb_dma_supported);
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