opcodes/ChangeLog

   1 2006-11-22  Daniel Jacobowitz  <dan@codesourcery.com>
   2
   3         * arm-dis.c (last_is_thumb): Delete.
   4         (enum map_type, last_type): New.
   5         (print_insn_data): New.
   6         (get_sym_code_type): Take MAP_TYPE argument.  Check the type of
   7         the right symbol.  Handle $d.
   8         (print_insn): Check for mapping symbols even without a normal
   9         symbol.  Adjust searching.  If $d is found see how much data
  10         to print.  Handle data.
  11
  12 2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
  13
  14         * m68k-opc.c (m68k_opcodes): Place trap instructions before set
  15         conditionals.  Add tpf coldfire instruction as alias for trapf.
  16
  17 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  18
  19         * i386-dis.c (print_insn): Check PREFIX_REPNZ before
  20         PREFIX_DATA when prefix user table is used.
  21
  22 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  23
  24         * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
  25         (twobyte_uses_DATA_prefix): This.
  26         (twobyte_uses_REPNZ_prefix): New.
  27         (twobyte_uses_REPZ_prefix): Likewise.
  28         (threebyte_0x38_uses_DATA_prefix): Likewise.
  29         (threebyte_0x38_uses_REPNZ_prefix): Likewise.
  30         (threebyte_0x38_uses_REPZ_prefix): Likewise.
  31         (threebyte_0x3a_uses_DATA_prefix): Likewise.
  32         (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
  33         (threebyte_0x3a_uses_REPZ_prefix): Likewise.
  34         (print_insn): Updated checking usages of DATA/REPNZ/REPZ
  35         prefixes.
  36
  37 2006-11-06  Troy Rollo  <troy@corvu.com.au>
  38
  39         * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
  40
  41 2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
  42
  43         * score-opc.h (score_opcodes): Delete modifier '0x'.
  44
  45 2006-10-30  Paul Brook  <paul@codesourcery.com>
  46
  47         * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
  48         (get_sym_code_type): New function.
  49         (print_insn): Search for mapping symbols.
  50
  51 2006-10-31  Mei Ligang  <ligang@sunnorth.com.cn>
  52
  53         * score-dis.c (print_insn): Correct the error code to print
  54         correct PCE instruction disassembly.
  55
  56 2006-10-26  Ben Elliston  <bje@au.ibm.com>
  57             Anton Blanchard  <anton@samba.org>
  58             Peter Bergner  <bergner@vnet.ibm.com>
  59
  60         * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
  61         AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
  62         (POWER6): Define.
  63         (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
  64         "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
  65         Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
  66         "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
  67         "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
  68         "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
  69         "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
  70         "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
  71         "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
  72         "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
  73         "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
  74         "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
  75         "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
  76         "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
  77         "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
  78         "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
  79         "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
  80         "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
  81         "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
  82         "diexq" and "diexq." opcodes.
  83
  84 2006-10-26  Daniel Jacobowitz  <dan@codesourcery.com>
  85
  86         * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
  87
  88 2006-10-25  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
  89             Yukishige Shibata  <shibata@rd.scei.sony.co.jp>
  90             Nobuhisa Fujinami  <fnami@rd.scei.sony.co.jp>
  91             Takeaki Fukuoka  <fukuoka@rd.scei.sony.co.jp>
  92             Alan Modra  <amodra@bigpond.net.au>
  93
  94         * spu-dis.c: New file.
  95         * spu-opc.c: New file.
  96         * configure.in: Add SPU support.
  97         * disassemble.c: Likewise.
  98         * Makefile.am: Likewise.  Run "make dep-am".
  99         * Makefile.in: Regenerate.
 100         * configure: Regenerate.
 101         * po/POTFILES.in: Regenerate.
 102
 103 2006-10-24  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 104
 105         * ppc-opc.c (CELL): New define.
 106         (powerpc_opcodes): Enable hrfid for Cell.  Add ldbrx and stdbrx,
 107         cell specific instructions.  Add {st,l}x{r,l}{,l} cell specific
 108         VMX instructions.
 109         * ppc-dis.c (powerpc_dialect): Handle cell.
 110
 111 2006-10-23  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 112
 113         * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
 114         amdfam10 architecture.
 115         (PREGRP37): NEW.
 116         (print_insn): Disallow REP prefix for POPCNT.
 117
 118 2006-10-20  Andrew Stubbs  <andrew.stubbs@st.com>
 119
 120         * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
 121         duplicating it.
 122
 123 2006-10-18  Dave Brolley  <brolley@redhat.com>
 124
 125         * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
 126         * configure: Regenerated.
 127
 128 2006-09-29  Alan Modra  <amodra@bigpond.net.au>
 129
 130         * po/POTFILES.in: Regenerate.
 131
 132 2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
 133             Joseph Myers  <joseph@codesourcery.com>
 134             Ian Lance Taylor  <ian@wasabisystems.com>
 135             Ben Elliston  <bje@wasabisystems.com>
 136
 137         * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
 138         only be used with the default multiply-add operation, so if N is
 139         set, don't bother printing X.  Add new iwmmxt instructions.
 140         (IWMMXT_INSN_COUNT): Update.
 141         (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
 142         with a 'c' suffix.
 143         (print_insn_coprocessor): Check for iWMMXt2.  Handle format
 144         specifiers 'r', 'i'.
 145
 146 2006-09-24  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 147
 148         PR binutils/3100
 149         * i386-dis.c (prefix_user_table): Fix the second operand of
 150         maskmovdqu instruction to allow only %xmm register instead of
 151         both %xmm register and memory.
 152
 153 2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 154
 155         PR binutils/3235
 156         * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
 157         address size prefix.
 158
 159 2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
 160
 161         * score-dis.c: New file.
 162         * score-opc.h: New file.
 163         * Makefile.am: Add Score files.
 164         * Makefile.in: Regenerate.
 165         * configure.in: Add support for Score target.
 166         * configure: Regenerate.
 167         * disassemble.c: Add support for Score target.
 168
 169 2006-09-16  Nick Clifton  <nickc@redhat.com>
 170             Pedro Alves  <pedro_alves@portugalmail.pt>
 171
 172         * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
 173         macros defined in bfd.h.
 174         * cris-dis.c: Likewise.
 175         * h8300-dis.c: Likewise.
 176         * i386-dis.c: Likewise.
 177         * ia64-gen.c: Likewise.
 178         * mips-dis: Likewise.
 179
 180 2006-09-04  Paul Brook  <paul@codesourcery.com>
 181
 182         * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 183
 184 2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
 185
 186         * i386-dis.c (three_byte_table): Expand to 256 elements.
 187
 188 2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 189
 190         PR binutils/3000
 191         * i386-dis.c (MXC,EMC): Define.
 192         (OP_MXC): New function to handle cvt* (convert instructions) between
 193         %xmm and %mm register correctly.
 194         (OP_EMC): ditto.
 195         (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
 196         instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
 197         with EMC/MXC.
 198
 199 2006-07-29  Richard Sandiford  <richard@codesourcery.com>
 200
 201         * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
 202         "fdaddl" entry.
 203
 204 2006-07-19  Paul Brook  <paul@codesourcery.com>
 205
 206         * armd-dis.c (arm_opcodes): Fix rbit opcode.
 207
 208 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 209
 210         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
 211         "sldt", "str" and "smsw".
 212
 213 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 214
 215         PR binutils/2829
 216         * i386-dis.c (GRP11_C6): NEW.
 217         (GRP11_C7): Likewise.
 218         (GRP12): Updated.
 219         (GRP13): Likewise.
 220         (GRP14): Likewise.
 221         (GRP15): Likewise.
 222         (GRP16): Likewise.
 223         (GRPAMD): Likewise.
 224         (GRPPADLCK1): Likewise.
 225         (GRPPADLCK2): Likewise.
 226         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
 227         respectively.
 228         (grps): Add entries for GRP11_C6 and GRP11_C7.
 229
 230 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
 231            Michael Meissner             <michael.meissner@amd.com>
 232
 233         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
 234         support for amdfam10 SSE4a/ABM instructions. Modify all
 235         initializer macros to have additional arguments. Disallow REP
 236         prefix for non-string instructions.
 237         (print_insn): Ditto.
 238
 239 2006-07-05  Julian Brown  <julian@codesourcery.com>
 240
 241         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
 242
 243 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 244
 245         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
 246         (twobyte_has_modrm): Set 1 for 0x1f.
 247
 248 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 249
 250         * i386-dis.c (NOP_Fixup): Removed.
 251         (NOP_Fixup1): New.
 252         (NOP_Fixup2): Likewise.
 253         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 254
 255 2006-06-12  Julian Brown  <julian@codesourcery.com>
 256
 257         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
 258         on 64-bit hosts.
 259
 260 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 261
 262         * i386.c (GRP10): Renamed to ...
 263         (GRP12): This.
 264         (GRP11): Renamed to ...
 265         (GRP13): This.
 266         (GRP12): Renamed to ...
 267         (GRP14): This.
 268         (GRP13): Renamed to ...
 269         (GRP15): This.
 270         (GRP14): Renamed to ...
 271         (GRP16): This.
 272         (dis386_twobyte): Updated.
 273         (grps): Likewise.
 274
 275 2006-06-09  Nick Clifton  <nickc@redhat.com>
 276
 277         * po/fi.po: Updated Finnish translation.
 278
 279 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 280
 281         * po/Make-in (pdf, ps): New dummy targets.
 282
 283 2006-06-06  Paul Brook  <paul@codesourcery.com>
 284
 285         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
 286         instructions.
 287         (neon_opcodes): Add conditional execution specifiers.
 288         (thumb_opcodes): Ditto.
 289         (thumb32_opcodes): Ditto.
 290         (arm_conditional): Change 0xe to "al" and add "" to end.
 291         (ifthen_state, ifthen_next_state, ifthen_address): New.
 292         (IFTHEN_COND): Define.
 293         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
 294         (print_insn_arm): Change %c to use new values of arm_conditional.
 295         (print_insn_thumb16): Print thumb conditions.  Add %I.
 296         (print_insn_thumb32): Print thumb conditions.
 297         (find_ifthen_state): New function.
 298         (print_insn): Track IT block state.
 299
 300 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 301             Anton Blanchard  <anton@samba.org>
 302             Peter Bergner  <bergner@vnet.ibm.com>
 303
 304         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 305         (print_ppc_disassembler_options): Mention power6.
 306
 307 2006-06-06  Thiemo Seufer  <ths@mips.com>
 308             Chao-ying Fu  <fu@mips.com>
 309
 310         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 311         * mips-opc.c: Add DSP64 instructions.
 312
 313 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 314
 315         * m68hc11-dis.c (print_insn): Warning fix.
 316
 317 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 318
 319         * po/Make-in (top_builddir): Define.
 320
 321 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 322
 323         * Makefile.am: Run "make dep-am".
 324         * Makefile.in: Regenerate.
 325         * config.in: Regenerate.
 326
 327 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 328
 329         * Makefile.am (INCLUDES): Use @INCINTL@.
 330         * acinclude.m4: Include new gettext macros.
 331         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 332         Remove local code for po/Makefile.
 333         * Makefile.in, aclocal.m4, configure: Regenerated.
 334
 335 2006-05-30  Nick Clifton  <nickc@redhat.com>
 336
 337         * po/es.po: Updated Spanish translation.
 338
 339 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 340
 341         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 342         and fmovem entries.  Put register list entries before immediate
 343         mask entries.  Use "l" rather than "L" in the fmovem entries.
 344         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 345         out from INFO.
 346         (m68k_scan_mask): New function, split out from...
 347         (print_insn_m68k): ...here.  If no architecture has been set,
 348         first try printing an m680x0 instruction, then try a Coldfire one.
 349
 350 2006-05-24  Nick Clifton  <nickc@redhat.com>
 351
 352         * po/ga.po: Updated Irish translation.
 353
 354 2006-05-22  Nick Clifton  <nickc@redhat.com>
 355
 356         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 357
 358 2006-05-22  Nick Clifton  <nickc@redhat.com>
 359
 360         * po/nl.po: Updated translation.
 361
 362 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 363
 364         * avr-dis.c: Formatting fix.
 365
 366 2006-05-14  Thiemo Seufer  <ths@mips.com>
 367
 368         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 369         (mips16_opcodes): Change membership of instructions to their
 370         lowest baseline ISA.
 371
 372 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 373
 374         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 375
 376 2006-05-05  Julian Brown  <julian@codesourcery.com>
 377
 378         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 379         vldm/vstm.
 380
 381 2006-05-05  Thiemo Seufer  <ths@mips.com>
 382             David Ung  <davidu@mips.com>
 383
 384         * mips-opc.c: Add macro for cache instruction.
 385
 386 2006-05-04  Thiemo Seufer  <ths@mips.com>
 387             Nigel Stephens  <nigel@mips.com>
 388             David Ung  <davidu@mips.com>
 389
 390         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 391         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 392         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 393         MIPS64R2.
 394         * mips-opc.c: fix random typos in comments.
 395         (INSN_SMARTMIPS): New defines.
 396         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 397         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 398         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 399         FP_S and FP_D flags to denote single and double register
 400         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 401         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 402         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 403         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 404         release 2 ISAs.
 405         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 406
 407 2006-05-03  Thiemo Seufer  <ths@mips.com>
 408
 409         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 410
 411 2006-05-02  Thiemo Seufer  <ths@mips.com>
 412             Nigel Stephens  <nigel@mips.com>
 413             David Ung  <davidu@mips.com>
 414
 415         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 416         (print_mips16_insn_arg): Force mips16 to odd addresses.
 417
 418 2006-04-30  Thiemo Seufer  <ths@mips.com>
 419             David Ung  <davidu@mips.com>
 420
 421         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 422         "udi0" to "udi15".
 423         * mips-dis.c (print_insn_args): Adds udi argument handling.
 424
 425 2006-04-28  James E Wilson  <wilson@specifix.com>
 426
 427         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 428         error message.
 429
 430 2006-04-28  Thiemo Seufer  <ths@mips.com>
 431             David Ung  <davidu@mips.com>
 432             Nigel Stephens  <nigel@mips.com>
 433
 434         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 435         names.
 436
 437 2006-04-28  Thiemo Seufer  <ths@mips.com>
 438             Nigel Stephens  <nigel@mips.com>
 439             David Ung  <davidu@mips.com>
 440
 441         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 442         (print_insn_mips):  Adjust print_insn_args call.
 443
 444 2006-04-28  Thiemo Seufer  <ths@mips.com>
 445             Nigel Stephens  <nigel@mips.com>
 446
 447         * mips-dis.c (print_insn_args): Print $fcc only for FP
 448         instructions, use $cc elsewise.
 449
 450 2006-04-28  Thiemo Seufer  <ths@mips.com>
 451             Nigel Stephens  <nigel@mips.com>
 452
 453         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 454         Map MIPS16 registers to O32 names.
 455         (print_mips16_insn_arg): Use mips16_reg_names.
 456
 457 2006-04-26  Julian Brown  <julian@codesourcery.com>
 458
 459         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 460         VMOV.
 461
 462 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 463             Julian Brown  <julian@codesourcery.com>
 464
 465         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 466         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 467         Add unified load/store instruction names.
 468         (neon_opcode_table): New.
 469         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 470         (arm_decode_bitfield): New.
 471         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 472         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 473         (print_insn_neon): New.
 474         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 475         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 476         (print_insn_thumb32): Likewise.
 477
 478 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 479
 480         * Makefile.am: Run "make dep-am".
 481         * Makefile.in: Regenerate.
 482
 483 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 484
 485         * avr-dis.c (avr_operand): Warning fix.
 486
 487         * configure: Regenerate.
 488
 489 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 490
 491         * po/POTFILES.in: Regenerated.
 492
 493 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 494
 495         PR binutils/2454
 496         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 497         the symolic form of an address, so that the output of objdump -d
 498         can be reassembled.
 499
 500 2006-04-10  DJ Delorie  <dj@redhat.com>
 501
 502         * m32c-asm.c: Regenerate.
 503
 504 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 505
 506         * Makefile.am: Add install-html target.
 507         * Makefile.in: Regenerate.
 508
 509 2006-04-06  Nick Clifton  <nickc@redhat.com>
 510
 511         * po/vi/po: Updated Vietnamese translation.
 512
 513 2006-03-31  Paul Koning  <ni1d@arrl.net>
 514
 515         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 516
 517 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 518
 519         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 520         logic to identify halfword shifts.
 521
 522 2006-03-16  Paul Brook  <paul@codesourcery.com>
 523
 524         * arm-dis.c (arm_opcodes): Rename swi to svc.
 525         (thumb_opcodes): Ditto.
 526
 527 2006-03-13  DJ Delorie  <dj@redhat.com>
 528
 529         * m32c-asm.c: Regenerate.
 530         * m32c-desc.c: Likewise.
 531         * m32c-desc.h: Likewise.
 532         * m32c-dis.c: Likewise.
 533         * m32c-ibld.c: Likewise.
 534         * m32c-opc.c: Likewise.
 535         * m32c-opc.h: Likewise.
 536
 537 2006-03-10  DJ Delorie  <dj@redhat.com>
 538
 539         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 540         * m32c-opc.c: Likewise.
 541         * m32c-opc.h: Likewise.
 542
 543
 544 2006-03-09  Nick Clifton  <nickc@redhat.com>
 545
 546         * po/sv.po: Updated Swedish translation.
 547
 548 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 549
 550         PR binutils/2428
 551         * i386-dis.c (REP_Fixup): New function.
 552         (AL): Remove duplicate.
 553         (Xbr): New.
 554         (Xvr): Likewise.
 555         (Ybr): Likewise.
 556         (Yvr): Likewise.
 557         (indirDXr): Likewise.
 558         (ALr): Likewise.
 559         (eAXr): Likewise.
 560         (dis386): Updated entries of ins, outs, movs, lods and stos.
 561
 562 2006-03-05  Nick Clifton  <nickc@redhat.com>
 563
 564         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 565         signed 32-bit value into an unsigned 32-bit field when the host is
 566         a 64-bit machine.
 567         * fr30-ibld.c: Regenerate.
 568         * frv-ibld.c: Regenerate.
 569         * ip2k-ibld.c: Regenerate.
 570         * iq2000-asm.c: Regenerate.
 571         * iq2000-ibld.c: Regenerate.
 572         * m32c-ibld.c: Regenerate.
 573         * m32r-ibld.c: Regenerate.
 574         * openrisc-ibld.c: Regenerate.
 575         * xc16x-ibld.c: Regenerate.
 576         * xstormy16-ibld.c: Regenerate.
 577
 578 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 579
 580         * xc16x-asm.c: Regenerate.
 581         * xc16x-dis.c: Regenerate.
 582
 583 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 584
 585         * po/Make-in: Add html target.
 586
 587 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 588
 589         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 590         Intel Merom New Instructions.
 591         (THREE_BYTE_0): Likewise.
 592         (THREE_BYTE_1): Likewise.
 593         (three_byte_table): Likewise.
 594         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 595         THREE_BYTE_1 for entry 0x3a.
 596         (twobyte_has_modrm): Updated.
 597         (twobyte_uses_SSE_prefix): Likewise.
 598         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 599         Instructions.
 600
 601 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 602
 603         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 604         (v9_hpriv_reg_names): New table.
 605         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 606         New cases '$' and '%' for read/write hyperprivileged register.
 607         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 608         window handling and rdhpr/wrhpr instructions.
 609
 610 2006-02-24  DJ Delorie  <dj@redhat.com>
 611
 612         * m32c-desc.c: Regenerate with linker relaxation attributes.
 613         * m32c-desc.h: Likewise.
 614         * m32c-dis.c: Likewise.
 615         * m32c-opc.c: Likewise.
 616
 617 2006-02-24  Paul Brook  <paul@codesourcery.com>
 618
 619         * arm-dis.c (arm_opcodes): Add V7 instructions.
 620         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 621         (print_arm_address): New function.
 622         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 623         (psr_name): New function.
 624         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 625
 626 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 627
 628         * ia64-opc-i.c (bXc): New.
 629         (mXc): Likewise.
 630         (OpX2TaTbYaXcC): Likewise.
 631         (TF). Likewise.
 632         (TFCM). Likewise.
 633         (ia64_opcodes_i): Add instructions for tf.
 634
 635         * ia64-opc.h (IMMU5b): New.
 636
 637         * ia64-asmtab.c: Regenerated.
 638
 639 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 640
 641         * ia64-gen.c: Update copyright years.
 642         * ia64-opc-b.c: Likewise.
 643
 644 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 645
 646         * ia64-gen.c (lookup_regindex): Handle ".vm".
 647         (print_dependency_table): Handle '\"'.
 648
 649         * ia64-ic.tbl: Updated from SDM 2.2.
 650         * ia64-raw.tbl: Likewise.
 651         * ia64-waw.tbl: Likewise.
 652         * ia64-asmtab.c: Regenerated.
 653
 654         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 655
 656 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 657             Anil Paranjape   <anilp1@kpitcummins.com>
 658             Shilin Shakti    <shilins@kpitcummins.com>
 659
 660         * xc16x-desc.h: New file
 661         * xc16x-desc.c: New file
 662         * xc16x-opc.h: New file
 663         * xc16x-opc.c: New file
 664         * xc16x-ibld.c: New file
 665         * xc16x-asm.c: New file
 666         * xc16x-dis.c: New file
 667         * Makefile.am: Entries for xc16x
 668         * Makefile.in: Regenerate
 669         * cofigure.in: Add xc16x target information.
 670         * configure: Regenerate.
 671         * disassemble.c: Add xc16x target information.
 672
 673 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 674
 675         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 676         moves.
 677
 678 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 679
 680         * i386-dis.c ('Z'): Add a new macro.
 681         (dis386_twobyte): Use "movZ" for control register moves.
 682
 683 2006-02-10  Nick Clifton  <nickc@redhat.com>
 684
 685         * iq2000-asm.c: Regenerate.
 686
 687 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 688
 689         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 690
 691 2006-01-26  David Ung  <davidu@mips.com>
 692
 693         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 694         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 695         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 696         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 697         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 698
 699 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 700
 701         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 702         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 703         disassembled.
 704         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 705         buffer overflows when disassembling instructions like
 706         ld (ix+123),0x23
 707         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 708         operand, if the offset is negative.
 709
 710 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 711
 712         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 713         unsigned char to hold data to be disassembled.
 714
 715 2006-01-17  Andreas Schwab  <schwab@suse.de>
 716
 717         PR binutils/1486
 718         * disassemble.c (disassemble_init_for_target): Set
 719         disassembler_needs_relocs for bfd_arch_arm.
 720
 721 2006-01-16  Paul Brook  <paul@codesourcery.com>
 722
 723         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 724         f?add?, and f?sub? instructions.
 725
 726 2006-01-16  Nick Clifton  <nickc@redhat.com>
 727
 728         * po/zh_CN.po: New Chinese (simplified) translation.
 729         * configure.in (ALL_LINGUAS): Add "zh_CH".
 730         * configure: Regenerate.
 731
 732 2006-01-05  Paul Brook  <paul@codesourcery.com>
 733
 734         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 735
 736 2006-01-06  DJ Delorie  <dj@redhat.com>
 737
 738         * m32c-desc.c: Regenerate.
 739         * m32c-opc.c: Regenerate.
 740         * m32c-opc.h: Regenerate.
 741
 742 2006-01-03  DJ Delorie  <dj@redhat.com>
 743
 744         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 745         * m32c-ibld.c: Regenerated.
 746
 747 For older changes see ChangeLog-2005
 748 \f
 749 Local Variables:
 750 mode: change-log
 751 left-margin: 8
 752 fill-column: 74
 753 version-control: never
 754 End: