opcodes/ChangeLog

   1 2005-10-26  DJ Delorie  <dj@redhat.com>
   2
   3         * m32c-asm.c: Regenerate.
   4         * m32c-desc.c: Regenerate.
   5         * m32c-desc.h: Regenerate.
   6         * m32c-dis.c: Regenerate.
   7         * m32c-ibld.c: Regenerate.
   8         * m32c-opc.c: Regenerate.
   9         * m32c-opc.h: Regenerate.
  10
  11 2005-10-26  Paul Brook  <paul@codesourcery.com>
  12
  13         * arm-dis.c (arm_opcodes): Correct "sel" entry.
  14
  15 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  16
  17         * m32r-asm.c: Regenerate.
  18
  19 2005-10-25  DJ Delorie  <dj@redhat.com>
  20
  21         * m32c-asm.c: Regenerate.
  22         * m32c-desc.c: Regenerate.
  23         * m32c-desc.h: Regenerate.
  24         * m32c-dis.c: Regenerate.
  25         * m32c-ibld.c: Regenerate.
  26         * m32c-opc.c: Regenerate.
  27         * m32c-opc.h: Regenerate.
  28
  29 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
  30
  31         * configure.in: Add target architecture bfd_arch_z80.
  32         * configure: Regenerated.
  33         * disassemble.c (disassembler)<ARCH_z80>: Add case
  34         bfd_arch_z80.
  35         * z80-dis.c: New file.
  36
  37 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
  38
  39         * po/POTFILES.in: Regenerate.
  40         * po/opcodes.pot: Regenerate.
  41
  42 2005-10-24  Jan Beulich  <jbeulich@novell.com>
  43
  44         * ia64-asmtab.c: Regenerate.
  45
  46 2005-10-21  DJ Delorie  <dj@redhat.com>
  47
  48         * m32c-asm.c: Regenerate.
  49         * m32c-desc.c: Regenerate.
  50         * m32c-desc.h: Regenerate.
  51         * m32c-dis.c: Regenerate.
  52         * m32c-ibld.c: Regenerate.
  53         * m32c-opc.c: Regenerate.
  54         * m32c-opc.h: Regenerate.
  55
  56 2005-10-21  Nick Clifton  <nickc@redhat.com>
  57
  58         * bfin-dis.c: Tidy up code, removing redundant constructs.
  59
  60 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  61
  62         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
  63         instructions.
  64
  65 2005-10-18  Nick Clifton  <nickc@redhat.com>
  66
  67         * m32r-asm.c: Regenerate after updating m32r.opc.
  68
  69 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
  70
  71         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
  72         reading instruction from memory.
  73
  74 2005-10-18  Nick Clifton  <nickc@redhat.com>
  75
  76         * m32r-asm.c: Regenerate after updating m32r.opc.
  77
  78 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  79
  80         * m32r-asm.c: Regenerate after updating m32r.opc.
  81
  82 2005-10-08  James Lemke  <jim@wasabisystems.com>
  83
  84         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  85         operations.
  86
  87 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  88
  89         * ppc-dis.c (struct dis_private): Remove.
  90         (powerpc_dialect): Avoid aliasing warnings.
  91         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
  92
  93 2005-09-30  Nick Clifton  <nickc@redhat.com>
  94
  95         * po/ga.po: New Irish translation.
  96         * configure.in (ALL_LINGUAS): Add "ga".
  97         * configure: Regenerate.
  98
  99 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 100
 101         * Makefile.am: Run "make dep-am".
 102         * Makefile.in: Regenerated.
 103         * aclocal.m4: Likewise.
 104         * configure: Likewise.
 105
 106 2005-09-30  Catherine Moore  <clm@cm00re.com>
 107
 108         * Makefile.am: Bfin support.
 109         * Makefile.in: Regenerated.
 110         * aclocal.m4: Regenerated.
 111         * bfin-dis.c: New file.
 112         * configure.in: Bfin support.
 113         * configure: Regenerated.
 114         * disassemble.c (ARCH_bfin): Define.
 115         (disassembler): Add case for bfd_arch_bfin.
 116
 117 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 118
 119         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 120         (indirEv): Use it.
 121         (stackEv): New.
 122         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 123         (dis386): Document and use new 'V' meta character. Use it for
 124         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 125         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 126         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 127         data prefix as used whenever DFLAG was examined. Handle 'V'.
 128         (intel_operand_size): Use stack_v_mode.
 129         (OP_E): Use stack_v_mode, but handle only the special case of
 130         64-bit mode without operand size override here; fall through to
 131         v_mode case otherwise.
 132         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 133         and no operand size override is present.
 134         (OP_J): Use get32s for obtaining the displacement also when rex64
 135         is present.
 136
 137 2005-09-08  Paul Brook  <paul@codesourcery.com>
 138
 139         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 140
 141 2005-09-06  Chao-ying Fu  <fu@mips.com>
 142
 143         * mips-opc.c (MT32): New define.
 144         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 145         bottom to avoid opcode collision with "mftr" and "mttr".
 146         Add MT instructions.
 147         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 148         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 149         formats.
 150
 151 2005-09-02  Paul Brook  <paul@codesourcery.com>
 152
 153         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 154
 155 2005-09-02  Paul Brook  <paul@codesourcery.com>
 156
 157         * arm-dis.c (coprocessor_opcodes): New.
 158         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 159         (print_insn_coprocessor): New function.
 160         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 161         format characters.
 162         (print_insn_thumb32): Use print_insn_coprocessor.
 163
 164 2005-08-30  Paul Brook  <paul@codesourcery.com>
 165
 166         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 167
 168 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 169
 170         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 171         re-use.
 172         (OP_E): Call intel_operand_size, move call site out of mode
 173         dependent code.
 174         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 175         ATTRIBUTE_UNUSED from parameters.
 176         (OP_OFF64): Likewise.
 177         (OP_ESreg): Call intel_operand_size.
 178         (OP_DSreg): Likewise.
 179         (OP_DIR): Use colon rather than semicolon as separator of far
 180         jump/call operands.
 181
 182 2005-08-25  Chao-ying Fu  <fu@mips.com>
 183
 184         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 185         (mips_builtin_opcodes): Add DSP instructions.
 186         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 187         mips64, mips64r2.
 188         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 189         operand formats.
 190
 191 2005-08-23  David Ung  <davidu@mips.com>
 192
 193         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 194         instructions to the table.
 195
 196 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 197
 198         * a29k-dis.c: Delete.
 199         * Makefile.am: Remove a29k support.
 200         * configure.in: Likewise.
 201         * disassemble.c: Likewise.
 202         * Makefile.in: Regenerate.
 203         * configure: Regenerate.
 204         * po/POTFILES.in: Regenerate.
 205
 206 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 207
 208         * ppc-dis.c (powerpc_dialect): Handle e300.
 209         (print_ppc_disassembler_options): Likewise.
 210         * ppc-opc.c (PPCE300): Define.
 211         (powerpc_opcodes): Mark icbt as available for the e300.
 212
 213 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 214
 215         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 216         Use "rp" instead of "%r2" in "b,l" insns.
 217
 218 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 219
 220         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 221         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 222         (main): Likewise.
 223         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 224         and 4 bit optional masks.
 225         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 226         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 227         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 228         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 229         (s390_opformats): Likewise.
 230         * s390-opc.txt: Add new instructions for cpu type z9-109.
 231
 232 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 233
 234         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 235
 236 2005-07-29  Paul Brook  <paul@codesourcery.com>
 237
 238         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 239
 240 2005-07-29  Paul Brook  <paul@codesourcery.com>
 241
 242         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 243         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 244
 245 2005-07-25  DJ Delorie  <dj@redhat.com>
 246
 247         * m32c-asm.c Regenerate.
 248         * m32c-dis.c Regenerate.
 249
 250 2005-07-20  DJ Delorie  <dj@redhat.com>
 251
 252         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 253         enums, so convert them to bit masks, which attributes are.
 254
 255 2005-07-18  Nick Clifton  <nickc@redhat.com>
 256
 257         * configure.in: Restore alpha ordering to list of arches.
 258         * configure: Regenerate.
 259         * disassemble.c: Restore alpha ordering to list of arches.
 260
 261 2005-07-18  Nick Clifton  <nickc@redhat.com>
 262
 263         * m32c-asm.c: Regenerate.
 264         * m32c-desc.c: Regenerate.
 265         * m32c-desc.h: Regenerate.
 266         * m32c-dis.c: Regenerate.
 267         * m32c-ibld.h: Regenerate.
 268         * m32c-opc.c: Regenerate.
 269         * m32c-opc.h: Regenerate.
 270
 271 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 272
 273         * i386-dis.c (PNI_Fixup): Update comment.
 274         (VMX_Fixup): Properly handle the suffix check.
 275
 276 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 277
 278         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 279         mfctl disassembly.
 280
 281 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 282
 283         * Makefile.am: Run "make dep-am".
 284         (stamp-m32c): Fix cpu dependencies.
 285         * Makefile.in: Regenerate.
 286         * ip2k-dis.c: Regenerate.
 287
 288 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 289
 290         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 291         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 292         (Em): New.
 293         (Gm): New.
 294         (VM): New.
 295         (dis386_twobyte): Updated entries 0x78 and 0x79.
 296         (twobyte_has_modrm): Likewise.
 297         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 298         (OP_G): Handle m_mode.
 299
 300 2005-07-14  Jim Blandy  <jimb@redhat.com>
 301
 302         Add support for the Renesas M32C and M16C.
 303         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 304         * m32c-desc.h, m32c-opc.h: New.
 305         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 306         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 307         m32c-opc.c.
 308         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 309         m32c-ibld.lo, m32c-opc.lo.
 310         (CLEANFILES): List stamp-m32c.
 311         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 312         (CGEN_CPUS): Add m32c.
 313         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 314         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 315         (m32c_opc_h): New variable.
 316         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 317         (m32c-opc.lo): New rules.
 318         * Makefile.in: Regenerated.
 319         * configure.in: Add case for bfd_m32c_arch.
 320         * configure: Regenerated.
 321         * disassemble.c (ARCH_m32c): New.
 322         [ARCH_m32c]: #include "m32c-desc.h".
 323         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 324         (disassemble_init_for_target) [ARCH_m32c]: Same.
 325
 326         * cgen-ops.h, cgen-types.h: New files.
 327         * Makefile.am (HFILES): List them.
 328         * Makefile.in: Regenerated.
 329
 330 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 331
 332         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 333         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 334         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 335         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 336         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 337         v850-dis.c: Fix format bugs.
 338         * ia64-gen.c (fail, warn): Add format attribute.
 339         * or32-opc.c (debug): Likewise.
 340
 341 2005-07-07  Khem Raj  <kraj@mvista.com>
 342
 343         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 344         disassembly pattern.
 345
 346 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 347
 348         * Makefile.am (stamp-m32r): Fix path to cpu files.
 349         (stamp-m32r, stamp-iq2000): Likewise.
 350         * Makefile.in: Regenerate.
 351         * m32r-asm.c: Regenerate.
 352         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 353         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 354
 355 2005-07-05  Nick Clifton  <nickc@redhat.com>
 356
 357         * iq2000-asm.c: Regenerate.
 358         * ms1-asm.c: Regenerate.
 359
 360 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 361
 362         * i386-dis.c (SVME_Fixup): New.
 363         (grps): Use it for the lidt entry.
 364         (PNI_Fixup): Call OP_M rather than OP_E.
 365         (INVLPG_Fixup): Likewise.
 366
 367 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 368
 369         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 370
 371 2005-07-01  Nick Clifton  <nickc@redhat.com>
 372
 373         * a29k-dis.c: Update to ISO C90 style function declarations and
 374         fix formatting.
 375         * alpha-opc.c: Likewise.
 376         * arc-dis.c: Likewise.
 377         * arc-opc.c: Likewise.
 378         * avr-dis.c: Likewise.
 379         * cgen-asm.in: Likewise.
 380         * cgen-dis.in: Likewise.
 381         * cgen-ibld.in: Likewise.
 382         * cgen-opc.c: Likewise.
 383         * cris-dis.c: Likewise.
 384         * d10v-dis.c: Likewise.
 385         * d30v-dis.c: Likewise.
 386         * d30v-opc.c: Likewise.
 387         * dis-buf.c: Likewise.
 388         * dlx-dis.c: Likewise.
 389         * h8300-dis.c: Likewise.
 390         * h8500-dis.c: Likewise.
 391         * hppa-dis.c: Likewise.
 392         * i370-dis.c: Likewise.
 393         * i370-opc.c: Likewise.
 394         * m10200-dis.c: Likewise.
 395         * m10300-dis.c: Likewise.
 396         * m68k-dis.c: Likewise.
 397         * m88k-dis.c: Likewise.
 398         * mips-dis.c: Likewise.
 399         * mmix-dis.c: Likewise.
 400         * msp430-dis.c: Likewise.
 401         * ns32k-dis.c: Likewise.
 402         * or32-dis.c: Likewise.
 403         * or32-opc.c: Likewise.
 404         * pdp11-dis.c: Likewise.
 405         * pj-dis.c: Likewise.
 406         * s390-dis.c: Likewise.
 407         * sh-dis.c: Likewise.
 408         * sh64-dis.c: Likewise.
 409         * sparc-dis.c: Likewise.
 410         * sparc-opc.c: Likewise.
 411         * sysdep.h: Likewise.
 412         * tic30-dis.c: Likewise.
 413         * tic4x-dis.c: Likewise.
 414         * tic80-dis.c: Likewise.
 415         * v850-dis.c: Likewise.
 416         * v850-opc.c: Likewise.
 417         * vax-dis.c: Likewise.
 418         * w65-dis.c: Likewise.
 419         * z8kgen.c: Likewise.
 420
 421         * fr30-*: Regenerate.
 422         * frv-*: Regenerate.
 423         * ip2k-*: Regenerate.
 424         * iq2000-*: Regenerate.
 425         * m32r-*: Regenerate.
 426         * ms1-*: Regenerate.
 427         * openrisc-*: Regenerate.
 428         * xstormy16-*: Regenerate.
 429
 430 2005-06-23  Ben Elliston  <bje@gnu.org>
 431
 432         * m68k-dis.c: Use ISC C90.
 433         * m68k-opc.c: Formatting fixes.
 434
 435 2005-06-16  David Ung  <davidu@mips.com>
 436
 437         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 438         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 439
 440 2005-06-15  Dave Brolley  <brolley@redhat.com>
 441
 442         Contribute Morpho ms1 on behalf of Red Hat
 443         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 444         ms1-opc.h: New files, Morpho ms1 target.
 445
 446         2004-05-14  Stan Cox  <scox@redhat.com>
 447
 448         * disassemble.c (ARCH_ms1): Define.
 449         (disassembler): Handle bfd_arch_ms1
 450
 451         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 452
 453         * Makefile.am, Makefile.in: Add ms1 target.
 454         * configure.in: Ditto.
 455
 456 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 457
 458         * arm-opc.h: Delete; fold contents into ...
 459         * arm-dis.c: ... here.  Move includes of internal COFF headers
 460         next to includes of internal ELF headers.
 461         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 462         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 463         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 464         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 465         (iwmmxt_wwnames, iwmmxt_wwssnames):
 466         Make const.
 467         (regnames): Remove iWMMXt coprocessor register sets.
 468         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 469         (get_arm_regnames): Adjust fourth argument to match above changes.
 470         (set_iwmmxt_regnames): Delete.
 471         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 472         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 473         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 474         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 475         ISO syntax for function pointer calls.
 476
 477 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 478
 479         * arm-dis.c: Split up the comments describing the format codes, so
 480         that the ARM and 16-bit Thumb opcode tables each have comments
 481         preceding them that describe all the codes, and only the codes,
 482         valid in those tables.  (32-bit Thumb table is already like this.)
 483         Reorder the lists in all three comments to match the order in
 484         which the codes are implemented.
 485         Remove all forward declarations of static functions.  Convert all
 486         function definitions to ISO C format.
 487         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 488         Return nothing.
 489         (print_insn_thumb16): Remove unused case 'I'.
 490         (print_insn): Update for changed calling convention of subroutines.
 491
 492 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 493
 494         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 495         hex (but retain it being displayed as signed). Remove redundant
 496         checks. Add handling of displacements for 16-bit addressing in Intel
 497         mode.
 498
 499 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 500
 501         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 502         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 503         masking of 'rm' in 16-bit memory address handling.
 504
 505 2005-05-19  Anton Blanchard  <anton@samba.org>
 506
 507         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 508         (print_ppc_disassembler_options): Document it.
 509         * ppc-opc.c (SVC_LEV): Define.
 510         (LEV): Allow optional operand.
 511         (POWER5): Define.
 512         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 513         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 514
 515 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 516
 517         * Makefile.in:  Regenerate.
 518
 519 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 520
 521         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 522         instructions.  Adjust disassembly of some opcodes to match
 523         unified syntax.
 524         (thumb32_opcodes): New table.
 525         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 526         two-halfword branches here.
 527         (print_insn_thumb32): New function.
 528         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 529         and print_insn_thumb32.  Be consistent about order of
 530         halfwords when printing 32-bit instructions.
 531
 532 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 533
 534         PR 843
 535         * i386-dis.c (branch_v_mode): New.
 536         (indirEv): Use branch_v_mode instead of v_mode.
 537         (OP_E): Handle branch_v_mode.
 538
 539 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 540
 541         * d10v-dis.c (dis_2_short): Support 64bit host.
 542
 543 2005-05-07  Nick Clifton  <nickc@redhat.com>
 544
 545         * po/nl.po: Updated translation.
 546
 547 2005-05-07  Nick Clifton  <nickc@redhat.com>
 548
 549         * Update the address and phone number of the FSF organization in
 550         the GPL notices in the following files:
 551         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 552         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 553         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 554         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 555         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 556         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 557         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 558         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 559         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 560         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 561         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 562         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 563         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 564         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 565         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 566         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 567         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 568         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 569         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 570         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 571         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 572         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 573         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 574         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 575         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 576         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 577         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 578         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 579         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 580         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 581         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 582         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 583         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 584
 585 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 586
 587         * ia64-opc.c: Include sysdep.h before libiberty.h.
 588
 589 2005-05-05  Nick Clifton  <nickc@redhat.com>
 590
 591         * configure.in (ALL_LINGUAS): Add vi.
 592         * configure: Regenerate.
 593         * po/vi.po: New.
 594
 595 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 596
 597         * configure.in: Fix the check for basename declaration.
 598         * configure: Regenerate.
 599
 600 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 601
 602         * ppc-opc.c (RTO): Define.
 603         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 604         entries to suit PPC440.
 605
 606 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 607
 608         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 609         Add xcrypt-ctr.
 610
 611 2005-04-14  Nick Clifton  <nickc@redhat.com>
 612
 613         * po/fi.po: New translation: Finnish.
 614         * configure.in (ALL_LINGUAS): Add fi.
 615         * configure: Regenerate.
 616
 617 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 618
 619         * Makefile.am (NO_WERROR): Define.
 620         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 621         * Makefile.in: Regenerate.
 622         * aclocal.m4: Regenerate.
 623         * configure: Regenerate.
 624
 625 2005-04-04  Nick Clifton  <nickc@redhat.com>
 626
 627         * fr30-asm.c: Regenerate.
 628         * frv-asm.c: Regenerate.
 629         * iq2000-asm.c: Regenerate.
 630         * m32r-asm.c: Regenerate.
 631         * openrisc-asm.c: Regenerate.
 632
 633 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 634
 635         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 636         visible operands in Intel mode. The first operand of monitor is
 637         %rax in 64-bit mode.
 638
 639 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 640
 641         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 642         easier future additions.
 643
 644 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 645
 646         * configure.in: Check for basename.
 647         * configure: Regenerate.
 648         * config.in: Ditto.
 649
 650 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 651
 652         * i386-dis.c (SEG_Fixup): New.
 653         (Sv): New.
 654         (dis386): Use "Sv" for 0x8c and 0x8e.
 655
 656 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 657             Nick Clifton  <nickc@redhat.com>
 658
 659         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 660         function entry mask addresses.
 661         (entry_addr_occupied_slots): New variable: The number of occupied
 662         elements in entry_addr.
 663         (entry_addr_total_slots): New variable: The total number of
 664         elements in entry_addr.
 665         (parse_disassembler_options): New function.  Fills in the entry_addr
 666         array.
 667         (free_entry_array): New function.  Release the memory used by the
 668         entry addr array.  Suppressed because there is no way to call it.
 669         (is_function_entry): Check if a given address is a function's
 670         start address by looking at supplied entry mask addresses and
 671         symbol information, if available.
 672         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 673
 674 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 675
 676         * cris-dis.c (print_with_operands): Use ~31L for long instead
 677         of ~31.
 678
 679 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 680
 681         * mmix-opc.c (O): Revert the last change.
 682         (Z): Likewise.
 683
 684 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 685
 686         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 687         (Z): Likewise.
 688
 689 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 690
 691         * mmix-opc.c (O, Z): Force expression as unsigned long.
 692
 693 2005-03-18  Nick Clifton  <nickc@redhat.com>
 694
 695         * ip2k-asm.c: Regenerate.
 696         * op/opcodes.pot: Regenerate.
 697
 698 2005-03-16  Nick Clifton  <nickc@redhat.com>
 699             Ben Elliston  <bje@au.ibm.com>
 700
 701         * configure.in (werror): New switch: Add -Werror to the
 702         compiler command line.  Enabled by default.  Disable via
 703         --disable-werror.
 704         * configure: Regenerate.
 705
 706 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 707
 708         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 709         BOOKE.
 710
 711 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 712
 713         * po/es.po: Commit new Spanish translation.
 714
 715         * po/fr.po: Commit new French translation.
 716
 717 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 718
 719         * vax-dis.c: Fix spelling error
 720         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 721         of just "Entry mask: < r1 ... >"
 722
 723 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 724
 725         * arm-dis.c (arm_opcodes): Document %E and %V.
 726         Add entries for v6T2 ARM instructions:
 727         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 728         (print_insn_arm): Add support for %E and %V.
 729         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 730
 731 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 732             Alan Modra  <amodra@bigpond.net.au>
 733
 734         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 735         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 736         (SPRG_MASK): Delete.
 737         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 738         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 739         mfsprg4..7 after msprg and consolidate.
 740
 741 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 742
 743         * vax-dis.c (entry_mask_bit): New array.
 744         (print_insn_vax): Decode function entry mask.
 745
 746 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 747
 748         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 749
 750 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 751
 752         * po/opcodes.pot: Regenerate.
 753
 754 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 755
 756         * arc-dis.c (a4_decoding_class): New enum.
 757         (dsmOneArcInst): Use the enum values for the decoding class.
 758         Remove redundant case in the switch for decodingClass value 11.
 759
 760 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 761
 762         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 763         accesses.
 764         (OP_C): Consider lock prefix in non-64-bit modes.
 765
 766 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 767
 768         * cris-dis.c (format_hex): Remove ineffective warning fix.
 769         * crx-dis.c (make_instruction): Warning fix.
 770         * frv-asm.c: Regenerate.
 771
 772 2005-02-23  Nick Clifton  <nickc@redhat.com>
 773
 774         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 775         read_memory.
 776
 777         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 778
 779         * crx-dis.c (make_instruction): Move argument structure into inner
 780         scope and ensure that all of its fields are initialised before
 781         they are used.
 782
 783         * fr30-asm.c: Regenerate.
 784         * fr30-dis.c: Regenerate.
 785         * frv-asm.c: Regenerate.
 786         * frv-dis.c: Regenerate.
 787         * ip2k-asm.c: Regenerate.
 788         * ip2k-dis.c: Regenerate.
 789         * iq2000-asm.c: Regenerate.
 790         * iq2000-dis.c: Regenerate.
 791         * m32r-asm.c: Regenerate.
 792         * m32r-dis.c: Regenerate.
 793         * openrisc-asm.c: Regenerate.
 794         * openrisc-dis.c: Regenerate.
 795         * xstormy16-asm.c: Regenerate.
 796         * xstormy16-dis.c: Regenerate.
 797
 798 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 799
 800         * arc-ext.c: Warning fixes.
 801         * arc-ext.h: Likewise.
 802         * cgen-opc.c: Likewise.
 803         * ia64-gen.c: Likewise.
 804         * maxq-dis.c: Likewise.
 805         * ns32k-dis.c: Likewise.
 806         * w65-dis.c: Likewise.
 807         * ia64-asmtab.c: Regenerate.
 808
 809 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 810
 811         * fr30-desc.c: Regenerate.
 812         * fr30-desc.h: Regenerate.
 813         * fr30-opc.c: Regenerate.
 814         * fr30-opc.h: Regenerate.
 815         * frv-desc.c: Regenerate.
 816         * frv-desc.h: Regenerate.
 817         * frv-opc.c: Regenerate.
 818         * frv-opc.h: Regenerate.
 819         * ip2k-desc.c: Regenerate.
 820         * ip2k-desc.h: Regenerate.
 821         * ip2k-opc.c: Regenerate.
 822         * ip2k-opc.h: Regenerate.
 823         * iq2000-desc.c: Regenerate.
 824         * iq2000-desc.h: Regenerate.
 825         * iq2000-opc.c: Regenerate.
 826         * iq2000-opc.h: Regenerate.
 827         * m32r-desc.c: Regenerate.
 828         * m32r-desc.h: Regenerate.
 829         * m32r-opc.c: Regenerate.
 830         * m32r-opc.h: Regenerate.
 831         * m32r-opinst.c: Regenerate.
 832         * openrisc-desc.c: Regenerate.
 833         * openrisc-desc.h: Regenerate.
 834         * openrisc-opc.c: Regenerate.
 835         * openrisc-opc.h: Regenerate.
 836         * xstormy16-desc.c: Regenerate.
 837         * xstormy16-desc.h: Regenerate.
 838         * xstormy16-opc.c: Regenerate.
 839         * xstormy16-opc.h: Regenerate.
 840
 841 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 842
 843         * Makefile.am: Run "make dep-am"
 844         * Makefile.in: Regenerate.
 845
 846 2005-02-15  Nick Clifton  <nickc@redhat.com>
 847
 848         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 849         compile time warnings.
 850         (print_keyword): Likewise.
 851         (default_print_insn): Likewise.
 852
 853         * fr30-desc.c: Regenerated.
 854         * fr30-desc.h: Regenerated.
 855         * fr30-dis.c: Regenerated.
 856         * fr30-opc.c: Regenerated.
 857         * fr30-opc.h: Regenerated.
 858         * frv-desc.c: Regenerated.
 859         * frv-dis.c: Regenerated.
 860         * frv-opc.c: Regenerated.
 861         * ip2k-asm.c: Regenerated.
 862         * ip2k-desc.c: Regenerated.
 863         * ip2k-desc.h: Regenerated.
 864         * ip2k-dis.c: Regenerated.
 865         * ip2k-opc.c: Regenerated.
 866         * ip2k-opc.h: Regenerated.
 867         * iq2000-desc.c: Regenerated.
 868         * iq2000-dis.c: Regenerated.
 869         * iq2000-opc.c: Regenerated.
 870         * m32r-asm.c: Regenerated.
 871         * m32r-desc.c: Regenerated.
 872         * m32r-desc.h: Regenerated.
 873         * m32r-dis.c: Regenerated.
 874         * m32r-opc.c: Regenerated.
 875         * m32r-opc.h: Regenerated.
 876         * m32r-opinst.c: Regenerated.
 877         * openrisc-desc.c: Regenerated.
 878         * openrisc-desc.h: Regenerated.
 879         * openrisc-dis.c: Regenerated.
 880         * openrisc-opc.c: Regenerated.
 881         * openrisc-opc.h: Regenerated.
 882         * xstormy16-desc.c: Regenerated.
 883         * xstormy16-desc.h: Regenerated.
 884         * xstormy16-dis.c: Regenerated.
 885         * xstormy16-opc.c: Regenerated.
 886         * xstormy16-opc.h: Regenerated.
 887
 888 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 889
 890         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 891         address.
 892
 893 2005-02-11  Nick Clifton  <nickc@redhat.com>
 894
 895         * iq2000-asm.c: Regenerate.
 896
 897         * frv-dis.c: Regenerate.
 898
 899 2005-02-07  Jim Blandy  <jimb@redhat.com>
 900
 901         * Makefile.am (CGEN): Load guile.scm before calling the main
 902         application script.
 903         * Makefile.in: Regenerated.
 904         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 905         Simply pass the cgen-opc.scm path to ${cgen} as its first
 906         argument; ${cgen} itself now contains the '-s', or whatever is
 907         appropriate for the Scheme being used.
 908
 909 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 910
 911         * configure: Regenerate to track ../gettext.m4.
 912
 913 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 914
 915         * ia64-gen.c (NELEMS): Define.
 916         (shrink): Generate alias with missing second predicate register when
 917         opcode has two outputs and these are both predicates.
 918         * ia64-opc-i.c (FULL17): Define.
 919         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 920         here to generate output template.
 921         (TBITCM, TNATCM): Undefine after use.
 922         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 923         first input. Add ld16 aliases without ar.csd as second output. Add
 924         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 925         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 926         ar.ccv as third/fourth inputs. Consolidate through...
 927         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 928         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 929         * ia64-asmtab.c: Regenerate.
 930
 931 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 932
 933         * configure: Regenerate to track ../gettext.m4 change.
 934
 935 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 936
 937         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 938         * frv-asm.c: Rebuilt.
 939         * frv-desc.c: Rebuilt.
 940         * frv-desc.h: Rebuilt.
 941         * frv-dis.c: Rebuilt.
 942         * frv-ibld.c: Rebuilt.
 943         * frv-opc.c: Rebuilt.
 944         * frv-opc.h: Rebuilt.
 945
 946 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 947
 948         * configure: Regenerate, ../gettext.m4 was updated.
 949
 950 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 951
 952         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 953         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 954         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 955         * mips-dis.c: Ditto.
 956
 957 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 958
 959         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 960
 961 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 962
 963         * mips-dis.c (no_aliases): New disassembly option flag.
 964         (set_default_mips_dis_options): Init no_aliases to zero.
 965         (parse_mips_dis_option): Handle no-aliases option.
 966         (print_insn_mips): Ignore table entries that are aliases
 967         if no_aliases is set.
 968         (print_insn_mips16): Ditto.
 969         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 970         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 971         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 972         * mips16-opc.c (mips16_opcodes): Ditto.
 973
 974 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 975
 976         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 977         (inheritance diagram): Add missing edge.
 978         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 979         easier for the testsuite.
 980         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 981         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 982         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 983         arch_sh2a_or_sh4_up child.
 984         (sh_table): Do renaming as above.
 985         Correct comment for ldc.l for gas testsuite to read.
 986         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 987         Correct comments for movy.w and movy.l for gas testsuite to read.
 988         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 989
 990 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 991
 992         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 993
 994 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 995
 996         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 997
 998 2005-01-10  Andreas Schwab  <schwab@suse.de>
 999
1000         * disassemble.c (disassemble_init_for_target) <case
1001         bfd_arch_ia64>: Set skip_zeroes to 16.
1002         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1003
1004 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1005
1006         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1007
1008 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1009
1010         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1011         memory references. Convert avr_operand() to C90 formatting.
1012
1013 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1014
1015         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1016
1017 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1018
1019         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1020         (no_op_insn): Initialize array with instructions that have no
1021         operands.
1022         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1023
1024 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1025
1026         * arm-dis.c: Correct top-level comment.
1027
1028 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1029
1030         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1031         architecuture defining the insn.
1032         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1033         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1034         field.
1035         Also include opcode/arm.h.
1036         * Makefile.am (arm-dis.lo): Update dependency list.
1037         * Makefile.in: Regenerate.
1038
1039 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1040
1041         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1042         reflect the change to the short immediate syntax.
1043
1044 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1045
1046         * or32-opc.c (debug): Warning fix.
1047         * po/POTFILES.in: Regenerate.
1048
1049         * maxq-dis.c: Formatting.
1050         (print_insn): Warning fix.
1051
1052 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1053
1054         * arm-dis.c (WORD_ADDRESS): Define.
1055         (print_insn): Use it.  Correct big-endian end-of-section handling.
1056
1057 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1058             Vineet Sharma      <vineets@noida.hcltech.com>
1059
1060         * maxq-dis.c: New file.
1061         * disassemble.c (ARCH_maxq): Define.
1062         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1063         instructions..
1064         * configure.in: Add case for bfd_maxq_arch.
1065         * configure: Regenerate.
1066         * Makefile.am: Add support for maxq-dis.c
1067         * Makefile.in: Regenerate.
1068         * aclocal.m4: Regenerate.
1069
1070 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1071
1072         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1073         mode.
1074         * crx-dis.c: Likewise.
1075
1076 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1077
1078         Generally, handle CRISv32.
1079         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1080         (struct cris_disasm_data): New type.
1081         (format_reg, format_hex, cris_constraint, print_flags)
1082         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1083         callers changed.
1084         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1085         (print_insn_crisv32_without_register_prefix)
1086         (print_insn_crisv10_v32_with_register_prefix)
1087         (print_insn_crisv10_v32_without_register_prefix)
1088         (cris_parse_disassembler_options): New functions.
1089         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1090         parameter.  All callers changed.
1091         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1092         failure.
1093         (cris_constraint) <case 'Y', 'U'>: New cases.
1094         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1095         for constraint 'n'.
1096         (print_with_operands) <case 'Y'>: New case.
1097         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1098         <case 'N', 'Y', 'Q'>: New cases.
1099         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1100         (print_insn_cris_with_register_prefix)
1101         (print_insn_cris_without_register_prefix): Call
1102         cris_parse_disassembler_options.
1103         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1104         for CRISv32 and the size of immediate operands.  New v32-only
1105         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1106         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1107         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1108         Change brp to be v3..v10.
1109         (cris_support_regs): New vector.
1110         (cris_opcodes): Update head comment.  New format characters '[',
1111         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1112         Add new opcodes for v32 and adjust existing opcodes to accommodate
1113         differences to earlier variants.
1114         (cris_cond15s): New vector.
1115
1116 2004-11-04 Jan Beulich <jbeulich@novell.com>
1117
1118         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1119         (indirEb): Remove.
1120         (Mp): Use f_mode rather than none at all.
1121         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1122         replaces what previously was x_mode; x_mode now means 128-bit SSE
1123         operands.
1124         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1125         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1126         pinsrw's second operand is Edqw.
1127         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1128         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1129         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1130         mode when an operand size override is present or always suffixing.
1131         More instructions will need to be added to this group.
1132         (putop): Handle new macro chars 'C' (short/long suffix selector),
1133         'I' (Intel mode override for following macro char), and 'J' (for
1134         adding the 'l' prefix to far branches in AT&T mode). When an
1135         alternative was specified in the template, honor macro character when
1136         specified for Intel mode.
1137         (OP_E): Handle new *_mode values. Correct pointer specifications for
1138         memory operands. Consolidate output of index register.
1139         (OP_G): Handle new *_mode values.
1140         (OP_I): Handle const_1_mode.
1141         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1142         respective opcode prefix bits have been consumed.
1143         (OP_EM, OP_EX): Provide some default handling for generating pointer
1144         specifications.
1145
1146 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1147
1148         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1149         COP_INST macro.
1150
1151 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1152
1153         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1154         (getregliststring): Support HI/LO and user registers.
1155         * crx-opc.c (crx_instruction): Update data structure according to the
1156         rearrangement done in CRX opcode header file.
1157         (crx_regtab):  Likewise.
1158         (crx_optab):  Likewise.
1159         (crx_instruction): Reorder load/stor instructions, remove unsupported
1160         formats.
1161         support new Co-Processor instruction 'cpi'.
1162
1163 2004-10-27  Nick Clifton  <nickc@redhat.com>
1164
1165         * opcodes/iq2000-asm.c: Regenerate.
1166         * opcodes/iq2000-desc.c: Regenerate.
1167         * opcodes/iq2000-desc.h: Regenerate.
1168         * opcodes/iq2000-dis.c: Regenerate.
1169         * opcodes/iq2000-ibld.c: Regenerate.
1170         * opcodes/iq2000-opc.c: Regenerate.
1171         * opcodes/iq2000-opc.h: Regenerate.
1172
1173 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1174
1175         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1176         us4, us5 (respectively).
1177         Remove unsupported 'popa' instruction.
1178         Reverse operands order in store co-processor instructions.
1179
1180 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1181
1182         * Makefile.am: Run "make dep-am"
1183         * Makefile.in: Regenerate.
1184
1185 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1186
1187         * xtensa-dis.c: Use ISO C90 formatting.
1188
1189 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1190
1191         * ppc-opc.c: Revert 2004-09-09 change.
1192
1193 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1194
1195         * xtensa-dis.c (state_names): Delete.
1196         (fetch_data): Use xtensa_isa_maxlength.
1197         (print_xtensa_operand): Replace operand parameter with opcode/operand
1198         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1199         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1200         instruction bundles.  Use xmalloc instead of malloc.
1201
1202 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1203
1204         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1205         initializers.
1206
1207 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1208
1209         * crx-opc.c (crx_instruction): Support Co-processor insns.
1210         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1211         (getregliststring): Change function to use the above enum.
1212         (print_arg): Handle CO-Processor insns.
1213         (crx_cinvs): Add 'b' option to invalidate the branch-target
1214         cache.
1215
1216 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1217
1218         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1219         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1220         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1221         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1222         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1223
1224 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1225
1226         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1227         rather than add it.
1228
1229 2004-09-30  Paul Brook  <paul@codesourcery.com>
1230
1231         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1232         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1233
1234 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1235
1236         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1237         (CONFIG_STATUS_DEPENDENCIES): New.
1238         (Makefile): Removed.
1239         (config.status): Likewise.
1240         * Makefile.in: Regenerated.
1241
1242 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1243
1244         * Makefile.am: Run "make dep-am".
1245         * Makefile.in: Regenerate.
1246         * aclocal.m4: Regenerate.
1247         * configure: Regenerate.
1248         * po/POTFILES.in: Regenerate.
1249         * po/opcodes.pot: Regenerate.
1250
1251 2004-09-11  Andreas Schwab  <schwab@suse.de>
1252
1253         * configure: Rebuild.
1254
1255 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1256
1257         * ppc-opc.c (L): Make this field not optional.
1258
1259 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1260
1261         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1262         Fix parameter to 'm[t|f]csr' insns.
1263
1264 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1265
1266         * configure.in: Autoupdate to autoconf 2.59.
1267         * aclocal.m4: Rebuild with aclocal 1.4p6.
1268         * configure: Rebuild with autoconf 2.59.
1269         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1270         bfd changes for autoconf 2.59 on the way).
1271         * config.in: Rebuild with autoheader 2.59.
1272
1273 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1274
1275         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1276
1277 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1278
1279         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1280         (GRPPADLCK2): New define.
1281         (twobyte_has_modrm): True for 0xA6.
1282         (grps): GRPPADLCK2 for opcode 0xA6.
1283
1284 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1285
1286         Introduce SH2a support.
1287         * sh-opc.h (arch_sh2a_base): Renumber.
1288         (arch_sh2a_nofpu_base): Remove.
1289         (arch_sh_base_mask): Adjust.
1290         (arch_opann_mask): New.
1291         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1292         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1293         (sh_table): Adjust whitespace.
1294         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1295         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1296         instruction list throughout.
1297         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1298         of arch_sh2a in instruction list throughout.
1299         (arch_sh2e_up): Accomodate above changes.
1300         (arch_sh2_up): Ditto.
1301         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1302         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1303         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1304         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1305         * sh-opc.h (arch_sh2a_nofpu): New.
1306         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1307         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1308         instruction.
1309         2004-01-20  DJ Delorie  <dj@redhat.com>
1310         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1311         2003-12-29  DJ Delorie  <dj@redhat.com>
1312         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1313         sh_opcode_info, sh_table): Add sh2a support.
1314         (arch_op32): New, to tag 32-bit opcodes.
1315         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1316         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1317         * sh-opc.h (arch_sh2a): Add.
1318         * sh-dis.c (arch_sh2a): Handle.
1319         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1320
1321 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1322
1323         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1324
1325 2004-07-22  Nick Clifton  <nickc@redhat.com>
1326
1327         PR/280
1328         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1329         insns - this is done by objdump itself.
1330         * h8500-dis.c (print_insn_h8500): Likewise.
1331
1332 2004-07-21  Jan Beulich <jbeulich@novell.com>
1333
1334         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1335         regardless of address size prefix in effect.
1336         (ptr_reg): Size or address registers does not depend on rex64, but
1337         on the presence of an address size override.
1338         (OP_MMX): Use rex.x only for xmm registers.
1339         (OP_EM): Use rex.z only for xmm registers.
1340
1341 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1342
1343         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1344         move/branch operations to the bottom so that VR5400 multimedia
1345         instructions take precedence in disassembly.
1346
1347 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1348
1349         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1350         ISA-specific "break" encoding.
1351
1352 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1353
1354         * arm-opc.h: Fix typo in comment.
1355
1356 2004-07-11  Andreas Schwab  <schwab@suse.de>
1357
1358         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1359
1360 2004-07-09  Andreas Schwab  <schwab@suse.de>
1361
1362         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1363
1364 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1365
1366         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1367         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1368         (crx-dis.lo): New target.
1369         (crx-opc.lo): Likewise.
1370         * Makefile.in: Regenerate.
1371         * configure.in: Handle bfd_crx_arch.
1372         * configure: Regenerate.
1373         * crx-dis.c: New file.
1374         * crx-opc.c: New file.
1375         * disassemble.c (ARCH_crx): Define.
1376         (disassembler): Handle ARCH_crx.
1377
1378 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1379
1380         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1381         * ia64-asmtab.c: Regnerate.
1382
1383 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1384
1385         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1386         (extract_fxm): Don't test dialect.
1387         (XFXFXM_MASK): Include the power4 bit.
1388         (XFXM): Add p4 param.
1389         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1390
1391 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1392
1393         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1394         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1395
1396 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1397
1398         * ppc-opc.c (BH, XLBH_MASK): Define.
1399         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1400
1401 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1402
1403         * i386-dis.c (x_mode): Comment.
1404         (two_source_ops): File scope.
1405         (float_mem): Correct fisttpll and fistpll.
1406         (float_mem_mode): New table.
1407         (dofloat): Use it.
1408         (OP_E): Correct intel mode PTR output.
1409         (ptr_reg): Use open_char and close_char.
1410         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1411         operands.  Set two_source_ops.
1412
1413 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1414
1415         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1416         instead of _raw_size.
1417
1418 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1419
1420         * ia64-gen.c (in_iclass): Handle more postinc st
1421         and ld variants.
1422         * ia64-asmtab.c: Rebuilt.
1423
1424 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1425
1426         * s390-opc.txt: Correct architecture mask for some opcodes.
1427         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1428         in the esa mode as well.
1429
1430 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1431
1432         * sh-dis.c (target_arch): Make unsigned.
1433         (print_insn_sh): Replace (most of) switch with a call to
1434         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1435         * sh-opc.h: Redefine architecture flags values.
1436         Add sh3-nommu architecture.
1437         Reorganise <arch>_up macros so they make more visual sense.
1438         (SH_MERGE_ARCH_SET): Define new macro.
1439         (SH_VALID_BASE_ARCH_SET): Likewise.
1440         (SH_VALID_MMU_ARCH_SET): Likewise.
1441         (SH_VALID_CO_ARCH_SET): Likewise.
1442         (SH_VALID_ARCH_SET): Likewise.
1443         (SH_MERGE_ARCH_SET_VALID): Likewise.
1444         (SH_ARCH_SET_HAS_FPU): Likewise.
1445         (SH_ARCH_SET_HAS_DSP): Likewise.
1446         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1447         (sh_get_arch_from_bfd_mach): Add prototype.
1448         (sh_get_arch_up_from_bfd_mach): Likewise.
1449         (sh_get_bfd_mach_from_arch_set): Likewise.
1450         (sh_merge_bfd_arc): Likewise.
1451
1452 2004-05-24  Peter Barada  <peter@the-baradas.com>
1453
1454         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1455         into new match_insn_m68k function.  Loop over canidate
1456         matches and select first that completely matches.
1457         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1458         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1459         to verify addressing for MAC/EMAC.
1460         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1461         reigster halves since 'fpu' and 'spl' look misleading.
1462         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1463         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1464         first, tighten up match masks.
1465         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1466         'size' from special case code in print_insn_m68k to
1467         determine decode size of insns.
1468
1469 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1470
1471         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1472         well as when -mpower4.
1473
1474 2004-05-13  Nick Clifton  <nickc@redhat.com>
1475
1476         * po/fr.po: Updated French translation.
1477
1478 2004-05-05  Peter Barada  <peter@the-baradas.com>
1479
1480         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1481         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1482         * m68k-op.c: Switch from ColdFire chips to core variants.
1483
1484 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1485
1486         PR 147.
1487         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1488
1489 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1490
1491         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1492         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1493
1494 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1495
1496         * sh-dis.c (print_insn_sh): Print the value in constant pool
1497         as a symbol if it looks like a symbol.
1498
1499 2004-04-22  Peter Barada <peter@the-baradas.com>
1500
1501         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1502         appropriate ColdFire architectures.
1503         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1504         mask addressing.
1505         Add EMAC instructions, fix MAC instructions. Remove
1506         macmw/macml/msacmw/msacml instructions since mask addressing now
1507         supported.
1508
1509 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1510
1511         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1512         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1513         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1514         macro.  Adjust all users.
1515
1516 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1517
1518         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1519         separately.
1520
1521 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1522
1523         * m32r-asm.c: Regenerate.
1524
1525 2004-03-29  Stan Shebs  <shebs@apple.com>
1526
1527         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1528         used.
1529
1530 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1531
1532         * aclocal.m4: Regenerate.
1533         * config.in: Regenerate.
1534         * configure: Regenerate.
1535         * po/POTFILES.in: Regenerate.
1536         * po/opcodes.pot: Regenerate.
1537
1538 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1539
1540         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1541         PPC_OPERANDS_GPR_0.
1542         * ppc-opc.c (RA0): Define.
1543         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1544         (RAOPT): Rename from RAO.  Update all uses.
1545         (powerpc_opcodes): Use RA0 as appropriate.
1546
1547 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1548
1549         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1550
1551 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1552
1553         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1554
1555 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1556
1557         * i386-dis.c (GRPPLOCK): Delete.
1558         (grps): Delete GRPPLOCK entry.
1559
1560 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1561
1562         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1563         (M, Mp): Use OP_M.
1564         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1565         (GRPPADLCK): Define.
1566         (dis386): Use NOP_Fixup on "nop".
1567         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1568         (twobyte_has_modrm): Set for 0xa7.
1569         (padlock_table): Delete.  Move to..
1570         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1571         and clflush.
1572         (print_insn): Revert PADLOCK_SPECIAL code.
1573         (OP_E): Delete sfence, lfence, mfence checks.
1574
1575 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1576
1577         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1578         (INVLPG_Fixup): New function.
1579         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1580
1581 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1582
1583         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1584         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1585         (padlock_table): New struct with PadLock instructions.
1586         (print_insn): Handle PADLOCK_SPECIAL.
1587
1588 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1589
1590         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1591         (OP_E): Twiddle clflush to sfence here.
1592
1593 2004-03-08  Nick Clifton  <nickc@redhat.com>
1594
1595         * po/de.po: Updated German translation.
1596
1597 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1598
1599         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1600         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1601         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1602         accordingly.
1603
1604 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1605
1606         * frv-asm.c: Regenerate.
1607         * frv-desc.c: Regenerate.
1608         * frv-desc.h: Regenerate.
1609         * frv-dis.c: Regenerate.
1610         * frv-ibld.c: Regenerate.
1611         * frv-opc.c: Regenerate.
1612         * frv-opc.h: Regenerate.
1613
1614 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1615
1616         * frv-desc.c, frv-opc.c: Regenerate.
1617
1618 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1619
1620         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1621
1622 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1623
1624         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1625         Also correct mistake in the comment.
1626
1627 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1628
1629         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1630         ensure that double registers have even numbers.
1631         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1632         that reserved instruction 0xfffd does not decode the same
1633         as 0xfdfd (ftrv).
1634         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1635         REG_N refers to a double register.
1636         Add REG_N_B01 nibble type and use it instead of REG_NM
1637         in ftrv.
1638         Adjust the bit patterns in a few comments.
1639
1640 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1641
1642         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1643
1644 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1645
1646         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1647
1648 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1649
1650         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1651
1652 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1653
1654         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1655         mtivor32, mtivor33, mtivor34.
1656
1657 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1658
1659         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1660
1661 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1662
1663         * arm-opc.h Maverick accumulator register opcode fixes.
1664
1665 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1666
1667         * m32r-dis.c: Regenerate.
1668
1669 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1670
1671         * sh-opc.h (sh_table): "fsrra", not "fssra".
1672
1673 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1674
1675         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1676         contraints.
1677
1678 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1679
1680         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1681
1682 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1683
1684         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1685         1.  Don't print scale factor on AT&T mode when index missing.
1686
1687 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1688
1689         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1690         when loaded into XR registers.
1691
1692 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1693
1694         * frv-desc.h: Regenerate.
1695         * frv-desc.c: Regenerate.
1696         * frv-opc.c: Regenerate.
1697
1698 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1699
1700         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1701
1702 2004-01-09  Paul Brook  <paul@codesourcery.com>
1703
1704         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1705         specific opcodes.
1706
1707 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1708
1709         * Makefile.am (libopcodes_la_DEPENDENCIES)
1710         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1711         comment about the problem.
1712         * Makefile.in: Regenerate.
1713
1714 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1715
1716         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1717         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1718         cut&paste errors in shifting/truncating numerical operands.
1719         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1720         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1721         (parse_uslo16): Likewise.
1722         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1723         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1724         (parse_s12): Likewise.
1725         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1726         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1727         (parse_uslo16): Likewise.
1728         (parse_uhi16): Parse gothi and gotfuncdeschi.
1729         (parse_d12): Parse got12 and gotfuncdesc12.
1730         (parse_s12): Likewise.
1731
1732 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1733
1734         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1735         instruction which looks similar to an 'rla' instruction.
1736
1737 For older changes see ChangeLog-0203
1738 \f
1739 Local Variables:
1740 mode: change-log
1741 left-margin: 8
1742 fill-column: 74
1743 version-control: never
1744 End: