opcodes/ChangeLog

   1 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
   2
   3         * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
   4
   5 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
   6
   7         * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
   8         Use branch types instead.
   9         (print_insn): Likewise.
  10
  11 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  12
  13         * mips-opc.c (mips_builtin_opcodes): Correct register use
  14         annotation of "alnv.ps".
  15
  16 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  17
  18         * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
  19
  20 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  21
  22         * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
  23
  24 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
  27
  28 2011-02-19  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * bfin-dis.c (saved_state): Mark static.  Change a[01]x to ax[] and
  31         a[01]w to aw[].  Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
  32         av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
  33         exception, end_of_registers, msize, memory, bfd_mach.
  34         (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
  35         LB0REG, LC1REG, LT1REG, LB1REG): Delete
  36         (AXREG, AWREG, LCREG, LTREG, LBREG): Define.
  37         (get_allreg): Change to new defines.  Fallback to abort().
  38
  39 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * bfin-dis.c: Add whitespace/parenthesis where needed.
  42
  43 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
  44
  45         * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
  46         than 7.
  47
  48 2011-02-13  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  49
  50         * configure: Regenerate.
  51
  52 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
  53
  54         * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
  55
  56 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
  57
  58         * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1.  Output
  59         dregs only when P is set, and dregs_lo otherwise.
  60
  61 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
  62
  63         * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
  64
  65 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
  68
  69 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
  70
  71         * bfin-dis.c (machine_registers): Delete REG_GP.
  72         (reg_names): Delete "GP".
  73         (decode_allregs): Change REG_GP to REG_LASTREG.
  74
  75 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
  76
  77         * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
  78         M_IH, M_IU): Delete.
  79
  80 2011-02-11  Mike Frysinger  <vapier@gentoo.org>
  81
  82         * bfin-dis.c (reg_names): Add const.
  83         (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
  84         decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
  85         decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
  86         decode_counters, decode_allregs): Likewise.
  87
  88 2011-02-09  Michael Snyder  <msnyder@vmware.com>
  89
  90         * i386-dis.c (OP_J): Parenthesize expression to prevent
  91         truncated addresses.
  92         (print_insn): Fix indentation off-by-one.
  93
  94 2011-02-01  Nick Clifton  <nickc@redhat.com>
  95
  96         * po/da.po: Updated Danish translation.
  97
  98 2011-01-21  Dave Murphy  <davem@devkitpro.org>
  99
 100         * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
 101
 102 2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
 103
 104         * i386-dis.c (sIbT): New.
 105         (b_T_mode): Likewise.
 106         (dis386): Replace sIb with sIbT on "pushT".
 107         (x86_64_table): Replace sIb with Ib on "aam" and "aad".
 108         (OP_sI): Handle b_T_mode.  Properly sign-extend byte.
 109
 110 2011-01-18  Jan Kratochvil  <jan.kratochvil@redhat.com>
 111
 112         * i386-init.h: Regenerated.
 113         * i386-tbl.h: Regenerated
 114
 115 2011-01-17  Quentin Neill  <quentin.neill@amd.com>
 116
 117         * i386-dis.c (REG_XOP_TBM_01): New.
 118         (REG_XOP_TBM_02): New.
 119         (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
 120         (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
 121         entries, and add bextr instruction.
 122
 123         * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
 124         (cpu_flags): Add CpuTBM.
 125
 126         * i386-opc.h (CpuTBM) New.
 127         (i386_cpu_flags): Add bit cputbm.
 128
 129         * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
 130         blcs, blsfill, blsic, t1mskc, and tzmsk.
 131
 132 2011-01-12  DJ Delorie  <dj@redhat.com>
 133
 134         * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
 135
 136 2011-01-11  Mingjie Xing  <mingjie.xing@gmail.com>
 137
 138         * mips-dis.c (print_insn_args): Adjust the value to print the real
 139         offset for "+c" argument.
 140
 141 2011-01-10  Nick Clifton  <nickc@redhat.com>
 142
 143         * po/da.po: Updated Danish translation.
 144
 145 2011-01-05  Nathan Sidwell  <nathan@codesourcery.com>
 146
 147         * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
 148
 149 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 150
 151         * i386-dis.c (REG_VEX_38F3): New.
 152         (PREFIX_0FBC): Likewise.
 153         (PREFIX_VEX_38F2): Likewise.
 154         (PREFIX_VEX_38F3_REG_1): Likewise.
 155         (PREFIX_VEX_38F3_REG_2): Likewise.
 156         (PREFIX_VEX_38F3_REG_3): Likewise.
 157         (PREFIX_VEX_38F7): Likewise.
 158         (VEX_LEN_38F2_P_0): Likewise.
 159         (VEX_LEN_38F3_R_1_P_0): Likewise.
 160         (VEX_LEN_38F3_R_2_P_0): Likewise.
 161         (VEX_LEN_38F3_R_3_P_0): Likewise.
 162         (VEX_LEN_38F7_P_0): Likewise.
 163         (dis386_twobyte): Use PREFIX_0FBC.
 164         (reg_table): Add REG_VEX_38F3.
 165         (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
 166         PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
 167         PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
 168         (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
 169         PREFIX_VEX_38F7.
 170         (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
 171         VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
 172         VEX_LEN_38F7_P_0.
 173
 174         * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
 175         (cpu_flags): Add CpuBMI.
 176
 177         * i386-opc.h (CpuBMI): New.
 178         (i386_cpu_flags): Add cpubmi.
 179
 180         * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
 181         * i386-init.h: Regenerated.
 182         * i386-tbl.h: Likewise.
 183
 184 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 185
 186         * i386-dis.c (VexGdq): New.
 187         (OP_VEX): Handle dq_mode.
 188
 189 2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>
 190
 191         * i386-gen.c (process_copyright): Update copyright to 2011.
 192
 193 For older changes see ChangeLog-2010
 194 \f
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