1 2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-dis.c (EbS): New.
8 (b_swap_mode): Likewise.
9 (v_swap_mode): Likewise.
10 (q_swap_mode): Likewise.
11 (x_swap_mode): Likewise.
16 (swap_operand): Likewise.
17 (dis386): Use EbS on movB. Use EvS on moveS.
18 (dis386_twobyte): Use EXxS on movapX.
19 (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
20 vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
21 (vex_table): Use EXxS on vmovapX.
22 (vex_len_table): Use EXqS on vmovq.
23 (intel_operand_size): Handle b_swap_mode, v_swap_mode,
24 q_swap_mode and x_swap_mode.
25 (OP_E_register): Handle b_swap_mode and v_swap_mode.
26 (OP_EM): Handle v_swap_mode.
27 (OP_EX): x_swap_mode and q_swap_mode.
29 * i386-gen.c (opcode_modifiers): Add S.
31 * i386-opc.h (S): New.
33 (i386_opcode_modifier): Add s.
35 * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
36 movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
37 * i386-tbl.h: Regenerated.
39 2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
41 * i386-dis.c (mnemonicendp): New.
43 (print_insn): Use mnemonicendp.
44 (OP_3DNowSuffix): Likewise.
45 (CMP_Fixup): Likewise.
46 (CMPXCHG8B_Fixup): Likewise.
47 (CRC32_Fixup): Likewise.
48 (OP_DREX_FCMP): Likewise.
49 (OP_DREX_ICMP): Likewise.
50 (VZERO_Fixup): Likewise.
51 (VCMP_Fixup): Likewise.
52 (PCLMUL_Fixup): Likewise.
53 (VPERMIL2_Fixup): Likewise.
54 (MOVBE_Fixup): Likewise.
55 (putop): Update mnemonicendp.
56 (oappend): Use stpcpy.
57 (simd_cmp_op): Changed to struct op.
58 (vex_cmp_op): Likewise.
59 (pclmul_op): Likewise.
60 (vpermil2_op): Likewise.
62 2008-12-15 Richard Earnshaw <rearnsha@arm.com>
64 * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
67 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
69 * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
71 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
73 * i386-dis.c (putop): Remove strayed comments.
75 2008-12-04 Ben Elliston <bje@au.ibm.com>
77 * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
79 (print_ppc_disassembler_options): Update usage.
80 * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
82 (PPCCHLK64): Likewise.
83 (powerpc_opcodes): Remove all BOOKE64 instructions.
85 2008-11-28 Joshua Kinard <kumba@gentoo.org>
87 * mips-dis.c (mips_arch_choices): Add r14000, r16000.
89 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
91 * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
92 adjusted the mask for 32-bit branch instruction.
94 2008-11-27 Alan Modra <amodra@bigpond.net.au>
96 * ppc-opc.c (extract_sprg): Correct operand range check.
98 2008-11-26 Andreas Schwab <schwab@suse.de>
100 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
101 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
102 (save_printer, save_print_address): Remove.
103 (fetch_data): Don't use them.
104 (match_insn_m68k): Always restore printing functions.
105 (print_insn_m68k): Don't save/restore printing functions.
107 2008-11-25 Nick Clifton <nickc@redhat.com>
109 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
111 2008-11-18 Catherine Moore <clm@codesourcery.com>
113 * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
115 (neon_opcodes): Likewise.
116 (print_insn_coprocessor): Print 't' or 'b' for vcvt
119 2008-11-14 Tristan Gingold <gingold@adacore.com>
121 * makefile.vms (OBJS): Update list of objects.
125 2008-11-06 Chao-ying Fu <fu@mips.com>
127 * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
129 (sync): New instruction with 5-bit sync type.
130 * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
132 2008-11-06 Nick Clifton <nickc@redhat.com>
134 * avr-dis.c: Replace uses of sprintf without a format string with
137 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
139 * i386-opc.tbl: Add cmovpe and cmovpo.
140 * i386-tbl.h: Regenerated.
142 2008-10-22 Nick Clifton <nickc@redhat.com>
145 * configure.in (SHARED_LIBADD): Revert previous change.
146 Add a comment explaining why.
147 (SHARED_DEPENDENCIES): Revert previous change.
148 * configure: Regenerate.
150 2008-10-10 Nick Clifton <nickc@redhat.com>
153 * configure.in (SHARED_LIBADD): Add libiberty.a.
154 (SHARED_DEPENDENCIES): Add libiberty.a.
156 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
158 * i386-gen.c: Include "hashtab.h".
159 (next_field): Take a new argument, last. Check last.
160 (process_i386_cpu_flag): Updated.
161 (process_i386_opcode_modifier): Likewise.
162 (process_i386_operand_type): Likewise.
163 (process_i386_registers): Likewise.
164 (output_i386_opcode): New.
165 (opcode_hash_entry): Likewise.
166 (opcode_hash_table): Likewise.
167 (opcode_hash_hash): Likewise.
168 (opcode_hash_eq): Likewise.
169 (process_i386_opcodes): Use opcode hash table and opcode array.
171 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
173 * s390-opc.txt (stdy, stey): Fix description
175 2008-09-30 Alan Modra <amodra@bigpond.net.au>
177 * Makefile.am: Run "make dep-am".
178 * Makefile.in: Regenerate.
180 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
182 * aclocal.m4: Regenerated.
183 * configure: Likewise.
184 * Makefile.in: Likewise.
186 2008-09-29 Nick Clifton <nickc@redhat.com>
188 * po/vi.po: Updated Vietnamese translation.
189 * po/fr.po: Updated French translation.
191 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
193 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
194 (cfxr, cfdr, cfer, clclu): Add esa flag.
195 (sqd): Instruction added.
196 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
197 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
199 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
201 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
202 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
204 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
206 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
207 * i386-tbl.h: Regenerated.
209 2008-08-28 Jan Beulich <jbeulich@novell.com>
211 * i386-dis.c (dis386): Adjust far return mnemonics.
212 * i386-opc.tbl: Add retf.
213 * i386-tbl.h: Re-generate.
215 2008-08-28 Jan Beulich <jbeulich@novell.com>
217 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
219 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
221 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
222 * ia64-gen.c (lookup_specifier): Likewise.
224 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
225 * ia64-raw.tbl: Likewise.
226 * ia64-waw.tbl: Likewise.
227 * ia64-asmtab.c: Regenerated.
229 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
231 * i386-opc.tbl: Correct fidivr operand size.
233 * i386-tbl.h: Regenerated.
235 2008-08-24 Alan Modra <amodra@bigpond.net.au>
237 * configure.in: Update a number of obsolete autoconf macros.
238 * aclocal.m4: Regenerate.
240 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
242 AVX Programming Reference (August, 2008)
243 * i386-dis.c (PREFIX_VEX_38DB): New.
244 (PREFIX_VEX_38DC): Likewise.
245 (PREFIX_VEX_38DD): Likewise.
246 (PREFIX_VEX_38DE): Likewise.
247 (PREFIX_VEX_38DF): Likewise.
248 (PREFIX_VEX_3ADF): Likewise.
249 (VEX_LEN_38DB_P_2): Likewise.
250 (VEX_LEN_38DC_P_2): Likewise.
251 (VEX_LEN_38DD_P_2): Likewise.
252 (VEX_LEN_38DE_P_2): Likewise.
253 (VEX_LEN_38DF_P_2): Likewise.
254 (VEX_LEN_3ADF_P_2): Likewise.
255 (PREFIX_VEX_3A04): Updated.
256 (VEX_LEN_3A06_P_2): Likewise.
257 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
258 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
259 (x86_64_table): Likewise.
260 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
261 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
264 * i386-opc.tbl: Add AES + AVX instructions.
265 * i386-init.h: Regenerated.
266 * i386-tbl.h: Likewise.
268 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
270 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
271 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
273 2008-08-15 Alan Modra <amodra@bigpond.net.au>
276 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
277 * Makefile.in: Regenerate.
278 * aclocal.m4: Regenerate.
279 * config.in: Regenerate.
280 * configure: Regenerate.
282 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
285 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
287 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
289 * i386-opc.tbl: Add syscall and sysret for Cpu64.
291 * i386-tbl.h: Regenerated.
293 2008-08-04 Alan Modra <amodra@bigpond.net.au>
295 * Makefile.am (POTFILES.in): Set LC_ALL=C.
296 * Makefile.in: Regenerate.
297 * po/POTFILES.in: Regenerate.
299 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
301 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
302 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
303 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
304 * ppc-opc.c (insert_xt6): New static function.
305 (extract_xt6): Likewise.
306 (insert_xa6): Likewise.
307 (extract_xa6: Likewise.
308 (insert_xb6): Likewise.
309 (extract_xb6): Likewise.
310 (insert_xb6s): Likewise.
311 (extract_xb6s): Likewise.
312 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
313 XX3DM_MASK, PPCVSX): New.
314 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
315 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
317 2008-08-01 Pedro Alves <pedro@codesourcery.com>
319 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
320 * Makefile.in: Regenerate.
322 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
324 * i386-reg.tbl: Use Dw2Inval on AVX registers.
325 * i386-tbl.h: Regenerated.
327 2008-07-30 Michael J. Eager <eager@eagercon.com>
329 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
330 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
331 (insert_sprg, PPC405): Use PPC_OPCODE_405.
332 (powerpc_opcodes): Add Xilinx APU related opcodes.
334 2008-07-30 Alan Modra <amodra@bigpond.net.au>
336 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
338 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
340 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
342 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
344 * mips-opc.c (CP): New macro.
345 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
346 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
347 dmtc2 Octeon instructions.
349 2008-07-07 Stan Shebs <stan@codesourcery.com>
351 * dis-init.c (init_disassemble_info): Init endian_code field.
352 * arm-dis.c (print_insn): Disassemble code according to
353 setting of endian_code.
354 (print_insn_big_arm): Detect when BE8 extension flag has been set.
356 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
358 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
361 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
363 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
364 (print_ppc_disassembler_options): Likewise.
365 * ppc-opc.c (PPC464): Define.
366 (powerpc_opcodes): Add mfdcrux and mtdcrux.
368 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
370 * configure: Regenerate.
372 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
374 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
376 (struct dis_private): New.
377 (POWERPC_DIALECT): New define.
378 (powerpc_dialect): Renamed to...
379 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
381 (print_insn_big_powerpc): Update for using structure in
383 (print_insn_little_powerpc): Likewise.
384 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
385 (skip_optional_operands): Likewise.
386 (print_insn_powerpc): Likewise. Remove initialization of dialect.
387 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
388 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
389 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
390 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
391 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
392 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
393 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
394 param to be of type ppc_cpu_t. Update prototype.
396 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
398 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
400 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
401 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
402 syncw, syncws, vm3mulu, vm0 and vmulu.
404 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
405 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
408 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
410 * i386-opc.tbl: Add vmovd with 64bit operand.
411 * i386-tbl.h: Regenerated.
413 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
415 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
417 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
419 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
420 * i386-tbl.h: Regenerated.
422 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
425 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
426 into 32bit and 64bit. Remove Reg64|Qword and add
427 IgnoreSize|No_qSuf on 32bit version.
428 * i386-tbl.h: Regenerated.
430 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
432 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
433 * i386-tbl.h: Regenerated.
435 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
437 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
439 2008-05-14 Alan Modra <amodra@bigpond.net.au>
441 * Makefile.am: Run "make dep-am".
442 * Makefile.in: Regenerate.
444 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
446 * i386-dis.c (MOVBE_Fixup): New.
448 (PREFIX_0F3880): Likewise.
449 (PREFIX_0F3881): Likewise.
450 (PREFIX_0F38F0): Updated.
451 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
452 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
453 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
455 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
457 (cpu_flags): Add CpuMovbe and CpuEPT.
459 * i386-opc.h (CpuMovbe): New.
462 (i386_cpu_flags): Add cpumovbe and cpuept.
464 * i386-opc.tbl: Add entries for movbe and EPT instructions.
465 * i386-init.h: Regenerated.
466 * i386-tbl.h: Likewise.
468 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
470 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
471 the two drem and the two dremu macros.
473 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
475 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
476 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
477 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
478 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
480 2008-04-25 David S. Miller <davem@davemloft.net>
482 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
483 instead of %sys_tick_cmpr, as suggested in architecture manuals.
485 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
487 * aclocal.m4: Regenerate.
488 * configure: Regenerate.
490 2008-04-23 David S. Miller <davem@davemloft.net>
492 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
494 (prefetch_table): Add missing values.
496 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
498 * i386-gen.c (opcode_modifiers): Add NoAVX.
500 * i386-opc.h (NoAVX): New.
502 (i386_opcode_modifier): Add noavx.
504 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
505 instructions which don't have AVX equivalent.
506 * i386-tbl.h: Regenerated.
508 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
510 * i386-dis.c (OP_VEX_FMA): New.
511 (OP_EX_VexImmW): Likewise.
513 (Vex128FMA): Likewise.
514 (EXVexImmW): Likewise.
515 (get_vex_imm8): Likewise.
516 (OP_EX_VexReg): Likewise.
517 (vex_i4_done): Renamed to ...
519 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
520 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
522 (print_insn): Updated.
523 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
524 (OP_REG_VexI4): Check invalid high registers.
526 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
527 Michael Meissner <michael.meissner@amd.com>
529 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
530 * i386-tbl.h: Regenerate from i386-opc.tbl.
532 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
534 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
535 accept Power E500MC instructions.
536 (print_ppc_disassembler_options): Document -Me500mc.
537 * ppc-opc.c (DUIS, DUI, T): New.
538 (XRT, XRTRA): Likewise.
540 (powerpc_opcodes): Add new Power E500MC instructions.
542 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
544 * s390-dis.c (init_disasm): Evaluate disassembler_options.
545 (print_s390_disassembler_options): New function.
546 * disassemble.c (disassembler_usage): Invoke
547 print_s390_disassembler_options.
549 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
551 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
552 of local variables used for mnemonic parsing: prefix, suffix and
555 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
557 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
558 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
559 (s390_crb_extensions): New extensions table.
560 (insertExpandedMnemonic): Handle '$' tag.
561 * s390-opc.txt: Remove conditional jump variants which can now
562 be expanded automatically.
563 Replace '*' tag with '$' in the compare and branch instructions.
565 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
567 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
568 (PREFIX_VEX_3AXX): Likewis.
570 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
572 * i386-opc.tbl: Remove 4 extra blank lines.
574 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
576 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
577 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
578 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
579 * i386-opc.tbl: Likewise.
581 * i386-opc.h (CpuCLMUL): Renamed to ...
584 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
586 * i386-init.h: Regenerated.
588 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
590 * i386-dis.c (OP_E_register): New.
591 (OP_E_memory): Likewise.
593 (OP_EX_Vex): Likewise.
594 (OP_EX_VexW): Likewise.
595 (OP_XMM_Vex): Likewise.
596 (OP_XMM_VexW): Likewise.
597 (OP_REG_VexI4): Likewise.
598 (PCLMUL_Fixup): Likewise.
599 (VEXI4_Fixup): Likewise.
600 (VZERO_Fixup): Likewise.
601 (VCMP_Fixup): Likewise.
602 (VPERMIL2_Fixup): Likewise.
603 (rex_original): Likewise.
604 (rex_ignored): Likewise.
625 (VPERMIL2): Likewise.
626 (xmm_mode): Likewise.
627 (xmmq_mode): Likewise.
628 (ymmq_mode): Likewise.
629 (vex_mode): Likewise.
630 (vex128_mode): Likewise.
631 (vex256_mode): Likewise.
632 (USE_VEX_C4_TABLE): Likewise.
633 (USE_VEX_C5_TABLE): Likewise.
634 (USE_VEX_LEN_TABLE): Likewise.
635 (VEX_C4_TABLE): Likewise.
636 (VEX_C5_TABLE): Likewise.
637 (VEX_LEN_TABLE): Likewise.
638 (REG_VEX_XX): Likewise.
639 (MOD_VEX_XXX): Likewise.
640 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
641 (PREFIX_0F3A44): Likewise.
642 (PREFIX_0F3ADF): Likewise.
643 (PREFIX_VEX_XXX): Likewise.
645 (VEX_OF38): Likewise.
646 (VEX_OF3A): Likewise.
647 (VEX_LEN_XXX): Likewise.
649 (need_vex): Likewise.
650 (need_vex_reg): Likewise.
651 (vex_i4_done): Likewise.
652 (vex_table): Likewise.
653 (vex_len_table): Likewise.
654 (OP_REG_VexI4): Likewise.
655 (vex_cmp_op): Likewise.
656 (pclmul_op): Likewise.
657 (vpermil2_op): Likewise.
660 (PREFIX_0F38F0): Likewise.
661 (PREFIX_0F3A60): Likewise.
662 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
663 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
664 and PREFIX_VEX_XXX entries.
665 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
666 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
668 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
669 Add MOD_VEX_XXX entries.
670 (ckprefix): Initialize rex_original and rex_ignored. Store the
671 REX byte in rex_original.
672 (get_valid_dis386): Handle the implicit prefix in VEX prefix
673 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
674 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
675 calling get_valid_dis386. Use rex_original and rex_ignored when
677 (putop): Handle "XY".
678 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
680 (OP_E_extended): Updated to use OP_E_register and
682 (OP_XMM): Handle VEX.
684 (XMM_Fixup): Likewise.
685 (CMP_Fixup): Use ARRAY_SIZE.
687 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
688 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
689 (operand_type_init): Add OPERAND_TYPE_REGYMM and
690 OPERAND_TYPE_VEX_IMM4.
691 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
692 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
693 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
694 VexImmExt and SSE2AVX.
695 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
697 * i386-opc.h (CpuAVX): New.
699 (CpuCLMUL): Likewise.
710 (Vex3Sources): Likewise.
711 (VexImmExt): Likewise.
715 (Vex_Imm4): Likewise.
716 (Implicit1stXmm0): Likewise.
719 (ByteOkIntel): Likewise.
722 (Unspecified): Likewise.
724 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
725 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
726 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
727 vex3sources, veximmext and sse2avx.
728 (i386_operand_type): Add regymm, ymmword and vex_imm4.
730 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
732 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
734 * i386-init.h: Regenerated.
735 * i386-tbl.h: Likewise.
737 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
739 From Robin Getz <robin.getz@analog.com>
740 * bfin-dis.c (bu32): Typedef.
741 (enum const_forms_t): Add c_uimm32 and c_huimm32.
742 (constant_formats[]): Add uimm32 and huimm16.
747 (luimm16_val): Define.
748 (struct saved_state): Define.
749 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
750 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
751 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
753 (decode_LDIMMhalf_0): Print out the whole register value.
755 From Jie Zhang <jie.zhang@analog.com>
756 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
757 multiply and multiply-accumulate to data register instruction.
759 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
760 c_imm32, c_huimm32e): Define.
761 (constant_formats): Add flags for printing decimal, leading spaces, and
763 (comment, parallel): Add global flags in all disassembly.
764 (fmtconst): Take advantage of new flags, and print default in hex.
765 (fmtconst_val): Likewise.
766 (decode_macfunc): Be consistant with spaces, tabs, comments,
767 capitalization in disassembly, fix minor coding style issues.
768 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
769 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
770 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
771 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
772 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
773 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
774 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
775 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
776 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
777 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
778 _print_insn_bfin, print_insn_bfin): Likewise.
780 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
782 * aclocal.m4: Regenerate.
783 * configure: Likewise.
784 * Makefile.in: Likewise.
786 2008-03-13 Alan Modra <amodra@bigpond.net.au>
788 * Makefile.am: Run "make dep-am".
789 * Makefile.in: Regenerate.
790 * configure: Regenerate.
792 2008-03-07 Alan Modra <amodra@bigpond.net.au>
794 * ppc-opc.c (powerpc_opcodes): Order and format.
796 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
798 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
799 * i386-tbl.h: Regenerated.
801 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
803 * i386-opc.tbl: Disallow 16-bit near indirect branches for
805 * i386-tbl.h: Regenerated.
807 2008-02-21 Jan Beulich <jbeulich@novell.com>
809 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
810 and Fword for far indirect jmp. Allow Reg16 and Word for near
811 indirect jmp on x86-64. Disallow Fword for lcall.
812 * i386-tbl.h: Re-generate.
814 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
816 * cr16-opc.c (cr16_num_optab): Defined
818 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
820 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
821 * i386-init.h: Regenerated.
823 2008-02-14 Nick Clifton <nickc@redhat.com>
826 * configure.in (SHARED_LIBADD): Select the correct host specific
827 file extension for shared libraries.
828 * configure: Regenerate.
830 2008-02-13 Jan Beulich <jbeulich@novell.com>
832 * i386-opc.h (RegFlat): New.
833 * i386-reg.tbl (flat): Add.
834 * i386-tbl.h: Re-generate.
836 2008-02-13 Jan Beulich <jbeulich@novell.com>
838 * i386-dis.c (a_mode): New.
839 (cond_jump_mode): Adjust.
840 (Ma): Change to a_mode.
841 (intel_operand_size): Handle a_mode.
842 * i386-opc.tbl: Allow Dword and Qword for bound.
843 * i386-tbl.h: Re-generate.
845 2008-02-13 Jan Beulich <jbeulich@novell.com>
847 * i386-gen.c (process_i386_registers): Process new fields.
848 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
849 unsigned char. Add dw2_regnum and Dw2Inval.
850 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
852 * i386-tbl.h: Re-generate.
854 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
856 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
857 * i386-init.h: Updated.
859 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
861 * i386-gen.c (cpu_flags): Add CpuXsave.
863 * i386-opc.h (CpuXsave): New.
865 (i386_cpu_flags): Add cpuxsave.
867 * i386-dis.c (MOD_0FAE_REG_4): New.
868 (RM_0F01_REG_2): Likewise.
869 (MOD_0FAE_REG_5): Updated.
870 (RM_0F01_REG_3): Likewise.
871 (reg_table): Use MOD_0FAE_REG_4.
872 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
874 (rm_table): Add RM_0F01_REG_2.
876 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
877 * i386-init.h: Regenerated.
878 * i386-tbl.h: Likewise.
880 2008-02-11 Jan Beulich <jbeulich@novell.com>
882 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
883 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
884 * i386-tbl.h: Re-generate.
886 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
889 * configure: Regenerated.
891 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
893 * mips-dis.c: Update copyright.
894 (mips_arch_choices): Add Octeon.
895 * mips-opc.c: Update copyright.
897 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
899 2008-01-29 Alan Modra <amodra@bigpond.net.au>
901 * ppc-opc.c: Support optional L form mtmsr.
903 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
905 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
907 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
909 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
910 * i386-init.h: Regenerated.
912 2008-01-23 Tristan Gingold <gingold@adacore.com>
914 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
915 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
917 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
919 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
920 (cpu_flags): Likewise.
922 * i386-opc.h (CpuMMX2): Removed.
925 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
926 * i386-init.h: Regenerated.
927 * i386-tbl.h: Likewise.
929 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
931 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
933 * i386-init.h: Regenerated.
935 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
937 * i386-opc.tbl: Use Qword on movddup.
938 * i386-tbl.h: Regenerated.
940 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
942 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
943 * i386-tbl.h: Regenerated.
945 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
947 * i386-dis.c (Mx): New.
948 (PREFIX_0FC3): Likewise.
949 (PREFIX_0FC7_REG_6): Updated.
950 (dis386_twobyte): Use PREFIX_0FC3.
951 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
952 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
955 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
957 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
958 (operand_types): Add Mem.
960 * i386-opc.h (IntelSyntax): New.
961 * i386-opc.h (Mem): New.
963 (Opcode_Modifier_Max): Updated.
964 (i386_opcode_modifier): Add intelsyntax.
965 (i386_operand_type): Add mem.
967 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
970 * i386-reg.tbl: Add size for accumulator.
972 * i386-init.h: Regenerated.
973 * i386-tbl.h: Likewise.
975 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
977 * i386-opc.h (Byte): Fix a typo.
979 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
982 * i386-gen.c (operand_type_init): Add Dword to
983 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
984 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
986 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
987 Xmmword, Unspecified and Anysize.
988 (set_bitfield): Make Mmword an alias of Qword. Make Oword
991 * i386-opc.h (CheckSize): Removed.
999 (i386_opcode_modifier): Remove checksize, byte, word, dword,
1003 (Unspecified): Likewise.
1004 (Anysize): Likewise.
1005 (i386_operand_type): Add byte, word, dword, fword, qword,
1006 tbyte xmmword, unspecified and anysize.
1008 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
1009 Tbyte, Xmmword, Unspecified and Anysize.
1011 * i386-reg.tbl: Add size for accumulator.
1013 * i386-init.h: Regenerated.
1014 * i386-tbl.h: Likewise.
1016 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
1018 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
1019 (REG_0F18): Updated.
1020 (reg_table): Updated.
1021 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
1022 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
1024 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
1026 * i386-gen.c (set_bitfield): Use fail () on error.
1028 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
1030 * i386-gen.c (lineno): New.
1031 (filename): Likewise.
1032 (set_bitfield): Report filename and line numer on error.
1033 (process_i386_opcodes): Set filename and update lineno.
1034 (process_i386_registers): Likewise.
1036 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
1038 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1041 * i386-opc.h (IntelMnemonic): Renamed to ..
1043 (Opcode_Modifier_Max): Updated.
1044 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1047 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1048 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1049 * i386-tbl.h: Regenerated.
1051 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1053 * i386-gen.c: Update copyright to 2008.
1054 * i386-opc.h: Likewise.
1055 * i386-opc.tbl: Likewise.
1057 * i386-init.h: Regenerated.
1058 * i386-tbl.h: Likewise.
1060 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1062 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1063 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1064 * i386-tbl.h: Regenerated.
1066 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1068 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1070 (cpu_flags): Likewise.
1072 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1073 (CpuSSE4_2_Or_ABM): Likewise.
1075 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1077 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1078 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1079 and CpuPadLock, respectively.
1080 * i386-init.h: Regenerated.
1081 * i386-tbl.h: Likewise.
1083 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1085 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1087 * i386-opc.h (No_xSuf): Removed.
1088 (CheckSize): Updated.
1090 * i386-tbl.h: Regenerated.
1092 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1094 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1095 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1097 (cpu_flags): Add CpuSSE4_2_Or_ABM.
1099 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1101 (i386_cpu_flags): Add cpusse4_2_or_abm.
1103 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1104 CpuABM|CpuSSE4_2 on popcnt.
1105 * i386-init.h: Regenerated.
1106 * i386-tbl.h: Likewise.
1108 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1110 * i386-opc.h: Update comments.
1112 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1114 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1115 * i386-opc.h: Likewise.
1116 * i386-opc.tbl: Likewise.
1118 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1121 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1122 Byte, Word, Dword, QWord and Xmmword.
1124 * i386-opc.h (No_xSuf): New.
1125 (CheckSize): Likewise.
1130 (Xmmword): Likewise.
1132 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1133 Dword, QWord and Xmmword.
1135 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1137 * i386-tbl.h: Regenerated.
1139 2008-01-02 Mark Kettenis <kettenis@gnu.org>
1141 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1144 For older changes see ChangeLog-2007
1150 version-control: never