opcodes/ChangeLog

   1 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
   2
   3         * arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
   4         ARM_EXT_RAS in relevant entries.
   5
   6 2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
   7
   8         PR binutils/20196
   9         * ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
  10         opcodes for E6500.
  11
  12 2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
  13
  14         PR binutis/18386
  15         * i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
  16         (indir_v_mode): New.
  17         Add comments for '&'.
  18         (reg_table): Replace "{T|}" with "{&|}" on call and jmp.
  19         (putop): Handle '&'.
  20         (intel_operand_size): Handle indir_v_mode.
  21         (OP_E_register): Likewise.
  22         * i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64.  Add
  23         64-bit indirect call/jmp for AMD64.
  24         * i386-tbl.h: Regenerated
  25
  26 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
  27
  28         * arc-dis.c (struct arc_operand_iterator): New structure.
  29         (find_format_from_table): All the old content from find_format,
  30         with some minor adjustments, and parameter renaming.
  31         (find_format_long_instructions): New function.
  32         (find_format): Rewritten.
  33         (arc_insn_length): Add LSB parameter.
  34         (extract_operand_value): New function.
  35         (operand_iterator_next): New function.
  36         (print_insn_arc): Use new functions to find opcode, and iterator
  37         over operands.
  38         * arc-opc.c (insert_nps_3bit_dst_short): New function.
  39         (extract_nps_3bit_dst_short): New function.
  40         (insert_nps_3bit_src2_short): New function.
  41         (extract_nps_3bit_src2_short): New function.
  42         (insert_nps_bitop1_size): New function.
  43         (extract_nps_bitop1_size): New function.
  44         (insert_nps_bitop2_size): New function.
  45         (extract_nps_bitop2_size): New function.
  46         (insert_nps_bitop_mod4_msb): New function.
  47         (extract_nps_bitop_mod4_msb): New function.
  48         (insert_nps_bitop_mod4_lsb): New function.
  49         (extract_nps_bitop_mod4_lsb): New function.
  50         (insert_nps_bitop_dst_pos3_pos4): New function.
  51         (extract_nps_bitop_dst_pos3_pos4): New function.
  52         (insert_nps_bitop_ins_ext): New function.
  53         (extract_nps_bitop_ins_ext): New function.
  54         (arc_operands): Add new operands.
  55         (arc_long_opcodes): New global array.
  56         (arc_num_long_opcodes): New global.
  57         * arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
  58
  59 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  60
  61         * nds32-asm.h: Add extern "C".
  62         * sh-opc.h: Likewise.
  63
  64 2016-06-01  Graham Markall  <graham.markall@embecosm.com>
  65
  66         * arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and
  67         0,b,limm to the rflt instruction.
  68
  69 2016-05-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  70
  71         * sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned
  72         constant.
  73
  74 2016-05-29  H.J. Lu  <hongjiu.lu@intel.com>
  75
  76         PR gas/20145
  77         * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS,
  78         CPU_ANY_AVX512CD_FLAGS, CPU_ANY_AVX512ER_FLAGS,
  79         CPU_ANY_AVX512PF_FLAGS, CPU_ANY_AVX512DQ_FLAGS,
  80         CPU_ANY_AVX512BW_FLAGS, CPU_ANY_AVX512VL_FLAGS,
  81         CPU_ANY_AVX512IFMA_FLAGS and CPU_ANY_AVX512VBMI_FLAGS.
  82         * i386-init.h: Regenerated.
  83
  84 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
  85
  86         PR gas/20145
  87         * i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS.  Remove
  88         CpuMMX from CPU_SSE_FLAGS.  Remove AVX and AVX512 bits from
  89         CPU_ANY_SSE_FLAGS.  Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
  90         Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
  91         CpuXSAVEC.  Add CPU_AVX_FLAGS to CpuF16C.  Remove CpuMMX from
  92         CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
  93         CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
  94         Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS.   Add CPU_ANY_287_FLAGS,
  95         CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
  96         CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
  97         CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS.  Enable CpuRegMMX
  98         for MMX.  Enable CpuRegXMM for SSE, AVX and AVX512.  Enable
  99         CpuRegYMM for AVX and AVX512VL,  Enable CpuRegZMM and
 100         CpuRegMask for AVX512.
 101         (cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
 102         and CpuRegMask.
 103         (set_bitfield_from_cpu_flag_init): New function.
 104         (set_bitfield): Remove const on f.  Call
 105         set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
 106         * i386-opc.h (CpuRegMMX): New.
 107         (CpuRegXMM): Likewise.
 108         (CpuRegYMM): Likewise.
 109         (CpuRegZMM): Likewise.
 110         (CpuRegMask): Likewise.
 111         (i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
 112         and cpuregmask.
 113         * i386-init.h: Regenerated.
 114         * i386-tbl.h: Likewise.
 115
 116 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 117
 118         PR gas/20154
 119         * i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
 120         (opcode_modifiers): Add AMD64 and Intel64.
 121         (main): Properly verify CpuMax.
 122         * i386-opc.h (CpuAMD64): Removed.
 123         (CpuIntel64): Likewise.
 124         (CpuMax): Set to CpuNo64.
 125         (i386_cpu_flags): Remove cpuamd64 and cpuintel64.
 126         (AMD64): New.
 127         (Intel64): Likewise.
 128         (i386_opcode_modifier): Add amd64 and intel64.
 129         (i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
 130         on call and jmp.
 131         * i386-init.h: Regenerated.
 132         * i386-tbl.h: Likewise.
 133
 134 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 135
 136         PR gas/20154
 137         * i386-gen.c (main): Fail if CpuMax is incorrect.
 138         * i386-opc.h (CpuMax): Set to CpuIntel64.
 139         * i386-tbl.h: Regenerated.
 140
 141 2016-05-27  Nick Clifton  <nickc@redhat.com>
 142
 143         PR target/20150
 144         * msp430-dis.c (msp430dis_read_two_bytes): New function.
 145         (msp430dis_opcode_unsigned): New function.
 146         (msp430dis_opcode_signed): New function.
 147         (msp430_singleoperand): Use the new opcode reading functions.
 148         Only disassenmble bytes if they were successfully read.
 149         (msp430_doubleoperand): Likewise.
 150         (msp430_branchinstr): Likewise.
 151         (msp430x_callx_instr): Likewise.
 152         (print_insn_msp430): Check that it is safe to read bytes before
 153         attempting disassembly.  Use the new opcode reading functions.
 154
 155 2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
 156
 157         * ppc-opc.c (CY): New define.  Document it.
 158         (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
 159
 160 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 161
 162         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
 163         CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
 164         and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
 165         CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
 166         CPU_ANY_AVX_FLAGS.
 167         * i386-init.h: Regenerated.
 168
 169 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 170
 171         PR gas/20141
 172         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
 173         CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
 174         * i386-init.h: Regenerated.
 175
 176 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 177
 178         * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
 179         CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
 180         * i386-init.h: Regenerated.
 181
 182 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 183
 184         * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
 185         information.
 186         (print_insn_arc): Set insn_type information.
 187         * arc-opc.c (C_CC): Add F_CLASS_COND.
 188         * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
 189         (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
 190         (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
 191         (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
 192         (brne, brne_s, jeq_s, jne_s): Likewise.
 193
 194 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 195
 196         * arc-tbl.h (neg): New instruction variant.
 197
 198 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 199
 200         * arc-dis.c (find_format, find_format, get_auxreg)
 201         (print_insn_arc): Changed.
 202         * arc-ext.h (INSERT_XOP): Likewise.
 203
 204 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 205
 206         * tic54x-dis.c (sprint_mmr): Adjust.
 207         * tic54x-opc.c: Likewise.
 208
 209 2016-05-19  Alan Modra  <amodra@gmail.com>
 210
 211         * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
 212
 213 2016-05-19  Alan Modra  <amodra@gmail.com>
 214
 215         * ppc-opc.c: Formatting.
 216         (NSISIGNOPT): Define.
 217         (powerpc_opcodes <subis>): Use NSISIGNOPT.
 218
 219 2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
 220
 221         * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
 222         replacing references to `micromips_ase' throughout.
 223         (_print_insn_mips): Don't use file-level microMIPS annotation to
 224         determine the disassembly mode with the symbol table.
 225
 226 2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
 227
 228         * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
 229
 230 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 231
 232         * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
 233         mips64r6.
 234         * mips-opc.c (D34): New macro.
 235         (mips_builtin_opcodes): Define bposge32c for DSPr3.
 236
 237 2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
 238
 239         * i386-dis.c (prefix_table): Add RDPID instruction.
 240         * i386-gen.c (cpu_flag_init): Add RDPID flag.
 241         (cpu_flags): Add RDPID bitfield.
 242         * i386-opc.h (enum): Add RDPID element.
 243         (i386_cpu_flags): Add RDPID field.
 244         * i386-opc.tbl: Add RDPID instruction.
 245         * i386-init.h: Regenerate.
 246         * i386-tbl.h: Regenerate.
 247
 248 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 249
 250         * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
 251         branch type of a symbol.
 252         (print_insn): Likewise.
 253
 254 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 255
 256         * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
 257         Mainline Security Extensions instructions.
 258         (thumb_opcodes): Add entries for narrow ARMv8-M Security
 259         Extensions instructions.
 260         (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
 261         instructions.
 262         (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
 263         special registers.
 264
 265 2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
 266
 267         * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
 268
 269 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 270
 271         * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
 272         (arcExtMap_genOpcode): Likewise.
 273         * arc-opc.c (arg_32bit_rc): Define new variable.
 274         (arg_32bit_u6): Likewise.
 275         (arg_32bit_limm): Likewise.
 276
 277 2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 278
 279         * aarch64-gen.c (VERIFIER): Define.
 280         * aarch64-opc.c (VERIFIER): Define.
 281         (verify_ldpsw): Use static linkage.
 282         * aarch64-opc.h (verify_ldpsw): Remove.
 283         * aarch64-tbl.h: Use VERIFIER for verifiers.
 284
 285 2016-04-28  Nick Clifton  <nickc@redhat.com>
 286
 287         PR target/19722
 288         * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
 289         * aarch64-opc.c (verify_ldpsw): New function.
 290         * aarch64-opc.h (verify_ldpsw): New prototype.
 291         * aarch64-tbl.h: Add initialiser for verifier field.
 292         (LDPSW): Set verifier to verify_ldpsw.
 293
 294 2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
 295
 296         PR binutils/19983
 297         PR binutils/19984
 298         * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
 299         smaller than address size.
 300
 301 2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 302
 303         * alpha-dis.c: Regenerate.
 304         * crx-dis.c: Likewise.
 305         * disassemble.c: Likewise.
 306         * epiphany-opc.c: Likewise.
 307         * fr30-opc.c: Likewise.
 308         * frv-opc.c: Likewise.
 309         * ip2k-opc.c: Likewise.
 310         * iq2000-opc.c: Likewise.
 311         * lm32-opc.c: Likewise.
 312         * lm32-opinst.c: Likewise.
 313         * m32c-opc.c: Likewise.
 314         * m32r-opc.c: Likewise.
 315         * m32r-opinst.c: Likewise.
 316         * mep-opc.c: Likewise.
 317         * mt-opc.c: Likewise.
 318         * or1k-opc.c: Likewise.
 319         * or1k-opinst.c: Likewise.
 320         * tic80-opc.c: Likewise.
 321         * xc16x-opc.c: Likewise.
 322         * xstormy16-opc.c: Likewise.
 323
 324 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 325
 326         * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
 327         fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
 328         calcsd, and calcxd instructions.
 329         * arc-opc.c (insert_nps_bitop_size): Delete.
 330         (extract_nps_bitop_size): Delete.
 331         (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
 332         (extract_nps_qcmp_m3): Define.
 333         (extract_nps_qcmp_m2): Define.
 334         (extract_nps_qcmp_m1): Define.
 335         (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
 336         (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
 337         (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
 338         NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
 339         NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
 340         NPS_QCMP_M3.
 341
 342 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 343
 344         * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
 345
 346 2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 347
 348         * Makefile.in: Regenerated with automake 1.11.6.
 349         * aclocal.m4: Likewise.
 350
 351 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 352
 353         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
 354         instructions.
 355         * arc-opc.c (insert_nps_cmem_uimm16): New function.
 356         (extract_nps_cmem_uimm16): New function.
 357         (arc_operands): Add NPS_XLDST_UIMM16 operand.
 358
 359 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 360
 361         * arc-dis.c (arc_insn_length): New function.
 362         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
 363         (find_format): Change insnLen parameter to unsigned.
 364
 365 2016-04-13  Nick Clifton  <nickc@redhat.com>
 366
 367         PR target/19937
 368         * v850-opc.c (v850_opcodes): Correct masks for long versions of
 369         the LD.B and LD.BU instructions.
 370
 371 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 372
 373         * arc-dis.c (find_format): Check for extension flags.
 374         (print_flags): New function.
 375         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
 376         .extAuxRegister.
 377         * arc-ext.c (arcExtMap_coreRegName): Use
 378         LAST_EXTENSION_CORE_REGISTER.
 379         (arcExtMap_coreReadWrite): Likewise.
 380         (dump_ARC_extmap): Update printing.
 381         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
 382         (arc_aux_regs): Add cpu field.
 383         * arc-regs.h: Add cpu field, lower case name aux registers.
 384
 385 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 386
 387         * arc-tbl.h: Add rtsc, sleep with no arguments.
 388
 389 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 390
 391         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
 392         Initialize.
 393         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 394         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 395         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 396         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 397         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 398         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 399         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 400         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 401         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 402         (arc_opcode arc_opcodes): Null terminate the array.
 403         (arc_num_opcodes): Remove.
 404         * arc-ext.h (INSERT_XOP): Define.
 405         (extInstruction_t): Likewise.
 406         (arcExtMap_instName): Delete.
 407         (arcExtMap_insn): New function.
 408         (arcExtMap_genOpcode): Likewise.
 409         * arc-ext.c (ExtInstruction): Remove.
 410         (create_map): Zero initialize instruction fields.
 411         (arcExtMap_instName): Remove.
 412         (arcExtMap_insn): New function.
 413         (dump_ARC_extmap): More info while debuging.
 414         (arcExtMap_genOpcode): New function.
 415         * arc-dis.c (find_format): New function.
 416         (print_insn_arc): Use find_format.
 417         (arc_get_disassembler): Enable dump_ARC_extmap only when
 418         debugging.
 419
 420 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
 421
 422         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
 423         instruction bits out.
 424
 425 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 426
 427         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
 428         * arc-opc.c (arc_flag_operands): Add new flags.
 429         (arc_flag_classes): Add new classes.
 430
 431 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 432
 433         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
 434
 435 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
 436
 437         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
 438         encode1, rflt, crc16, and crc32 instructions.
 439         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
 440         (arc_flag_classes): Add C_NPS_R.
 441         (insert_nps_bitop_size_2b): New function.
 442         (extract_nps_bitop_size_2b): Likewise.
 443         (insert_nps_bitop_uimm8): Likewise.
 444         (extract_nps_bitop_uimm8): Likewise.
 445         (arc_operands): Add new operand entries.
 446
 447 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 448
 449         * arc-regs.h: Add a new subclass field.  Add double assist
 450         accumulator register values.
 451         * arc-tbl.h: Use DPA subclass to mark the double assist
 452         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 453         * arc-opc.c (RSP): Define instead of SP.
 454         (arc_aux_regs): Add the subclass field.
 455
 456 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 457
 458         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 459
 460 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 461
 462         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 463         NPS_R_SRC1.
 464
 465 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 466
 467         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 468         issues.  No functional changes.
 469
 470 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 471
 472         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 473         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 474         (RTT): Remove duplicate.
 475         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 476         (PCT_CONFIG*): Remove.
 477         (D1L, D1H, D2H, D2L): Define.
 478
 479 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 480
 481         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 482
 483 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 484
 485         * arc-tbl.h (invld07): Remove.
 486         * arc-ext-tbl.h: New file.
 487         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 488         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 489
 490 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 491
 492         Fix -Wstack-usage warnings.
 493         * aarch64-dis.c (print_operands): Substitute size.
 494         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 495
 496 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 497
 498         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 499         to get a proper diagnostic when an invalid ASR register is used.
 500
 501 2016-03-22  Nick Clifton  <nickc@redhat.com>
 502
 503         * configure: Regenerate.
 504
 505 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 506
 507         * arc-nps400-tbl.h: New file.
 508         * arc-opc.c: Add top level comment.
 509         (insert_nps_3bit_dst): New function.
 510         (extract_nps_3bit_dst): New function.
 511         (insert_nps_3bit_src2): New function.
 512         (extract_nps_3bit_src2): New function.
 513         (insert_nps_bitop_size): New function.
 514         (extract_nps_bitop_size): New function.
 515         (arc_flag_operands): Add nps400 entries.
 516         (arc_flag_classes): Add nps400 entries.
 517         (arc_operands): Add nps400 entries.
 518         (arc_opcodes): Add nps400 include.
 519
 520 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 521
 522         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 523         the new class enum values.
 524
 525 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 526
 527         * arc-dis.c (print_insn_arc): Handle nps400.
 528
 529 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 530
 531         * arc-opc.c (BASE): Delete.
 532
 533 2016-03-18  Nick Clifton  <nickc@redhat.com>
 534
 535         PR target/19721
 536         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 537         of MOV insn that aliases an ORR insn.
 538
 539 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 540
 541         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 542
 543 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 544
 545         * mcore-opc.h: Add const qualifiers.
 546         * microblaze-opc.h (struct op_code_struct): Likewise.
 547         * sh-opc.h: Likewise.
 548         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 549         (tic4x_print_op): Likewise.
 550
 551 2016-03-02  Alan Modra  <amodra@gmail.com>
 552
 553         * or1k-desc.h: Regenerate.
 554         * fr30-ibld.c: Regenerate.
 555         * rl78-decode.c: Regenerate.
 556
 557 2016-03-01  Nick Clifton  <nickc@redhat.com>
 558
 559         PR target/19747
 560         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 561
 562 2016-02-24  Renlin Li  <renlin.li@arm.com>
 563
 564         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 565         (print_insn_coprocessor): Support fp16 instructions.
 566
 567 2016-02-24  Renlin Li  <renlin.li@arm.com>
 568
 569         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 570         vminnm, vrint(mpna).
 571
 572 2016-02-24  Renlin Li  <renlin.li@arm.com>
 573
 574         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 575         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 576
 577 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 578
 579         * i386-dis.c (print_insn): Parenthesize expression to prevent
 580         truncated addresses.
 581         (OP_J): Likewise.
 582
 583 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 584             Janek van Oirschot  <jvanoirs@synopsys.com>
 585
 586         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 587         variable.
 588
 589 2016-02-04  Nick Clifton  <nickc@redhat.com>
 590
 591         PR target/19561
 592         * msp430-dis.c (print_insn_msp430): Add a special case for
 593         decoding an RRC instruction with the ZC bit set in the extension
 594         word.
 595
 596 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 597
 598         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 599         * epiphany-ibld.c: Regenerate.
 600         * fr30-ibld.c: Regenerate.
 601         * frv-ibld.c: Regenerate.
 602         * ip2k-ibld.c: Regenerate.
 603         * iq2000-ibld.c: Regenerate.
 604         * lm32-ibld.c: Regenerate.
 605         * m32c-ibld.c: Regenerate.
 606         * m32r-ibld.c: Regenerate.
 607         * mep-ibld.c: Regenerate.
 608         * mt-ibld.c: Regenerate.
 609         * or1k-ibld.c: Regenerate.
 610         * xc16x-ibld.c: Regenerate.
 611         * xstormy16-ibld.c: Regenerate.
 612
 613 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 614
 615         * epiphany-dis.c: Regenerated from latest cpu files.
 616
 617 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 618
 619         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 620         test bit.
 621
 622 2016-01-25  Renlin Li  <renlin.li@arm.com>
 623
 624         * arm-dis.c (mapping_symbol_for_insn): New function.
 625         (find_ifthen_state): Call mapping_symbol_for_insn().
 626
 627 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 628
 629         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 630         of MSR UAO immediate operand.
 631
 632 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 633
 634         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 635         instruction support.
 636
 637 2016-01-17  Alan Modra  <amodra@gmail.com>
 638
 639         * configure: Regenerate.
 640
 641 2016-01-14  Nick Clifton  <nickc@redhat.com>
 642
 643         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 644         instructions that can support stack pointer operations.
 645         * rl78-decode.c: Regenerate.
 646         * rl78-dis.c: Fix display of stack pointer in MOVW based
 647         instructions.
 648
 649 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 650
 651         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 652         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 653         erxtatus_el1 and erxaddr_el1.
 654
 655 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 656
 657         * arm-dis.c (arm_opcodes): Add "esb".
 658         (thumb_opcodes): Likewise.
 659
 660 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 661
 662         * ppc-opc.c <xscmpnedp>: Delete.
 663         <xvcmpnedp>: Likewise.
 664         <xvcmpnedp.>: Likewise.
 665         <xvcmpnesp>: Likewise.
 666         <xvcmpnesp.>: Likewise.
 667
 668 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 669
 670         PR gas/13050
 671         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 672         addition to ISA_A.
 673
 674 2016-01-01  Alan Modra  <amodra@gmail.com>
 675
 676         Update year range in copyright notice of all files.
 677
 678 For older changes see ChangeLog-2015
 679 \f
 680 Copyright (C) 2016 Free Software Foundation, Inc.
 681
 682 Copying and distribution of this file, with or without modification,
 683 are permitted in any medium without royalty provided the copyright
 684 notice and this notice are preserved.
 685
 686 Local Variables:
 687 mode: change-log
 688 left-margin: 8
 689 fill-column: 74
 690 version-control: never
 691 End: