0b88174ed81d42d208869d8e1059135b9373b3b8
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
4 * i386-tlb.h: Re-generate.
5
6 2018-03-08 Jan Beulich <jbeulich@suse.com>
7
8 * i386-gen.c (opcode_modifiers): Delete FloatD.
9 * i386-opc.h (FloatD): Delete.
10 (struct i386_opcode_modifier): Delete floatd.
11 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
12 FloatD by D.
13 * i386-tlb.h: Re-generate.
14
15 2018-03-08 Jan Beulich <jbeulich@suse.com>
16
17 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
18
19 2018-03-08 Jan Beulich <jbeulich@suse.com>
20
21 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
22 * i386-tlb.h: Re-generate.
23
24 2018-03-08 Jan Beulich <jbeulich@suse.com>
25
26 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
27 forms.
28 * i386-tlb.h: Re-generate.
29
30 2018-03-07 Alan Modra <amodra@gmail.com>
31
32 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
33 bfd_arch_rs6000.
34 * disassemble.h (print_insn_rs6000): Delete.
35 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
36 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
37 (print_insn_rs6000): Delete.
38
39 2018-03-03 Alan Modra <amodra@gmail.com>
40
41 * sysdep.h (opcodes_error_handler): Define.
42 (_bfd_error_handler): Declare.
43 * Makefile.am: Remove stray #.
44 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
45 EDIT" comment.
46 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
47 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
48 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
49 opcodes_error_handler to print errors. Standardize error messages.
50 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
51 and include opintl.h.
52 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
53 * i386-gen.c: Standardize error messages.
54 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
55 * Makefile.in: Regenerate.
56 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
57 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
58 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
59 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
60 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
61 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
62 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
63 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
64 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
65 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
66 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
67 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
68 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
69
70 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
71
72 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
73 vpsub[bwdq] instructions.
74 * i386-tbl.h: Regenerated.
75
76 2018-03-01 Alan Modra <amodra@gmail.com>
77
78 * configure.ac (ALL_LINGUAS): Sort.
79 * configure: Regenerate.
80
81 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
82
83 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
84 macro by assignements.
85
86 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
87
88 PR gas/22871
89 * i386-gen.c (opcode_modifiers): Add Optimize.
90 * i386-opc.h (Optimize): New enum.
91 (i386_opcode_modifier): Add optimize.
92 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
93 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
94 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
95 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
96 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
97 vpxord and vpxorq.
98 * i386-tbl.h: Regenerated.
99
100 2018-02-26 Alan Modra <amodra@gmail.com>
101
102 * crx-dis.c (getregliststring): Allocate a large enough buffer
103 to silence false positive gcc8 warning.
104
105 2018-02-22 Shea Levy <shea@shealevy.com>
106
107 * disassemble.c (ARCH_riscv): Define if ARCH_all.
108
109 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
110
111 * i386-opc.tbl: Add {rex},
112 * i386-tbl.h: Regenerated.
113
114 2018-02-20 Maciej W. Rozycki <macro@mips.com>
115
116 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
117 (mips16_opcodes): Replace `M' with `m' for "restore".
118
119 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
120
121 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
122
123 2018-02-13 Maciej W. Rozycki <macro@mips.com>
124
125 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
126 variable to `function_index'.
127
128 2018-02-13 Nick Clifton <nickc@redhat.com>
129
130 PR 22823
131 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
132 about truncation of printing.
133
134 2018-02-12 Henry Wong <henry@stuffedcow.net>
135
136 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
137
138 2018-02-05 Nick Clifton <nickc@redhat.com>
139
140 * po/pt_BR.po: Updated Brazilian Portuguese translation.
141
142 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
143
144 * i386-dis.c (enum): Add pconfig.
145 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
146 (cpu_flags): Add CpuPCONFIG.
147 * i386-opc.h (enum): Add CpuPCONFIG.
148 (i386_cpu_flags): Add cpupconfig.
149 * i386-opc.tbl: Add PCONFIG instruction.
150 * i386-init.h: Regenerate.
151 * i386-tbl.h: Likewise.
152
153 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
154
155 * i386-dis.c (enum): Add PREFIX_0F09.
156 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
157 (cpu_flags): Add CpuWBNOINVD.
158 * i386-opc.h (enum): Add CpuWBNOINVD.
159 (i386_cpu_flags): Add cpuwbnoinvd.
160 * i386-opc.tbl: Add WBNOINVD instruction.
161 * i386-init.h: Regenerate.
162 * i386-tbl.h: Likewise.
163
164 2018-01-17 Jim Wilson <jimw@sifive.com>
165
166 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
167
168 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
169
170 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
171 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
172 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
173 (cpu_flags): Add CpuIBT, CpuSHSTK.
174 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
175 (i386_cpu_flags): Add cpuibt, cpushstk.
176 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
177 * i386-init.h: Regenerate.
178 * i386-tbl.h: Likewise.
179
180 2018-01-16 Nick Clifton <nickc@redhat.com>
181
182 * po/pt_BR.po: Updated Brazilian Portugese translation.
183 * po/de.po: Updated German translation.
184
185 2018-01-15 Jim Wilson <jimw@sifive.com>
186
187 * riscv-opc.c (match_c_nop): New.
188 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
189
190 2018-01-15 Nick Clifton <nickc@redhat.com>
191
192 * po/uk.po: Updated Ukranian translation.
193
194 2018-01-13 Nick Clifton <nickc@redhat.com>
195
196 * po/opcodes.pot: Regenerated.
197
198 2018-01-13 Nick Clifton <nickc@redhat.com>
199
200 * configure: Regenerate.
201
202 2018-01-13 Nick Clifton <nickc@redhat.com>
203
204 2.30 branch created.
205
206 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
207
208 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
209 * i386-tbl.h: Regenerate.
210
211 2018-01-10 Jan Beulich <jbeulich@suse.com>
212
213 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
214 * i386-tbl.h: Re-generate.
215
216 2018-01-10 Jan Beulich <jbeulich@suse.com>
217
218 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
219 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
220 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
221 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
222 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
223 Disp8MemShift of AVX512VL forms.
224 * i386-tbl.h: Re-generate.
225
226 2018-01-09 Jim Wilson <jimw@sifive.com>
227
228 * riscv-dis.c (maybe_print_address): If base_reg is zero,
229 then the hi_addr value is zero.
230
231 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
232
233 * arm-dis.c (arm_opcodes): Add csdb.
234 (thumb32_opcodes): Add csdb.
235
236 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
237
238 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
239 * aarch64-asm-2.c: Regenerate.
240 * aarch64-dis-2.c: Regenerate.
241 * aarch64-opc-2.c: Regenerate.
242
243 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
244
245 PR gas/22681
246 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
247 Remove AVX512 vmovd with 64-bit operands.
248 * i386-tbl.h: Regenerated.
249
250 2018-01-05 Jim Wilson <jimw@sifive.com>
251
252 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
253 jalr.
254
255 2018-01-03 Alan Modra <amodra@gmail.com>
256
257 Update year range in copyright notice of all files.
258
259 2018-01-02 Jan Beulich <jbeulich@suse.com>
260
261 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
262 and OPERAND_TYPE_REGZMM entries.
263
264 For older changes see ChangeLog-2017
265 \f
266 Copyright (C) 2018 Free Software Foundation, Inc.
267
268 Copying and distribution of this file, with or without modification,
269 are permitted in any medium without royalty provided the copyright
270 notice and this notice are preserved.
271
272 Local Variables:
273 mode: change-log
274 left-margin: 8
275 fill-column: 74
276 version-control: never
277 End:
This page took 0.035365 seconds and 3 git commands to generate.