opcodes/ChangeLog

   1 2008-12-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
   2
   3         * Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files.
   4         * Makefile.in: Regenerate.
   5
   6 2008-12-23  Jon Beniston <jon@beniston.com>
   7
   8         * Makefile.am: Add LM32 object files and dependencies.
   9         * Makefile.in: Regenerate.
  10         * configure.in: Add LM32 target.
  11         * configure: Regenerate.
  12         * disassemble.c: Add LM32 disassembler.
  13         * cgen-asm.in: Update copyright year.
  14         * cgen-dis.in: Update copyright year.
  15         * cgen-ibld.in: Update copyright year.
  16         * lm32-asm.c: New file.
  17         * lm32-desc.c: New file.
  18         * lm32-desc.h: New file.
  19         * lm32-dis.c: New file.
  20         * lm32-ibld.c: New file.
  21         * lm32-opc.c: New file.
  22         * lm32-opc.h: New file.
  23         * lm32-opinst.c: New file.
  24
  25 2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>
  26
  27         * i386-dis.c (EXdS): New.
  28         (EXdVexS): Likewise.
  29         (EXqVexS): Likewise.
  30         (d_swap_mode): Likewise.
  31         (q_mode): Updated.
  32         (prefix_table): Use EXdS on movss and EXqS on movsd.
  33         (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
  34         (intel_operand_size): Handle d_swap_mode.
  35         (OP_EX): Likewise.
  36
  37         * i386-opc.h (S): Update comments.
  38
  39         * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
  40         * i386-tbl.h: Regenerated.
  41
  42 2008-12-23  Nick Clifton  <nickc@redhat.com>
  43
  44         * po/ga.po: Updated Irish translation.
  45
  46 2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>
  47
  48         * i386-dis.c (EbS): New.
  49         (EvS): Likewise.
  50         (EMS): Likewise.
  51         (EXqS): Likewise.
  52         (EXxS): Likewise.
  53         (b_swap_mode): Likewise.
  54         (v_swap_mode): Likewise.
  55         (q_swap_mode): Likewise.
  56         (x_swap_mode): Likewise.
  57         (v_mode): Updated.
  58         (w_mode): Likewise.
  59         (t_mode): Likewise.
  60         (xmm_mode): Likewise.
  61         (swap_operand): Likewise.
  62         (dis386): Use EbS on movB.  Use EvS on moveS.
  63         (dis386_twobyte): Use EXxS on movapX.
  64         (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
  65         vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
  66         (vex_table): Use EXxS on vmovapX.
  67         (vex_len_table): Use EXqS on vmovq.
  68         (intel_operand_size): Handle b_swap_mode, v_swap_mode,
  69         q_swap_mode and x_swap_mode.
  70         (OP_E_register): Handle b_swap_mode and v_swap_mode.
  71         (OP_EM): Handle v_swap_mode.
  72         (OP_EX): x_swap_mode and q_swap_mode.
  73
  74         * i386-gen.c (opcode_modifiers): Add S.
  75
  76         * i386-opc.h (S): New.
  77         (Modrm): Updated.
  78         (i386_opcode_modifier): Add s.
  79
  80         * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
  81         movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
  82         * i386-tbl.h: Regenerated.
  83
  84 2008-12-18  H.J. Lu  <hongjiu.lu@intel.com>
  85
  86         * i386-dis.c (mnemonicendp): New.
  87         (op): Likewise.
  88         (print_insn): Use mnemonicendp.
  89         (OP_3DNowSuffix): Likewise.
  90         (CMP_Fixup): Likewise.
  91         (CMPXCHG8B_Fixup): Likewise.
  92         (CRC32_Fixup): Likewise.
  93         (OP_DREX_FCMP): Likewise.
  94         (OP_DREX_ICMP): Likewise.
  95         (VZERO_Fixup): Likewise.
  96         (VCMP_Fixup): Likewise.
  97         (PCLMUL_Fixup): Likewise.
  98         (VPERMIL2_Fixup): Likewise.
  99         (MOVBE_Fixup): Likewise.
 100         (putop): Update mnemonicendp.
 101         (oappend): Use stpcpy.
 102         (simd_cmp_op): Changed to struct op.
 103         (vex_cmp_op): Likewise.
 104         (pclmul_op): Likewise.
 105         (vpermil2_op): Likewise.
 106
 107 2008-12-18  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 108
 109         * configure: Regenerate.
 110
 111 2008-12-15  Richard Earnshaw  <rearnsha@arm.com>
 112
 113         * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
 114         unified syntax.
 115
 116 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
 117
 118         * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
 119
 120 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
 121
 122         * i386-dis.c (putop): Remove strayed comments.
 123
 124 2008-12-04  Ben Elliston  <bje@au.ibm.com>
 125
 126         * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
 127         for -Mbooke.
 128         (print_ppc_disassembler_options): Update usage.
 129         * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
 130         (BOOKE64): Remove.
 131         (PPCCHLK64): Likewise.
 132         (powerpc_opcodes): Remove all BOOKE64 instructions.
 133
 134 2008-11-28  Joshua Kinard  <kumba@gentoo.org>
 135
 136         * mips-dis.c (mips_arch_choices): Add r14000, r16000.
 137
 138 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 139
 140         * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
 141         adjusted the mask for 32-bit branch instruction.
 142
 143 2008-11-27  Alan Modra  <amodra@bigpond.net.au>
 144
 145         * ppc-opc.c (extract_sprg): Correct operand range check.
 146
 147 2008-11-26  Andreas Schwab  <schwab@suse.de>
 148
 149         * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
 150         (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
 151         (save_printer, save_print_address): Remove.
 152         (fetch_data): Don't use them.
 153         (match_insn_m68k): Always restore printing functions.
 154         (print_insn_m68k): Don't save/restore printing functions.
 155
 156 2008-11-25  Nick Clifton  <nickc@redhat.com>
 157
 158         * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
 159
 160 2008-11-18  Catherine Moore  <clm@codesourcery.com>
 161
 162         * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
 163         instructions.
 164         (neon_opcodes): Likewise.
 165         (print_insn_coprocessor): Print 't' or 'b' for vcvt
 166         instructions.
 167
 168 2008-11-14  Tristan Gingold  <gingold@adacore.com>
 169
 170         * makefile.vms (OBJS): Update list of objects.
 171         (DEFS): Update
 172         (CFLAGS): Update.
 173
 174 2008-11-06  Chao-ying Fu  <fu@mips.com>
 175
 176         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
 177         before sync.
 178         (sync): New instruction with 5-bit sync type.
 179         * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
 180
 181 2008-11-06  Nick Clifton  <nickc@redhat.com>
 182
 183         * avr-dis.c: Replace uses of sprintf without a format string with
 184         calls to strcpy.
 185
 186 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
 187
 188         * i386-opc.tbl: Add cmovpe and cmovpo.
 189         * i386-tbl.h: Regenerated.
 190
 191 2008-10-22  Nick Clifton  <nickc@redhat.com>
 192
 193         PR 6937
 194         * configure.in (SHARED_LIBADD): Revert previous change.
 195         Add a comment explaining why.
 196         (SHARED_DEPENDENCIES): Revert previous change.
 197         * configure: Regenerate.
 198
 199 2008-10-10  Nick Clifton  <nickc@redhat.com>
 200
 201         PR 6937
 202         * configure.in (SHARED_LIBADD): Add libiberty.a.
 203         (SHARED_DEPENDENCIES): Add libiberty.a.
 204
 205 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 206
 207         * i386-gen.c: Include "hashtab.h".
 208         (next_field): Take a new argument, last.  Check last.
 209         (process_i386_cpu_flag): Updated.
 210         (process_i386_opcode_modifier): Likewise.
 211         (process_i386_operand_type): Likewise.
 212         (process_i386_registers): Likewise.
 213         (output_i386_opcode): New.
 214         (opcode_hash_entry): Likewise.
 215         (opcode_hash_table): Likewise.
 216         (opcode_hash_hash): Likewise.
 217         (opcode_hash_eq): Likewise.
 218         (process_i386_opcodes): Use opcode hash table and opcode array.
 219
 220 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 221
 222         * s390-opc.txt (stdy, stey): Fix description
 223
 224 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
 225
 226         * Makefile.am: Run "make dep-am".
 227         * Makefile.in: Regenerate.
 228
 229 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
 230
 231         * aclocal.m4: Regenerated.
 232         * configure: Likewise.
 233         * Makefile.in: Likewise.
 234
 235 2008-09-29  Nick Clifton  <nickc@redhat.com>
 236
 237         * po/vi.po: Updated Vietnamese translation.
 238         * po/fr.po: Updated French translation.
 239
 240 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
 241
 242         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
 243         (cfxr, cfdr, cfer, clclu): Add esa flag.
 244         (sqd): Instruction added.
 245         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
 246         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
 247
 248 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
 249
 250         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
 251         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
 252
 253 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
 254
 255         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
 256         * i386-tbl.h: Regenerated.
 257
 258 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 259
 260         * i386-dis.c (dis386): Adjust far return mnemonics.
 261         * i386-opc.tbl: Add retf.
 262         * i386-tbl.h: Re-generate.
 263
 264 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 265
 266         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 267
 268 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 269
 270         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 271         * ia64-gen.c (lookup_specifier): Likewise.
 272
 273         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 274         * ia64-raw.tbl: Likewise.
 275         * ia64-waw.tbl: Likewise.
 276         * ia64-asmtab.c: Regenerated.
 277
 278 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 279
 280         * i386-opc.tbl: Correct fidivr operand size.
 281
 282         * i386-tbl.h: Regenerated.
 283
 284 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 285
 286         * configure.in: Update a number of obsolete autoconf macros.
 287         * aclocal.m4: Regenerate.
 288
 289 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 290
 291         AVX Programming Reference (August, 2008)
 292         * i386-dis.c (PREFIX_VEX_38DB): New.
 293         (PREFIX_VEX_38DC): Likewise.
 294         (PREFIX_VEX_38DD): Likewise.
 295         (PREFIX_VEX_38DE): Likewise.
 296         (PREFIX_VEX_38DF): Likewise.
 297         (PREFIX_VEX_3ADF): Likewise.
 298         (VEX_LEN_38DB_P_2): Likewise.
 299         (VEX_LEN_38DC_P_2): Likewise.
 300         (VEX_LEN_38DD_P_2): Likewise.
 301         (VEX_LEN_38DE_P_2): Likewise.
 302         (VEX_LEN_38DF_P_2): Likewise.
 303         (VEX_LEN_3ADF_P_2): Likewise.
 304         (PREFIX_VEX_3A04): Updated.
 305         (VEX_LEN_3A06_P_2): Likewise.
 306         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 307         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 308         (x86_64_table): Likewise.
 309         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 310         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 311         VEX_LEN_3ADF_P_2.
 312
 313         * i386-opc.tbl: Add AES + AVX instructions.
 314         * i386-init.h: Regenerated.
 315         * i386-tbl.h: Likewise.
 316
 317 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 318
 319         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 320         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 321
 322 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 323
 324         PR 6526
 325         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 326         * Makefile.in: Regenerate.
 327         * aclocal.m4: Regenerate.
 328         * config.in: Regenerate.
 329         * configure: Regenerate.
 330
 331 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 332
 333         PR 6825
 334         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 335
 336 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 337
 338         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 339
 340         * i386-tbl.h: Regenerated.
 341
 342 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 343
 344         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 345         * Makefile.in: Regenerate.
 346         * po/POTFILES.in: Regenerate.
 347
 348 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 349
 350         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 351         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 352         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 353         * ppc-opc.c (insert_xt6): New static function.
 354         (extract_xt6): Likewise.
 355         (insert_xa6): Likewise.
 356         (extract_xa6: Likewise.
 357         (insert_xb6): Likewise.
 358         (extract_xb6): Likewise.
 359         (insert_xb6s): Likewise.
 360         (extract_xb6s): Likewise.
 361         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 362         XX3DM_MASK, PPCVSX): New.
 363         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 364         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 365
 366 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 367
 368         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 369         * Makefile.in: Regenerate.
 370
 371 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 372
 373         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 374         * i386-tbl.h: Regenerated.
 375
 376 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 377
 378         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 379         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 380         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 381         (powerpc_opcodes): Add Xilinx APU related opcodes.
 382
 383 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 384
 385         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 386
 387 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 388
 389         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 390
 391 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 392
 393         * mips-opc.c (CP): New macro.
 394         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 395         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 396         dmtc2 Octeon instructions.
 397
 398 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 399
 400         * dis-init.c (init_disassemble_info): Init endian_code field.
 401         * arm-dis.c (print_insn): Disassemble code according to
 402         setting of endian_code.
 403         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 404
 405 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 406
 407         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 408         for ELF symbols.
 409
 410 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 411
 412         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 413         (print_ppc_disassembler_options): Likewise.
 414         * ppc-opc.c (PPC464): Define.
 415         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 416
 417 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 418
 419         * configure: Regenerate.
 420
 421 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 422
 423         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 424         ppc_cpu_t typedef.
 425         (struct dis_private): New.
 426         (POWERPC_DIALECT): New define.
 427         (powerpc_dialect): Renamed to...
 428         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 429         struct dis_private.
 430         (print_insn_big_powerpc): Update for using structure in
 431         info->private_data.
 432         (print_insn_little_powerpc): Likewise.
 433         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 434         (skip_optional_operands): Likewise.
 435         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 436         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 437         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 438         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 439         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 440         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 441         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 442         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 443         param to be of type ppc_cpu_t.  Update prototype.
 444
 445 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 446
 447         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 448         +s, +S.
 449         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 450         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 451         syncw, syncws, vm3mulu, vm0 and vmulu.
 452
 453         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 454         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 455         seqi, sne and snei.
 456
 457 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 458
 459         * i386-opc.tbl: Add vmovd with 64bit operand.
 460         * i386-tbl.h: Regenerated.
 461
 462 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 463
 464         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 465
 466 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 467
 468         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 469         * i386-tbl.h: Regenerated.
 470
 471 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 472
 473         PR gas/6517
 474         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 475         into 32bit and 64bit.  Remove Reg64|Qword and add
 476         IgnoreSize|No_qSuf on 32bit version.
 477         * i386-tbl.h: Regenerated.
 478
 479 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 480
 481         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 482         * i386-tbl.h: Regenerated.
 483
 484 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 485
 486         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 487
 488 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 489
 490         * Makefile.am: Run "make dep-am".
 491         * Makefile.in: Regenerate.
 492
 493 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 494
 495         * i386-dis.c (MOVBE_Fixup): New.
 496         (Mo): Likewise.
 497         (PREFIX_0F3880): Likewise.
 498         (PREFIX_0F3881): Likewise.
 499         (PREFIX_0F38F0): Updated.
 500         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 501         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 502         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 503
 504         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 505         CPU_EPT_FLAGS.
 506         (cpu_flags): Add CpuMovbe and CpuEPT.
 507
 508         * i386-opc.h (CpuMovbe): New.
 509         (CpuEPT): Likewise.
 510         (CpuLM): Updated.
 511         (i386_cpu_flags): Add cpumovbe and cpuept.
 512
 513         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 514         * i386-init.h: Regenerated.
 515         * i386-tbl.h: Likewise.
 516
 517 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 518
 519         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 520         the two drem and the two dremu macros.
 521
 522 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 523
 524         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 525         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 526         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 527         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 528
 529 2008-04-25  David S. Miller  <davem@davemloft.net>
 530
 531         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 532         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 533
 534 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 535
 536         * aclocal.m4: Regenerate.
 537         * configure: Regenerate.
 538
 539 2008-04-23  David S. Miller  <davem@davemloft.net>
 540
 541         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 542         extended values.
 543         (prefetch_table): Add missing values.
 544
 545 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 546
 547         * i386-gen.c (opcode_modifiers): Add NoAVX.
 548
 549         * i386-opc.h (NoAVX): New.
 550         (OldGcc): Updated.
 551         (i386_opcode_modifier): Add noavx.
 552
 553         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 554         instructions which don't have AVX equivalent.
 555         * i386-tbl.h: Regenerated.
 556
 557 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 558
 559         * i386-dis.c (OP_VEX_FMA): New.
 560         (OP_EX_VexImmW): Likewise.
 561         (VexFMA): Likewise.
 562         (Vex128FMA): Likewise.
 563         (EXVexImmW): Likewise.
 564         (get_vex_imm8): Likewise.
 565         (OP_EX_VexReg): Likewise.
 566         (vex_i4_done): Renamed to ...
 567         (vex_w_done): This.
 568         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 569         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 570         FMA instructions.
 571         (print_insn): Updated.
 572         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 573         (OP_REG_VexI4): Check invalid high registers.
 574
 575 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 576             Michael Meissner  <michael.meissner@amd.com>
 577
 578         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 579         * i386-tbl.h: Regenerate from i386-opc.tbl.
 580
 581 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 582
 583         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 584         accept Power E500MC instructions.
 585         (print_ppc_disassembler_options): Document -Me500mc.
 586         * ppc-opc.c (DUIS, DUI, T): New.
 587         (XRT, XRTRA): Likewise.
 588         (E500MC): Likewise.
 589         (powerpc_opcodes): Add new Power E500MC instructions.
 590
 591 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 592
 593         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 594         (print_s390_disassembler_options): New function.
 595         * disassemble.c (disassembler_usage): Invoke
 596         print_s390_disassembler_options.
 597
 598 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 599
 600         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 601         of local variables used for mnemonic parsing: prefix, suffix and
 602         number.
 603
 604 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 605
 606         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 607         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 608         (s390_crb_extensions): New extensions table.
 609         (insertExpandedMnemonic): Handle '$' tag.
 610         * s390-opc.txt: Remove conditional jump variants which can now
 611         be expanded automatically.
 612         Replace '*' tag with '$' in the compare and branch instructions.
 613
 614 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 615
 616         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 617         (PREFIX_VEX_3AXX): Likewis.
 618
 619 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 620
 621         * i386-opc.tbl: Remove 4 extra blank lines.
 622
 623 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 624
 625         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 626         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 627         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 628         * i386-opc.tbl: Likewise.
 629
 630         * i386-opc.h (CpuCLMUL): Renamed to ...
 631         (CpuPCLMUL): This.
 632         (CpuFMA): Updated.
 633         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 634
 635         * i386-init.h: Regenerated.
 636
 637 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 638
 639         * i386-dis.c (OP_E_register): New.
 640         (OP_E_memory): Likewise.
 641         (OP_VEX): Likewise.
 642         (OP_EX_Vex): Likewise.
 643         (OP_EX_VexW): Likewise.
 644         (OP_XMM_Vex): Likewise.
 645         (OP_XMM_VexW): Likewise.
 646         (OP_REG_VexI4): Likewise.
 647         (PCLMUL_Fixup): Likewise.
 648         (VEXI4_Fixup): Likewise.
 649         (VZERO_Fixup): Likewise.
 650         (VCMP_Fixup): Likewise.
 651         (VPERMIL2_Fixup): Likewise.
 652         (rex_original): Likewise.
 653         (rex_ignored): Likewise.
 654         (Mxmm): Likewise.
 655         (XMM): Likewise.
 656         (EXxmm): Likewise.
 657         (EXxmmq): Likewise.
 658         (EXymmq): Likewise.
 659         (Vex): Likewise.
 660         (Vex128): Likewise.
 661         (Vex256): Likewise.
 662         (VexI4): Likewise.
 663         (EXdVex): Likewise.
 664         (EXqVex): Likewise.
 665         (EXVexW): Likewise.
 666         (EXdVexW): Likewise.
 667         (EXqVexW): Likewise.
 668         (XMVex): Likewise.
 669         (XMVexW): Likewise.
 670         (XMVexI4): Likewise.
 671         (PCLMUL): Likewise.
 672         (VZERO): Likewise.
 673         (VCMP): Likewise.
 674         (VPERMIL2): Likewise.
 675         (xmm_mode): Likewise.
 676         (xmmq_mode): Likewise.
 677         (ymmq_mode): Likewise.
 678         (vex_mode): Likewise.
 679         (vex128_mode): Likewise.
 680         (vex256_mode): Likewise.
 681         (USE_VEX_C4_TABLE): Likewise.
 682         (USE_VEX_C5_TABLE): Likewise.
 683         (USE_VEX_LEN_TABLE): Likewise.
 684         (VEX_C4_TABLE): Likewise.
 685         (VEX_C5_TABLE): Likewise.
 686         (VEX_LEN_TABLE): Likewise.
 687         (REG_VEX_XX): Likewise.
 688         (MOD_VEX_XXX): Likewise.
 689         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 690         (PREFIX_0F3A44): Likewise.
 691         (PREFIX_0F3ADF): Likewise.
 692         (PREFIX_VEX_XXX): Likewise.
 693         (VEX_OF): Likewise.
 694         (VEX_OF38): Likewise.
 695         (VEX_OF3A): Likewise.
 696         (VEX_LEN_XXX): Likewise.
 697         (vex): Likewise.
 698         (need_vex): Likewise.
 699         (need_vex_reg): Likewise.
 700         (vex_i4_done): Likewise.
 701         (vex_table): Likewise.
 702         (vex_len_table): Likewise.
 703         (OP_REG_VexI4): Likewise.
 704         (vex_cmp_op): Likewise.
 705         (pclmul_op): Likewise.
 706         (vpermil2_op): Likewise.
 707         (m_mode): Updated.
 708         (es_reg): Likewise.
 709         (PREFIX_0F38F0): Likewise.
 710         (PREFIX_0F3A60): Likewise.
 711         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 712         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 713         and PREFIX_VEX_XXX entries.
 714         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 715         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 716         PREFIX_0F3ADF.
 717         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 718         Add MOD_VEX_XXX entries.
 719         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 720         REX byte in rex_original.
 721         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 722         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 723         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 724         calling get_valid_dis386.  Use rex_original and rex_ignored when
 725         printing out REX.
 726         (putop): Handle "XY".
 727         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 728         ymmq_mode.
 729         (OP_E_extended): Updated to use OP_E_register and
 730         OP_E_memory.
 731         (OP_XMM): Handle VEX.
 732         (OP_EX): Likewise.
 733         (XMM_Fixup): Likewise.
 734         (CMP_Fixup): Use ARRAY_SIZE.
 735
 736         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 737         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 738         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 739         OPERAND_TYPE_VEX_IMM4.
 740         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 741         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 742         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 743         VexImmExt and SSE2AVX.
 744         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 745
 746         * i386-opc.h (CpuAVX): New.
 747         (CpuAES): Likewise.
 748         (CpuCLMUL): Likewise.
 749         (CpuFMA): Likewise.
 750         (Vex): Likewise.
 751         (Vex256): Likewise.
 752         (VexNDS): Likewise.
 753         (VexNDD): Likewise.
 754         (VexW0): Likewise.
 755         (VexW1): Likewise.
 756         (Vex0F): Likewise.
 757         (Vex0F38): Likewise.
 758         (Vex0F3A): Likewise.
 759         (Vex3Sources): Likewise.
 760         (VexImmExt): Likewise.
 761         (SSE2AVX): Likewise.
 762         (RegYMM): Likewise.
 763         (Ymmword): Likewise.
 764         (Vex_Imm4): Likewise.
 765         (Implicit1stXmm0): Likewise.
 766         (CpuXsave): Updated.
 767         (CpuLM): Likewise.
 768         (ByteOkIntel): Likewise.
 769         (OldGcc): Likewise.
 770         (Control): Likewise.
 771         (Unspecified): Likewise.
 772         (OTMax): Likewise.
 773         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 774         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 775         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 776         vex3sources, veximmext and sse2avx.
 777         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 778
 779         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 780
 781         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 782
 783         * i386-init.h: Regenerated.
 784         * i386-tbl.h: Likewise.
 785
 786 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 787
 788         From  Robin Getz  <robin.getz@analog.com>
 789         * bfin-dis.c (bu32): Typedef.
 790         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 791         (constant_formats[]): Add uimm32 and huimm16.
 792         (fmtconst_val): New.
 793         (uimm32): Define.
 794         (huimm32): Define.
 795         (imm16_val): Define.
 796         (luimm16_val): Define.
 797         (struct saved_state): Define.
 798         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 799         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 800         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 801         (get_allreg): New.
 802         (decode_LDIMMhalf_0): Print out the whole register value.
 803
 804         From Jie Zhang  <jie.zhang@analog.com>
 805         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 806         multiply and multiply-accumulate to data register instruction.
 807
 808         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 809         c_imm32, c_huimm32e): Define.
 810         (constant_formats): Add flags for printing decimal, leading spaces, and
 811         exact symbols.
 812         (comment, parallel): Add global flags in all disassembly.
 813         (fmtconst): Take advantage of new flags, and print default in hex.
 814         (fmtconst_val): Likewise.
 815         (decode_macfunc): Be consistant with spaces, tabs, comments,
 816         capitalization in disassembly, fix minor coding style issues.
 817         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 818         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 819         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 820         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 821         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 822         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 823         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 824         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 825         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 826         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 827         _print_insn_bfin, print_insn_bfin): Likewise.
 828
 829 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 830
 831         * aclocal.m4: Regenerate.
 832         * configure: Likewise.
 833         * Makefile.in: Likewise.
 834
 835 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 836
 837         * Makefile.am: Run "make dep-am".
 838         * Makefile.in: Regenerate.
 839         * configure: Regenerate.
 840
 841 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 842
 843         * ppc-opc.c (powerpc_opcodes): Order and format.
 844
 845 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 846
 847         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 848         * i386-tbl.h: Regenerated.
 849
 850 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 851
 852         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 853         x86-64.
 854         * i386-tbl.h: Regenerated.
 855
 856 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 857
 858         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 859         and Fword for far indirect jmp. Allow Reg16 and Word for near
 860         indirect jmp on x86-64. Disallow Fword for lcall.
 861         * i386-tbl.h: Re-generate.
 862
 863 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 864
 865         * cr16-opc.c  (cr16_num_optab): Defined
 866
 867 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 868
 869         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 870         * i386-init.h: Regenerated.
 871
 872 2008-02-14  Nick Clifton  <nickc@redhat.com>
 873
 874         PR binutils/5524
 875         * configure.in (SHARED_LIBADD): Select the correct host specific
 876         file extension for shared libraries.
 877         * configure: Regenerate.
 878
 879 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 880
 881         * i386-opc.h (RegFlat): New.
 882         * i386-reg.tbl (flat): Add.
 883         * i386-tbl.h: Re-generate.
 884
 885 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 886
 887         * i386-dis.c (a_mode): New.
 888         (cond_jump_mode): Adjust.
 889         (Ma): Change to a_mode.
 890         (intel_operand_size): Handle a_mode.
 891         * i386-opc.tbl: Allow Dword and Qword for bound.
 892         * i386-tbl.h: Re-generate.
 893
 894 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 895
 896         * i386-gen.c (process_i386_registers): Process new fields.
 897         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 898         unsigned char. Add dw2_regnum and Dw2Inval.
 899         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 900         register names.
 901         * i386-tbl.h: Re-generate.
 902
 903 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 904
 905         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 906         * i386-init.h: Updated.
 907
 908 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 909
 910         * i386-gen.c (cpu_flags): Add CpuXsave.
 911
 912         * i386-opc.h (CpuXsave): New.
 913         (CpuLM): Updated.
 914         (i386_cpu_flags): Add cpuxsave.
 915
 916         * i386-dis.c (MOD_0FAE_REG_4): New.
 917         (RM_0F01_REG_2): Likewise.
 918         (MOD_0FAE_REG_5): Updated.
 919         (RM_0F01_REG_3): Likewise.
 920         (reg_table): Use MOD_0FAE_REG_4.
 921         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 922         for xrstor.
 923         (rm_table): Add RM_0F01_REG_2.
 924
 925         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 926         * i386-init.h: Regenerated.
 927         * i386-tbl.h: Likewise.
 928
 929 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 930
 931         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 932         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 933         * i386-tbl.h: Re-generate.
 934
 935 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 936
 937         PR 5715
 938         * configure: Regenerated.
 939
 940 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 941
 942         * mips-dis.c: Update copyright.
 943         (mips_arch_choices): Add Octeon.
 944         * mips-opc.c: Update copyright.
 945         (IOCT): New macro.
 946         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 947
 948 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 949
 950         * ppc-opc.c: Support optional L form mtmsr.
 951
 952 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 953
 954         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 955
 956 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 957
 958         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 959         * i386-init.h: Regenerated.
 960
 961 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 962
 963         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 964         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 965
 966 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 967
 968         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 969         (cpu_flags): Likewise.
 970
 971         * i386-opc.h (CpuMMX2): Removed.
 972         (CpuSSE): Updated.
 973
 974         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 975         * i386-init.h: Regenerated.
 976         * i386-tbl.h: Likewise.
 977
 978 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 979
 980         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 981         CPU_SMX_FLAGS.
 982         * i386-init.h: Regenerated.
 983
 984 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 985
 986         * i386-opc.tbl: Use Qword on movddup.
 987         * i386-tbl.h: Regenerated.
 988
 989 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 990
 991         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 992         * i386-tbl.h: Regenerated.
 993
 994 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 995
 996         * i386-dis.c (Mx): New.
 997         (PREFIX_0FC3): Likewise.
 998         (PREFIX_0FC7_REG_6): Updated.
 999         (dis386_twobyte): Use PREFIX_0FC3.
1000         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
1001         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
1002         movntss.
1003
1004 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1005
1006         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
1007         (operand_types): Add Mem.
1008
1009         * i386-opc.h (IntelSyntax): New.
1010         * i386-opc.h (Mem): New.
1011         (Byte): Updated.
1012         (Opcode_Modifier_Max): Updated.
1013         (i386_opcode_modifier): Add intelsyntax.
1014         (i386_operand_type): Add mem.
1015
1016         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
1017         instructions.
1018
1019         * i386-reg.tbl: Add size for accumulator.
1020
1021         * i386-init.h: Regenerated.
1022         * i386-tbl.h: Likewise.
1023
1024 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
1025
1026         * i386-opc.h (Byte): Fix a typo.
1027
1028 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1029
1030         PR gas/5534
1031         * i386-gen.c (operand_type_init): Add Dword to
1032         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
1033         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
1034         Qword and Xmmword.
1035         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
1036         Xmmword, Unspecified and Anysize.
1037         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
1038         an alias of Xmmword.
1039
1040         * i386-opc.h (CheckSize): Removed.
1041         (Byte): Updated.
1042         (Word): Likewise.
1043         (Dword): Likewise.
1044         (Qword): Likewise.
1045         (Xmmword): Likewise.
1046         (FWait): Updated.
1047         (OTMax): Likewise.
1048         (i386_opcode_modifier): Remove checksize, byte, word, dword,
1049         qword and xmmword.
1050         (Fword): New.
1051         (TBYTE): Likewise.
1052         (Unspecified): Likewise.
1053         (Anysize): Likewise.
1054         (i386_operand_type): Add byte, word, dword, fword, qword,
1055         tbyte xmmword, unspecified and anysize.
1056
1057         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
1058         Tbyte, Xmmword, Unspecified and Anysize.
1059
1060         * i386-reg.tbl: Add size for accumulator.
1061
1062         * i386-init.h: Regenerated.
1063         * i386-tbl.h: Likewise.
1064
1065 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1066
1067         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
1068         (REG_0F18): Updated.
1069         (reg_table): Updated.
1070         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
1071         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
1072
1073 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1074
1075         * i386-gen.c (set_bitfield): Use fail () on error.
1076
1077 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1078
1079         * i386-gen.c (lineno): New.
1080         (filename): Likewise.
1081         (set_bitfield): Report filename and line numer on error.
1082         (process_i386_opcodes): Set filename and update lineno.
1083         (process_i386_registers): Likewise.
1084
1085 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
1086
1087         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1088         ATTSyntax.
1089
1090         * i386-opc.h (IntelMnemonic): Renamed to ..
1091         (ATTSyntax): This
1092         (Opcode_Modifier_Max): Updated.
1093         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1094         and intelsyntax.
1095
1096         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1097         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1098         * i386-tbl.h: Regenerated.
1099
1100 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1101
1102         * i386-gen.c: Update copyright to 2008.
1103         * i386-opc.h: Likewise.
1104         * i386-opc.tbl: Likewise.
1105
1106         * i386-init.h: Regenerated.
1107         * i386-tbl.h: Likewise.
1108
1109 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1110
1111         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1112         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1113         * i386-tbl.h: Regenerated.
1114
1115 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1116
1117         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1118         CpuSSE4_2_Or_ABM.
1119         (cpu_flags): Likewise.
1120
1121         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1122         (CpuSSE4_2_Or_ABM): Likewise.
1123         (CpuLM): Updated.
1124         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1125
1126         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1127         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1128         and CpuPadLock, respectively.
1129         * i386-init.h: Regenerated.
1130         * i386-tbl.h: Likewise.
1131
1132 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1133
1134         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1135
1136         * i386-opc.h (No_xSuf): Removed.
1137         (CheckSize): Updated.
1138
1139         * i386-tbl.h: Regenerated.
1140
1141 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1142
1143         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1144         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1145         CPU_SSE5_FLAGS.
1146         (cpu_flags): Add CpuSSE4_2_Or_ABM.
1147
1148         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1149         (CpuLM): Updated.
1150         (i386_cpu_flags): Add cpusse4_2_or_abm.
1151
1152         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1153         CpuABM|CpuSSE4_2 on popcnt.
1154         * i386-init.h: Regenerated.
1155         * i386-tbl.h: Likewise.
1156
1157 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1158
1159         * i386-opc.h: Update comments.
1160
1161 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1162
1163         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1164         * i386-opc.h: Likewise.
1165         * i386-opc.tbl: Likewise.
1166
1167 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1168
1169         PR gas/5534
1170         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1171         Byte, Word, Dword, QWord and Xmmword.
1172
1173         * i386-opc.h (No_xSuf): New.
1174         (CheckSize): Likewise.
1175         (Byte): Likewise.
1176         (Word): Likewise.
1177         (Dword): Likewise.
1178         (QWord): Likewise.
1179         (Xmmword): Likewise.
1180         (FWait): Updated.
1181         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1182         Dword, QWord and Xmmword.
1183
1184         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1185         used.
1186         * i386-tbl.h: Regenerated.
1187
1188 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1189
1190         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1191         From Miod Vallat.
1192
1193 For older changes see ChangeLog-2007
1194 \f
1195 Local Variables:
1196 mode: change-log
1197 left-margin: 8
1198 fill-column: 74
1199 version-control: never
1200 End: