opcodes/ChangeLog

   1 2012-10-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
   2
   3         * s390-mkopc.c: Accept empty lines in s390-opc.txt.
   4         * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 and RRF_RMRR.
   5         * s390-opc.txt: Add new instructions.  New instruction type for lptea.
   6
   7 2012-10-26  Christian Groessler  <chris@groessler.org>
   8
   9         * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
  10         trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb).  Remove
  11         non-existing opcode trtrb.
  12         * z8k-opc.h: Regenerate.
  13
  14 2012-10-26  Alan Modra  <amodra@gmail.com>
  15
  16         * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
  17
  18 2012-10-24  Roland McGrath  <mcgrathr@google.com>
  19
  20         * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
  21         set rex_used to rex.
  22
  23 2012-10-22  Peter Bergner  <bergner@vnet.ibm.com>
  24
  25         * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
  26
  27 2012-10-18  Tom Tromey  <tromey@redhat.com>
  28
  29         * tic54x-dis.c (print_instruction): Don't use K&R style.
  30         (print_parallel_instruction, sprint_dual_address)
  31         (sprint_indirect_address, sprint_direct_address, sprint_mmr)
  32         (sprint_cc2, sprint_condition): Likewise.
  33
  34 2012-10-18  Kai Tietz  <ktietz@redhat.com>
  35
  36         * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
  37         value with a default.
  38         (do_special_encoding): Likewise.
  39         (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
  40         variables with default.
  41         * arc-dis.c (write_comments_): Don't use strncat due
  42         size of state->commentBuffer pointer isn't predictable.
  43
  44 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  45
  46         * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
  47         rmr_el3; remove daifset and daifclr.
  48
  49 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  50
  51         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
  52         the alignment of addr.offset.imm instead of that of shifter.amount for
  53         operand type AARCH64_OPND_ADDR_UIMM12.
  54
  55 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  56
  57         * arm-dis.c: Use preferred form of vrint instruction variants
  58         for disassembly.
  59
  60 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  61
  62         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
  63         * i386-init.h: Regenerated.
  64
  65 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
  66
  67         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
  68         * ppc-opc.c (VBA): New define.
  69         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
  70         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
  71
  72 2012-10-04  Nick Clifton  <nickc@redhat.com>
  73
  74         * v850-dis.c (disassemble): Place square parentheses around second
  75         register operand of clr1, not1, set1 and tst1 instructions.
  76
  77 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  78
  79         * s390-mkopc.c: Support new option zEC12.
  80         * s390-opc.c: Add new instruction formats.
  81         * s390-opc.txt: Add new instructions for zEC12.
  82
  83 2012-09-27  Anthony Green  <green@moxielogic.com>
  84
  85         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
  86         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
  87
  88 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
  89
  90         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
  91         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
  92         and CPU_BTVER2_FLAGS.
  93         * i386-init.h: Regenerated.
  94
  95 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  96
  97         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
  98         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
  99         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
 100         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
 101         (cpu_flags): Add CpuCX16.
 102         * i386-opc.h (CpuCX16): New.
 103         (i386_cpu_flags): Add cpucx16.
 104         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
 105         * i386-tbl.h: Regenerate.
 106         * i386-init.h: Likewise.
 107
 108 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 109
 110         * arm-dis.c: Changed ldra and strl-form mnemonics
 111         to lda and stl-form.
 112
 113 2012-09-18  Chao-ying Fu  <fu@mips.com>
 114
 115         * micromips-opc.c (micromips_opcodes): Correct the encoding of
 116         the "swxc1" instruction.
 117
 118 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 119
 120         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
 121         the parameter 'inst'.
 122         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
 123         (convert_mov_to_movewide): Change to assert (0) when
 124         aarch64_wide_constant_p returns FALSE.
 125
 126 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
 127
 128         * configure: Regenerate.
 129
 130 2012-09-14  Anthony Green  <green@moxielogic.com>
 131
 132         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
 133         the address after the branch instruction.
 134
 135 2012-09-13  Anthony Green  <green@moxielogic.com>
 136
 137         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
 138
 139 2012-09-10  Matthias Klose  <doko@ubuntu.com>
 140
 141         * config.in: Disable sanity check for kfreebsd.
 142
 143 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 144
 145         * configure: Regenerated.
 146
 147 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 148
 149         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 150         * ia64-gen.c: Promote completer index type to longlong.
 151         (irf_operand): Add new register recognition.
 152         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 153         (lookup_specifier): Add new resource recognition.
 154         (insert_bit_table_ent): Relax abort condition according to the
 155         changed completer index type.
 156         (print_dis_table): Fix printf format for completer index.
 157         * ia64-ic.tbl: Add a new instruction class.
 158         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 159         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 160         * ia64-opc.h: Define short names for new operand types.
 161         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 162         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 163         * ia64-asmtab.c: Regenerate.
 164
 165 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 166
 167         * ppc-opc.c (VXASHB_MASK): New define.
 168         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 169
 170 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 171
 172         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 173         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 174         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 175         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 176         vupklsh>: Use VXVA_MASK.
 177         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 178         <mfvscr>: Use VXVAVB_MASK.
 179         <mtvscr>: Use VXVDVA_MASK.
 180         <vspltb>: Use VXUIMM4_MASK.
 181         <vsplth>: Use VXUIMM3_MASK.
 182         <vspltw>: Use VXUIMM2_MASK.
 183
 184 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 185
 186         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 187
 188 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 189
 190         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 191
 192 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 193
 194         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 195
 196 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 197
 198         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 199
 200 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 201
 202         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 203         conversions.
 204
 205 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 206
 207         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 208         (neon_opcodes): Likewise.
 209
 210 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 211
 212         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 213         variants.
 214         (neon_opcodes): Likewise.
 215
 216 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 217
 218         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 219         (neon_opcodes): Likewise.
 220
 221 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 222
 223         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 224         (print_insn_coprocessor): Add new %<>c bitfield format
 225         specifier.
 226
 227 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 228
 229         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 230         (thumb32_opcodes): Likewise.
 231         (print_arm_insn): Add support for %<>T formatter.
 232
 233 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 234
 235         * arm-dis.c (arm_opcodes): Add HLT.
 236         (thumb_opcodes): Likewise.
 237
 238 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 239
 240         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 241
 242 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 243
 244         * arm-dis.c (arm_opcodes): Add SEVL.
 245         (thumb_opcodes): Likewise.
 246         (thumb32_opcodes): Likewise.
 247
 248 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 249
 250         * arm-dis.c (data_barrier_option): New function.
 251         (print_insn_arm): Use data_barrier_option.
 252         (print_insn_thumb32): Use data_barrier_option.
 253
 254 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 255
 256         * arm-dis.c (COND_UNCOND): New constant.
 257         (print_insn_coprocessor): Add support for %u format specifier.
 258         (print_insn_neon): Likewise.
 259
 260 2012-08-21  David S. Miller  <davem@davemloft.net>
 261
 262         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 263         F3F4 macro.
 264
 265 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 266
 267         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 268         vabsduh, vabsduw, mviwsplt.
 269
 270 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 271
 272         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 273         CPU_BTVER2_FLAGS.
 274
 275         * i386-opc.h: Update CpuPRFCHW comment.
 276
 277         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 278         * i386-init.h: Regenerated.
 279         * i386-tbl.h: Likewise.
 280
 281 2012-08-17  Nick Clifton  <nickc@redhat.com>
 282
 283         * po/uk.po: New Ukranian translation.
 284         * configure.in (ALL_LINGUAS): Add uk.
 285         * configure: Regenerate.
 286
 287 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 288
 289         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 290         RBX for the third operand.
 291         <"lswi">: Use RAX for second and NBI for the third operand.
 292
 293 2012-08-15  DJ Delorie  <dj@redhat.com>
 294
 295         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 296         operands, so that data addresses can be corrected when not
 297         ES-overridden.
 298         * rl78-decode.c: Regenerate.
 299         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 300         irrelevent.  When the 'e' specifier is used on an operand and no
 301         ES prefix is provided, adjust address to make it absolute.
 302
 303 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 304
 305         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 306
 307 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 308
 309         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 310
 311 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 312
 313         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 314         macros, use local variables for info struct member accesses,
 315         update the type of the variable used to hold the instruction
 316         word.
 317         (print_insn_mips, print_mips16_insn_arg): Likewise.
 318         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 319         local variables for info struct member accesses.
 320         (print_insn_micromips): Add GET_OP_S local macro.
 321         (_print_insn_mips): Update the type of the variable used to hold
 322         the instruction word.
 323
 324 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 325             Laurent Desnogues  <laurent.desnogues@arm.com>
 326             Jim MacArthur  <jim.macarthur@arm.com>
 327             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 328             Nigel Stephens  <nigel.stephens@arm.com>
 329             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 330             Richard Earnshaw  <rearnsha@arm.com>
 331             Sofiane Naci  <sofiane.naci@arm.com>
 332             Tejas Belagod  <tejas.belagod@arm.com>
 333             Yufeng Zhang  <yufeng.zhang@arm.com>
 334
 335         * Makefile.am: Add AArch64.
 336         * Makefile.in: Regenerate.
 337         * aarch64-asm.c: New file.
 338         * aarch64-asm.h: New file.
 339         * aarch64-dis.c: New file.
 340         * aarch64-dis.h: New file.
 341         * aarch64-gen.c: New file.
 342         * aarch64-opc.c: New file.
 343         * aarch64-opc.h: New file.
 344         * aarch64-tbl.h: New file.
 345         * configure.in: Add AArch64.
 346         * configure: Regenerate.
 347         * disassemble.c: Add AArch64.
 348         * aarch64-asm-2.c: New file (automatically generated).
 349         * aarch64-dis-2.c: New file (automatically generated).
 350         * aarch64-opc-2.c: New file (automatically generated).
 351         * po/POTFILES.in: Regenerate.
 352
 353 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 354
 355         * micromips-opc.c (micromips_opcodes): Update comment.
 356         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 357         instructions for IOCT as appropriate.
 358         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 359         opcode_is_member.
 360         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 361         the result of a check for the -Wno-missing-field-initializers
 362         GCC option.
 363         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 364         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 365         compilation.
 366         (mips16-opc.lo): Likewise.
 367         (micromips-opc.lo): Likewise.
 368         * aclocal.m4: Regenerate.
 369         * configure: Regenerate.
 370         * Makefile.in: Regenerate.
 371
 372 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 373
 374         PR gas/14423
 375         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 376         * i386-init.h: Regenerated.
 377
 378 2012-08-09  Nick Clifton  <nickc@redhat.com>
 379
 380         * po/vi.po: Updated Vietnamese translation.
 381
 382 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 383
 384         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 385         AMD-reserved cases as "prefetch".
 386         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 387         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 388         (reg_table): Use those under REG_0F18.
 389         (mod_table): Add those cases as "nop/reserved".
 390
 391 2012-08-07  Jan Beulich <jbeulich@suse.com>
 392
 393         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 394
 395 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 396
 397         * i386-dis.c (print_insn): Print spaces between multiple excess
 398         prefixes.  Return actual number of excess prefixes consumed,
 399         not always one.
 400
 401         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 402
 403 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 404             Victor Khimenko  <khim@google.com>
 405             H.J. Lu  <hongjiu.lu@intel.com>
 406
 407         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 408         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 409         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 410         (OP_E_register): Likewise.
 411         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 412
 413 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 414
 415         * configure.in: Formatting.
 416         * configure: Regenerate.
 417
 418 2012-08-01  Alan Modra  <amodra@gmail.com>
 419
 420         * h8300-dis.c: Fix printf arg warnings.
 421         * i960-dis.c: Likewise.
 422         * mips-dis.c: Likewise.
 423         * pdp11-dis.c: Likewise.
 424         * sh-dis.c: Likewise.
 425         * v850-dis.c: Likewise.
 426         * configure.in: Formatting.
 427         * configure: Regenerate.
 428         * rl78-decode.c: Regenerate.
 429         * po/POTFILES.in: Regenerate.
 430
 431 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 432             Catherine Moore  <clm@codesourcery.com>
 433             Maciej W. Rozycki  <macro@codesourcery.com>
 434
 435         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 436         (DSP_VOLA): Likewise.
 437         (D32, D33): Likewise.
 438         (micromips_opcodes): Add DSP ASE instructions.
 439         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 440         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 441
 442 2012-07-31  Jan Beulich <jbeulich@suse.com>
 443
 444         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 445         instruction group. Mark as requiring AVX2.
 446         * i386-tbl.h: Re-generate.
 447
 448 2012-07-30  Nick Clifton  <nickc@redhat.com>
 449
 450         * po/opcodes.pot: Updated template.
 451         * po/es.po: Updated Spanish translation.
 452         * po/fi.po: Updated Finnish translation.
 453
 454 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 455
 456         * configure.in (BFD_VERSION): Run bfd/configure --version and
 457         parse the output of that.
 458         * configure: Regenerate.
 459
 460 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 461
 462         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 463
 464 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 465             Dr David Alan Gilbert  <dave@treblig.org>
 466
 467         PR binutils/13135
 468         * arm-dis.c: Add necessary casts for printing integer values.
 469         Use %s when printing string values.
 470         * hppa-dis.c: Likewise.
 471         * m68k-dis.c: Likewise.
 472         * microblaze-dis.c: Likewise.
 473         * mips-dis.c: Likewise.
 474         * sparc-dis.c: Likewise.
 475
 476 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 477
 478         PR binutils/14355
 479         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 480         (VEX_LEN_0FXOP_08_CD): Likewise.
 481         (VEX_LEN_0FXOP_08_CE): Likewise.
 482         (VEX_LEN_0FXOP_08_CF): Likewise.
 483         (VEX_LEN_0FXOP_08_EC): Likewise.
 484         (VEX_LEN_0FXOP_08_ED): Likewise.
 485         (VEX_LEN_0FXOP_08_EE): Likewise.
 486         (VEX_LEN_0FXOP_08_EF): Likewise.
 487         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 488         vpcomub, vpcomuw, vpcomud, vpcomuq.
 489         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 490         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 491         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 492         VEX_LEN_0FXOP_08_EF.
 493
 494 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 495
 496         * i386-dis.c (PREFIX_0F38F6): New.
 497         (prefix_table): Add adcx, adox instructions.
 498         (three_byte_table): Use PREFIX_0F38F6.
 499         (mod_table): Add rdseed instruction.
 500         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 501         (cpu_flags): Likewise.
 502         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 503         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 504         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 505         prefetchw.
 506         * i386-tbl.h: Regenerate.
 507         * i386-init.h: Likewise.
 508
 509 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 510
 511         * mips-dis.c: Remove gratuitous newline.
 512
 513 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 514
 515         * xgate-dis.c: Removed an IF statement that will
 516         always be false due to overlapping operand masks.
 517         * xgate-opc.c: Corrected 'com' opcode entry and
 518         fixed spacing.
 519
 520 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 521
 522         * i386-opc.tbl: Add RepPrefixOk to nop.
 523         * i386-tbl.h: Regenerate.
 524
 525 2012-06-28  Nick Clifton  <nickc@redhat.com>
 526
 527         * po/vi.po: Updated Vietnamese translation.
 528
 529 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 530
 531         * i386-opc.tbl: Add RepPrefixOk to ret.
 532         * i386-tbl.h: Regenerate.
 533
 534         * i386-opc.h (RepPrefixOk): New enum constant.
 535         (i386_opcode_modifier): New bitfield 'repprefixok'.
 536         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 537         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 538         instructions that have IsString.
 539         * i386-tbl.h: Regenerate.
 540
 541 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 542
 543         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 544         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 545         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 546         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 547         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 548         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 549         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 550         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 551         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 552
 553 2012-05-19  Alan Modra  <amodra@gmail.com>
 554
 555         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 556         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 557
 558 2012-05-18  Alan Modra  <amodra@gmail.com>
 559
 560         * ia64-opc.c: Remove #include "ansidecl.h".
 561         * z8kgen.c: Include sysdep.h first.
 562
 563         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 564         * bfin-dis.c: Likewise.
 565         * i860-dis.c: Likewise.
 566         * ia64-dis.c: Likewise.
 567         * ia64-gen.c: Likewise.
 568         * m68hc11-dis.c: Likewise.
 569         * mmix-dis.c: Likewise.
 570         * msp430-dis.c: Likewise.
 571         * or32-dis.c: Likewise.
 572         * rl78-dis.c: Likewise.
 573         * rx-dis.c: Likewise.
 574         * tic4x-dis.c: Likewise.
 575         * tilegx-opc.c: Likewise.
 576         * tilepro-opc.c: Likewise.
 577         * rx-decode.c: Regenerate.
 578
 579 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 580
 581         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 582
 583 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 584
 585         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 586
 587 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 588             Nick Clifton  <nickc@redhat.com>
 589
 590         PR 14072
 591         * configure.in: Add check that sysdep.h has been included before
 592         any system header files.
 593         * configure: Regenerate.
 594         * config.in: Regenerate.
 595         * sysdep.h: Generate an error if included before config.h.
 596         * alpha-opc.c: Include sysdep.h before any other header file.
 597         * alpha-dis.c: Likewise.
 598         * avr-dis.c: Likewise.
 599         * cgen-opc.c: Likewise.
 600         * cr16-dis.c: Likewise.
 601         * cris-dis.c: Likewise.
 602         * crx-dis.c: Likewise.
 603         * d10v-dis.c: Likewise.
 604         * d10v-opc.c: Likewise.
 605         * d30v-dis.c: Likewise.
 606         * d30v-opc.c: Likewise.
 607         * h8500-dis.c: Likewise.
 608         * i370-dis.c: Likewise.
 609         * i370-opc.c: Likewise.
 610         * m10200-dis.c: Likewise.
 611         * m10300-dis.c: Likewise.
 612         * micromips-opc.c: Likewise.
 613         * mips-opc.c: Likewise.
 614         * mips61-opc.c: Likewise.
 615         * moxie-dis.c: Likewise.
 616         * or32-opc.c: Likewise.
 617         * pj-dis.c: Likewise.
 618         * ppc-dis.c: Likewise.
 619         * ppc-opc.c: Likewise.
 620         * s390-dis.c: Likewise.
 621         * sh-dis.c: Likewise.
 622         * sh64-dis.c: Likewise.
 623         * sparc-dis.c: Likewise.
 624         * sparc-opc.c: Likewise.
 625         * spu-dis.c: Likewise.
 626         * tic30-dis.c: Likewise.
 627         * tic54x-dis.c: Likewise.
 628         * tic80-dis.c: Likewise.
 629         * tic80-opc.c: Likewise.
 630         * tilegx-dis.c: Likewise.
 631         * tilepro-dis.c: Likewise.
 632         * v850-dis.c: Likewise.
 633         * v850-opc.c: Likewise.
 634         * vax-dis.c: Likewise.
 635         * w65-dis.c: Likewise.
 636         * xgate-dis.c: Likewise.
 637         * xtensa-dis.c: Likewise.
 638         * rl78-decode.opc: Likewise.
 639         * rl78-decode.c: Regenerate.
 640         * rx-decode.opc: Likewise.
 641         * rx-decode.c: Regenerate.
 642
 643 2012-05-17  Alan Modra  <amodra@gmail.com>
 644
 645         * ppc_dis.c: Don't include elf/ppc.h.
 646
 647 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 648
 649         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 650         to PUSH/POP {reg}.
 651
 652 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 653             Stephane Carrez <stcarrez@nerim.fr>
 654
 655         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 656         target.
 657         * disassemble.c: Likewise.
 658         * configure: Regenerate.
 659         * m68hc11-dis.c: Make objdump output more consistent, use hex
 660         instead of decimal and use 0x prefix for hex.
 661         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 662
 663 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 664
 665         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 666         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 667         (vle_opcd_indices): New array.
 668         (lookup_vle): New function.
 669         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 670         (print_insn_powerpc): Likewise.
 671         * ppc-opc.c: Likewise.
 672
 673 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 674             Maciej W. Rozycki  <macro@codesourcery.com>
 675             Rhonda Wittels  <rhonda@codesourcery.com>
 676             Nathan Froyd <froydnj@codesourcery.com>
 677
 678         * ppc-opc.c (insert_arx, extract_arx): New functions.
 679         (insert_ary, extract_ary): New functions.
 680         (insert_li20, extract_li20): New functions.
 681         (insert_rx, extract_rx): New functions.
 682         (insert_ry, extract_ry): New functions.
 683         (insert_sci8, extract_sci8): New functions.
 684         (insert_sci8n, extract_sci8n): New functions.
 685         (insert_sd4h, extract_sd4h): New functions.
 686         (insert_sd4w, extract_sd4w): New functions.
 687         (insert_vlesi, extract_vlesi): New functions.
 688         (insert_vlensi, extract_vlensi): New functions.
 689         (insert_vleui, extract_vleui): New functions.
 690         (insert_vleil, extract_vleil): New functions.
 691         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 692         (BI16, BI32, BO32, B8): New.
 693         (B15, B24, CRD32, CRS): New.
 694         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 695         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 696         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 697         (SH6_MASK): Use PPC_OPSHIFT_INV.
 698         (SI8, UI5, OIMM5, UI7, BO16): New.
 699         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 700         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 701         (ALLOW8_SPRG): New.
 702         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 703         (OPVUP, OPVUP_MASK OPVUP): New
 704         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 705         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 706         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 707         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 708         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 709         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 710         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 711         (SE_IM5, SE_IM5_MASK): New.
 712         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 713         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 714         (BO32DNZ, BO32DZ): New.
 715         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 716         (PPCVLE): New.
 717         (powerpc_opcodes): Add new VLE instructions.  Update existing
 718         instruction to include PPCVLE if supported.
 719         * ppc-dis.c (ppc_opts): Add vle entry.
 720         (get_powerpc_dialect): New function.
 721         (powerpc_init_dialect): VLE support.
 722         (print_insn_big_powerpc): Call get_powerpc_dialect.
 723         (print_insn_little_powerpc): Likewise.
 724         (operand_value_powerpc): Handle negative shift counts.
 725         (print_insn_powerpc): Handle 2-byte instruction lengths.
 726
 727 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 728
 729         PR binutils/14028
 730         * configure.in: Invoke ACX_HEADER_STRING.
 731         * configure: Regenerate.
 732         * config.in: Regenerate.
 733         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 734         string.h and strings.h.
 735
 736 2012-05-11  Nick Clifton  <nickc@redhat.com>
 737
 738         PR binutils/14006
 739         * arm-dis.c (print_insn): Fix detection of instruction mode in
 740         files containing multiple executable sections.
 741
 742 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 743
 744         * Makefile.in, configure: regenerate
 745         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 746         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 747         New functions.
 748         * configure.in: Recognize xgate.
 749         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 750         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 751         and opcode generation for xgate.
 752
 753 2012-04-30  DJ Delorie  <dj@redhat.com>
 754
 755         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 756         already the maximum bit size.
 757         * rx-decode.c: Regenerate.
 758
 759 2012-04-27  David S. Miller  <davem@davemloft.net>
 760
 761         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 762         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 763
 764         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 765         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 766
 767         * sparc-opc.c (CBCOND): New define.
 768         (CBCOND_XCC): Likewise.
 769         (cbcond): New helper macro.
 770         (sparc_opcodes): Add compare-and-branch instructions.
 771
 772         * sparc-dis.c (print_insn_sparc): Handle ')'.
 773         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 774
 775         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 776         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 777
 778 2012-04-12  David S. Miller  <davem@davemloft.net>
 779
 780         * sparc-dis.c (X_DISP10): Define.
 781         (print_insn_sparc): Handle '='.
 782
 783 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 784
 785         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 786         sprintf call and the '*' field width.
 787
 788 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 789
 790         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 791
 792 2012-03-16  Alan Modra  <amodra@gmail.com>
 793
 794         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 795         (powerpc_opcd_indices): Bump array size.
 796         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 797         corresponding to unused opcodes to following entry.
 798         (lookup_powerpc): New function, extracted and optimised from..
 799         (print_insn_powerpc): ..here.
 800
 801 2012-03-15  Alan Modra  <amodra@gmail.com>
 802             James Lemke  <jwlemke@codesourcery.com>
 803
 804         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 805         * ppc-dis.c (private): New var.
 806         (powerpc_init_dialect): Don't return calloc failure, instead use
 807         private.
 808         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 809         (powerpc_opcd_indices): New array.
 810         (disassemble_init_powerpc): New function.
 811         (print_insn_big_powerpc): Don't init dialect here.
 812         (print_insn_little_powerpc): Likewise.
 813         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 814
 815 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 816
 817         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 818         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 819         (PPCVEC2, PPCTMR, E6500): New short names.
 820         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 821         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 822         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 823         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 824         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 825         optional operands on sync instruction for E6500 target.
 826
 827 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 828
 829         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 830
 831 2012-02-27  Alan Modra  <amodra@gmail.com>
 832
 833         * mt-dis.c: Regenerate.
 834
 835 2012-02-27  Alan Modra  <amodra@gmail.com>
 836
 837         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 838         is the inverse of corresponding insert function.
 839         (extract_d22, extract_u9, extract_r4): Likewise.
 840         (extract_d9): Correct sign extension.
 841         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 842         rely on implementation defined behaviour for shift right of
 843         signed types.
 844         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 845         (extract_d23): Likewise, and correct mask.
 846
 847 2012-02-27  Alan Modra  <amodra@gmail.com>
 848
 849         * crx-dis.c (print_arg): Mask constant to 32 bits.
 850         * crx-opc.c (cst4_map): Use int array.
 851
 852 2012-02-27  Alan Modra  <amodra@gmail.com>
 853
 854         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 855         (FIELDD): Sign extend with xor,sub.
 856
 857 2012-02-25  Walter Lee  <walt@tilera.com>
 858
 859         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 860         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 861         TILEPRO_OPC_LW_TLS_SN.
 862
 863 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 864
 865         * i386-opc.h (HLEPrefixNone): New.
 866         (HLEPrefixLock): Likewise.
 867         (HLEPrefixAny): Likewise.
 868         (HLEPrefixRelease): Likewise.
 869
 870 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 871
 872         * i386-dis.c (HLE_Fixup1): New.
 873         (HLE_Fixup2): Likewise.
 874         (HLE_Fixup3): Likewise.
 875         (Ebh1): Likewise.
 876         (Evh1): Likewise.
 877         (Ebh2): Likewise.
 878         (Evh2): Likewise.
 879         (Ebh3): Likewise.
 880         (Evh3): Likewise.
 881         (MOD_C6_REG_7): Likewise.
 882         (MOD_C7_REG_7): Likewise.
 883         (RM_C6_REG_7): Likewise.
 884         (RM_C7_REG_7): Likewise.
 885         (XACQUIRE_PREFIX): Likewise.
 886         (XRELEASE_PREFIX): Likewise.
 887         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 888         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 889         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 890         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 891         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 892         MOD_C6_REG_7 and MOD_C7_REG_7.
 893         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 894         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 895         xtest.
 896         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 897         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 898
 899         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 900         CPU_RTM_FLAGS.
 901         (cpu_flags): Add CpuHLE and CpuRTM.
 902         (opcode_modifiers): Add HLEPrefixOk.
 903
 904         * i386-opc.h (CpuHLE): New.
 905         (CpuRTM): Likewise.
 906         (HLEPrefixOk): Likewise.
 907         (i386_cpu_flags): Add cpuhle and cpurtm.
 908         (i386_opcode_modifier): Add hleprefixok.
 909
 910         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 911         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 912         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 913         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 914         xtest.
 915         * i386-init.h: Regenerated.
 916         * i386-tbl.h: Likewise.
 917
 918 2012-01-24  DJ Delorie  <dj@redhat.com>
 919
 920         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 921         * rl78-decode.c: Regenerate.
 922
 923 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 924
 925         PR binutils/10173
 926         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 927
 928 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 929
 930         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 931         register and move them after pmove with PSR/PCSR register.
 932
 933 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 934
 935         * i386-dis.c (mod_table): Add vmfunc.
 936
 937         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 938         (cpu_flags): CpuVMFUNC.
 939
 940         * i386-opc.h (CpuVMFUNC): New.
 941         (i386_cpu_flags): Add cpuvmfunc.
 942
 943         * i386-opc.tbl: Add vmfunc.
 944         * i386-init.h: Regenerated.
 945         * i386-tbl.h: Likewise.
 946
 947 For older changes see ChangeLog-2011
 948 \f
 949 Local Variables:
 950 mode: change-log
 951 left-margin: 8
 952 fill-column: 74
 953 version-control: never
 954 End: