opcodes/ChangeLog

   1 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
   4         * i386-tbl.h: Regenerated.
   5
   6 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
   9
  10         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  11         * i386-tbl.h: Regenerated.
  12
  13 2010-07-29  DJ Delorie  <dj@redhat.com>
  14
  15         * rx-decode.opc (SRR): New.
  16         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  17         r0,r0) and NOP3 (max r0,r0) special cases.
  18         * rx-decode.c: Regenerate.
  19
  20 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  21
  22         * i386-dis.c: Add 0F to VEX opcode enums.
  23
  24 2010-07-27  DJ Delorie  <dj@redhat.com>
  25
  26         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  27         (rx_decode_opcode): Likewise.
  28         * rx-decode.c: Regenerate.
  29
  30 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  31             Ina Pandit  <ina.pandit@kpitcummins.com>
  32
  33         * v850-dis.c (v850_sreg_names): Updated structure for system
  34         registers.
  35         (float_cc_names): new structure for condition codes.
  36         (print_value): Update the function that prints value.
  37         (get_operand_value): New function to get the operand value.
  38         (disassemble): Updated to handle the disassembly of instructions.
  39         (print_insn_v850): Updated function to print instruction for different
  40         families.
  41         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
  42         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
  43         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
  44         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
  45         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
  46         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
  47         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
  48         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
  49         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
  50         (v850_operands): Update with the relocation name. Also update
  51         the instructions with specific set of processors.
  52
  53 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
  54
  55         * arm-dis.c (print_insn_arm): Add cases for printing more
  56         symbolic operands.
  57         (print_insn_thumb32): Likewise.
  58
  59 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  60
  61         * mips-dis.c (print_insn_mips): Correct branch instruction type
  62         determination.
  63
  64 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  65
  66         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
  67         type and delay slot determination.
  68         (print_insn_mips16): Extend branch instruction type and delay
  69         slot determination to cover all instructions.
  70         * mips16-opc.c (BR): Remove macro.
  71         (UBR, CBR): New macros.
  72         (mips16_opcodes): Update branch annotation for "b", "beqz",
  73         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
  74         and "jrc".
  75
  76 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  77
  78         AVX Programming Reference (June, 2010)
  79         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
  80         * i386-opc.tbl: Likewise.
  81         * i386-tbl.h: Regenerated.
  82
  83 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  84
  85         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
  86
  87 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
  88
  89         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
  90         ppc_cpu_t before inverting.
  91         (ppc_parse_cpu): Likewise.
  92         (print_insn_powerpc): Likewise.
  93
  94 2010-07-03  Alan Modra  <amodra@gmail.com>
  95
  96         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
  97         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
  98         (PPC64, MFDEC2): Update.
  99         (NON32, NO371): Define.
 100         (powerpc_opcode): Update to not use old opcode flags, and avoid
 101         -m601 duplicates.
 102
 103 2010-07-03  DJ Delorie  <dj@delorie.com>
 104
 105         * m32c-ibld.c: Regenerate.
 106
 107 2010-07-03  Alan Modra  <amodra@gmail.com>
 108
 109         * ppc-opc.c (PWR2COM): Define.
 110         (PPCPWR2): Add PPC_OPCODE_COMMON.
 111         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 112         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 113         "rac" from -mcom.
 114
 115 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 116
 117         AVX Programming Reference (June, 2010)
 118         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 119         (PREFIX_0FAE_REG_1): Likewise.
 120         (PREFIX_0FAE_REG_2): Likewise.
 121         (PREFIX_0FAE_REG_3): Likewise.
 122         (PREFIX_VEX_3813): Likewise.
 123         (PREFIX_VEX_3A1D): Likewise.
 124         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 125         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 126         PREFIX_VEX_3A1D.
 127         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 128         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 129         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 130
 131         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 132         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 133         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 134
 135         * i386-opc.h (CpuXsaveopt): New.
 136         (CpuFSGSBase): Likewise.
 137         (CpuRdRnd): Likewise.
 138         (CpuF16C): Likewise.
 139         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 140         cpuf16c.
 141
 142         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 143         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 144         * i386-init.h: Regenerated.
 145         * i386-tbl.h: Likewise.
 146
 147 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 148
 149         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 150         and mtocrf on EFS.
 151
 152 2010-06-29  Alan Modra  <amodra@gmail.com>
 153
 154         * maxq-dis.c: Delete file.
 155         * Makefile.am: Remove references to maxq.
 156         * configure.in: Likewise.
 157         * disassemble.c: Likewise.
 158         * Makefile.in: Regenerate.
 159         * configure: Regenerate.
 160         * po/POTFILES.in: Regenerate.
 161
 162 2010-06-29  Alan Modra  <amodra@gmail.com>
 163
 164         * mep-dis.c: Regenerate.
 165
 166 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 167
 168         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 169
 170 2010-06-27  Alan Modra  <amodra@gmail.com>
 171
 172         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 173         (decodeInstr): Likewise.
 174         * dlx-dis.c (print_insn_dlx): Likewise.
 175         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 176         * maxq-dis.c (check_move, print_insn): Likewise.
 177         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 178         * msp430-dis.c (msp430_branchinstr): Likewise.
 179         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 180         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 181         * sparc-dis.c (print_insn_sparc): Likewise.
 182         * fr30-asm.c: Regenerate.
 183         * frv-asm.c: Regenerate.
 184         * ip2k-asm.c: Regenerate.
 185         * iq2000-asm.c: Regenerate.
 186         * lm32-asm.c: Regenerate.
 187         * m32c-asm.c: Regenerate.
 188         * m32r-asm.c: Regenerate.
 189         * mep-asm.c: Regenerate.
 190         * mt-asm.c: Regenerate.
 191         * openrisc-asm.c: Regenerate.
 192         * xc16x-asm.c: Regenerate.
 193         * xstormy16-asm.c: Regenerate.
 194
 195 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 196
 197         PR gas/11673
 198         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 199
 200 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 201
 202         PR binutils/11676
 203         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 204
 205 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 206
 207         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 208         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 209         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 210         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 211         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 212         Treat lwsync as msync on e500.
 213
 214 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 215
 216         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 217
 218 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 219
 220         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 221         constants is the same on 32-bit and 64-bit hosts.
 222
 223 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 224
 225         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 226         .short directives so that they can be reassembled.
 227
 228 2010-05-26  Catherine Moore <clm@codesourcery.com>
 229             David Ung  <davidu@mips.com>
 230
 231         * mips-opc.c: Change membership to I1 for instructions ssnop and
 232         ehb.
 233
 234 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 235
 236         * i386-dis.c (sib): New.
 237         (get_sib): Likewise.
 238         (print_insn): Call get_sib.
 239         OP_E_memory): Use sib.
 240
 241 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 242
 243         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 244         * mips-opc.c (I16): Remove.
 245         (mips_builtin_op): Reclassify jalx.
 246
 247 2010-05-19  Alan Modra  <amodra@gmail.com>
 248
 249         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 250         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 251
 252 2010-05-13  Alan Modra  <amodra@gmail.com>
 253
 254         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 255
 256 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 257
 258         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 259         format.
 260         (print_insn_thumb16): Add support for new %W format.
 261
 262 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 263
 264         * Makefile.in: Regenerate with automake 1.11.1.
 265         * aclocal.m4: Ditto.
 266
 267 2010-05-05  Nick Clifton  <nickc@redhat.com>
 268
 269         * po/es.po: Updated Spanish translation.
 270
 271 2010-04-22  Nick Clifton  <nickc@redhat.com>
 272
 273         * po/opcodes.pot: Updated by the Translation project.
 274         * po/vi.po: Updated Vietnamese translation.
 275
 276 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 277
 278         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 279         bits in opcode.
 280
 281 2010-04-09  Nick Clifton  <nickc@redhat.com>
 282
 283         * i386-dis.c (print_insn): Remove unused variable op.
 284         (OP_sI): Remove unused variable mask.
 285
 286 2010-04-07  Alan Modra  <amodra@gmail.com>
 287
 288         * configure: Regenerate.
 289
 290 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 291
 292         * ppc-opc.c (RBOPT): New define.
 293         ("dccci"): Enable for PPCA2.  Make operands optional.
 294         ("iccci"): Likewise.  Do not deprecate for PPC476.
 295
 296 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 297
 298         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 299
 300 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 301
 302         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 303         * Makefile.in: Regenerate.
 304         * configure.in (bfd_tic6x_arch): New.
 305         * configure: Regenerate.
 306         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 307         (disassembler): Handle TI C6X.
 308         * tic6x-dis.c: New.
 309
 310 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 311
 312         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 313
 314 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 315
 316         * dis-buf.c (buffer_read_memory): Give error for reading just
 317         before the start of memory.
 318
 319 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 320             Quentin Neill <quentin.neill@amd.com>
 321
 322         * i386-dis.c (OP_LWP_I): Removed.
 323         (reg_table): Do not use OP_LWP_I, use Iq.
 324         (OP_LWPCB_E): Remove use of names16.
 325         (OP_LWP_E): Same.
 326         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 327         should not set the Vex.length bit.
 328         * i386-tbl.h: Regenerated.
 329
 330 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 331
 332         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 333
 334 2010-02-24  Nick Clifton  <nickc@redhat.com>
 335
 336         PR binutils/6773
 337         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 338         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 339         (thumb32_opcodes): Likewise.
 340
 341 2010-02-15  Nick Clifton  <nickc@redhat.com>
 342
 343         * po/vi.po: Updated Vietnamese translation.
 344
 345 2010-02-12  Doug Evans  <dje@sebabeach.org>
 346
 347         * lm32-opinst.c: Regenerate.
 348
 349 2010-02-11  Doug Evans  <dje@sebabeach.org>
 350
 351         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 352         (print_address): Delete CGEN_PRINT_ADDRESS.
 353         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 354         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 355         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 356         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 357
 358         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 359         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 360         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 361         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 362         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 363         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 364         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 365         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 366         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 367         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 368         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 369         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 370
 371 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 372
 373         * i386-dis.c: Update copyright.
 374         * i386-gen.c: Likewise.
 375         * i386-opc.h: Likewise.
 376         * i386-opc.tbl: Likewise.
 377
 378 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 379             Sebastian Pop  <sebastian.pop@amd.com>
 380
 381         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 382         function to handle 5th imm8 operand.
 383         (PREFIX_VEX_3A48): Added.
 384         (PREFIX_VEX_3A49): Added.
 385         (VEX_W_3A48_P_2): Added.
 386         (VEX_W_3A49_P_2): Added.
 387         (prefix table): Added entries for PREFIX_VEX_3A48
 388         and PREFIX_VEX_3A49.
 389         (vex table): Added entries for VEX_W_3A48_P_2 and
 390         and VEX_W_3A49_P_2.
 391         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 392         for Vec_Imm4 operands.
 393         * i386-opc.h (enum): Added Vec_Imm4.
 394         (i386_operand_type): Added vec_imm4.
 395         * i386-opc.tbl: Add entries for vpermilp[ds].
 396         * i386-init.h: Regenerated.
 397         * i386-tbl.h: Regenerated.
 398
 399 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 400
 401         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 402         and "pwr7".  Move "a2" into alphabetical order.
 403
 404 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 405
 406         * ppc-dis.c (ppc_opts): Add titan entry.
 407         * ppc-opc.c (TITAN, MULHW): Define.
 408         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 409
 410 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 411
 412         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 413         to CPU_BDVER1_FLAGS
 414         * i386-init.h: Regenerated.
 415
 416 2010-02-03  Anthony Green  <green@moxielogic.com>
 417
 418         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 419         0x0f, and make 0x00 an illegal instruction.
 420
 421 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 422
 423         * opcodes/arm-dis.c (struct arm_private_data): New.
 424         (print_insn_coprocessor, print_insn_arm): Update to use struct
 425         arm_private_data.
 426         (is_mapping_symbol, get_map_sym_type): New functions.
 427         (get_sym_code_type): Check the symbol's section.  Do not check
 428         mapping symbols.
 429         (print_insn): Default to disassembling ARM mode code.  Check
 430         for mapping symbols separately from other symbols.  Use
 431         struct arm_private_data.
 432
 433 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 434
 435         * i386-dis.c (EXVexWdqScalar): New.
 436         (vex_scalar_w_dq_mode): Likewise.
 437         (prefix_table): Update entries for PREFIX_VEX_3899,
 438         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 439         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 440         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 441         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 442         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 443         (OP_EX): Likewise.
 444
 445 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 446
 447         * i386-dis.c (XMScalar): New.
 448         (EXdScalar): Likewise.
 449         (EXqScalar): Likewise.
 450         (EXqScalarS): Likewise.
 451         (VexScalar): Likewise.
 452         (EXdVexScalarS): Likewise.
 453         (EXqVexScalarS): Likewise.
 454         (XMVexScalar): Likewise.
 455         (scalar_mode): Likewise.
 456         (d_scalar_mode): Likewise.
 457         (d_scalar_swap_mode): Likewise.
 458         (q_scalar_mode): Likewise.
 459         (q_scalar_swap_mode): Likewise.
 460         (vex_scalar_mode): Likewise.
 461         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 462         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 463         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 464         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 465         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 466         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 467         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 468         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 469         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 470         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 471         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 472         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 473         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 474         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 475         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 476         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 477         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 478         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 479         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 480         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 481         q_scalar_mode, q_scalar_swap_mode.
 482         (OP_XMM): Handle scalar_mode.
 483         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 484         and q_scalar_swap_mode.
 485         (OP_VEX): Handle vex_scalar_mode.
 486
 487 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 488
 489         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 490
 491 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 492
 493         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 494
 495 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 496
 497         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 498
 499 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 500
 501         * i386-dis.c (Bad_Opcode): New.
 502         (bad_opcode): Likewise.
 503         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 504         (dis386_twobyte): Likewise.
 505         (reg_table): Likewise.
 506         (prefix_table): Likewise.
 507         (x86_64_table): Likewise.
 508         (vex_len_table): Likewise.
 509         (vex_w_table): Likewise.
 510         (mod_table): Likewise.
 511         (rm_table): Likewise.
 512         (float_reg): Likewise.
 513         (reg_table): Remove trailing "(bad)" entries.
 514         (prefix_table): Likewise.
 515         (x86_64_table): Likewise.
 516         (vex_len_table): Likewise.
 517         (vex_w_table): Likewise.
 518         (mod_table): Likewise.
 519         (rm_table): Likewise.
 520         (get_valid_dis386): Handle bytemode 0.
 521
 522 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 523
 524         * i386-opc.h (VEXScalar): New.
 525
 526         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 527         instructions.
 528         * i386-tbl.h: Regenerated.
 529
 530 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 531
 532         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 533
 534         * i386-opc.tbl: Add xsave64 and xrstor64.
 535         * i386-tbl.h: Regenerated.
 536
 537 2010-01-20  Nick Clifton  <nickc@redhat.com>
 538
 539         PR 11170
 540         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 541         based post-indexed addressing.
 542
 543 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 544
 545         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 546         * i386-tbl.h: Regenerated.
 547
 548 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 549
 550         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 551         comments.
 552
 553 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 554
 555         * i386-dis.c (names_mm): New.
 556         (intel_names_mm): Likewise.
 557         (att_names_mm): Likewise.
 558         (names_xmm): Likewise.
 559         (intel_names_xmm): Likewise.
 560         (att_names_xmm): Likewise.
 561         (names_ymm): Likewise.
 562         (intel_names_ymm): Likewise.
 563         (att_names_ymm): Likewise.
 564         (print_insn): Set names_mm, names_xmm and names_ymm.
 565         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 566         (OP_XMM): Likewise.
 567         (OP_EM): Likewise.
 568         (OP_EMC): Likewise.
 569         (OP_MXC): Likewise.
 570         (OP_EX): Likewise.
 571         (XMM_Fixup): Likewise.
 572         (OP_VEX): Likewise.
 573         (OP_EX_VexReg): Likewise.
 574         (OP_Vex_2src): Likewise.
 575         (OP_Vex_2src_1): Likewise.
 576         (OP_Vex_2src_2): Likewise.
 577         (OP_REG_VexI4): Likewise.
 578
 579 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 580
 581         * i386-dis.c (print_insn): Update comments.
 582
 583 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 584
 585         * i386-dis.c (rex_original): Removed.
 586         (ckprefix): Remove rex_original.
 587         (print_insn): Update comments.
 588
 589 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 590
 591         * Makefile.in: Regenerate.
 592         * configure: Regenerate.
 593
 594 2010-01-07  Doug Evans  <dje@sebabeach.org>
 595
 596         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 597         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 598         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 599         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 600         * xstormy16-ibld.c: Regenerate.
 601
 602 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 603
 604         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 605         * i386-init.h: Regenerated.
 606
 607 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 608
 609         * arm-dis.c (print_insn): Fixed search for next symbol and data
 610         dumping condition, and the initial mapping symbol state.
 611
 612 2010-01-05  Doug Evans  <dje@sebabeach.org>
 613
 614         * cgen-ibld.in: #include "cgen/basic-modes.h".
 615         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 616         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 617         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 618         * xstormy16-ibld.c: Regenerate.
 619
 620 2010-01-04  Nick Clifton  <nickc@redhat.com>
 621
 622         PR 11123
 623         * arm-dis.c (print_insn_coprocessor): Initialise value.
 624
 625 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 626
 627         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 628
 629 2010-01-02  Doug Evans  <dje@sebabeach.org>
 630
 631         * cgen-asm.in: Update copyright year.
 632         * cgen-dis.in: Update copyright year.
 633         * cgen-ibld.in: Update copyright year.
 634         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 635         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 636         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 637         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 638         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 639         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 640         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 641         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 642         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 643         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 644         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 645         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 646         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 647         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 648         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 649         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 650         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 651         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 652         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 653         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 654         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 655
 656 For older changes see ChangeLog-2009
 657 \f
 658 Local Variables:
 659 mode: change-log
 660 left-margin: 8
 661 fill-column: 74
 662 version-control: never
 663 End: