opcodes/ChangeLog

   1 2010-09-22  Robin Getz  <robin.getz@analog.com>
   2
   3         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
   4         (reg_names): Likewise.
   5         (decode_statbits): Likewise; while reformatting to make manageable.
   6
   7 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
   8
   9         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  10         (decode_pseudoOChar_0): New function.
  11         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  12
  13 2010-09-22  Robin Getz  <robin.getz@analog.com>
  14
  15         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  16         LSHIFT instead of SHIFT.
  17
  18 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * bfin-dis.c (constant_formats): Constify the whole structure.
  21         (fmtconst): Add const to return value.
  22         (reg_names): Mark const.
  23         (decode_multfunc): Mark s0/s1 as const.
  24         (decode_macfunc): Mark a/sop as const.
  25
  26 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  27
  28         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  29
  30 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  31
  32         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  33         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  34
  35 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  36
  37         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  38         dlx_insn_type array.
  39
  40 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  41
  42         PR binutils/11960
  43         * i386-dis.c (sIv): New.
  44         (dis386): Replace Iq with sIv on "pushT".
  45         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  46         (x86_64_table): Replace {T|}/{P|} with P.
  47         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  48         (OP_sI): Update v_mode.  Remove w_mode.
  49
  50 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  51
  52         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  53         on E500 and E500MC.
  54
  55 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  56
  57         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  58         prefetchw.
  59
  60 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  61
  62         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  63         to processor flags for PENTIUMPRO processors and later.
  64         * i386-opc.h (enum): Add CpuNop.
  65         (i386_cpu_flags): Add cpunop bit.
  66         * i386-opc.tbl: Change nop cpu_flags.
  67         * i386-init.h: Regenerated.
  68         * i386-tbl.h: Likewise.
  69
  70 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  71
  72         * i386-opc.h (enum): Fix typos in comments.
  73
  74 2010-08-06  Alan Modra  <amodra@gmail.com>
  75
  76         * disassemble.c: Formatting.
  77         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  78
  79 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  80
  81         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  82         * i386-tbl.h: Regenerated.
  83
  84 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  85
  86         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
  87
  88         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  89         * i386-tbl.h: Regenerated.
  90
  91 2010-07-29  DJ Delorie  <dj@redhat.com>
  92
  93         * rx-decode.opc (SRR): New.
  94         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  95         r0,r0) and NOP3 (max r0,r0) special cases.
  96         * rx-decode.c: Regenerate.
  97
  98 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  99
 100         * i386-dis.c: Add 0F to VEX opcode enums.
 101
 102 2010-07-27  DJ Delorie  <dj@redhat.com>
 103
 104         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 105         (rx_decode_opcode): Likewise.
 106         * rx-decode.c: Regenerate.
 107
 108 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 109             Ina Pandit  <ina.pandit@kpitcummins.com>
 110
 111         * v850-dis.c (v850_sreg_names): Updated structure for system
 112         registers.
 113         (float_cc_names): new structure for condition codes.
 114         (print_value): Update the function that prints value.
 115         (get_operand_value): New function to get the operand value.
 116         (disassemble): Updated to handle the disassembly of instructions.
 117         (print_insn_v850): Updated function to print instruction for different
 118         families.
 119         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 120         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 121         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 122         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 123         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 124         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 125         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 126         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 127         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 128         (v850_operands): Update with the relocation name. Also update
 129         the instructions with specific set of processors.
 130
 131 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 132
 133         * arm-dis.c (print_insn_arm): Add cases for printing more
 134         symbolic operands.
 135         (print_insn_thumb32): Likewise.
 136
 137 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 138
 139         * mips-dis.c (print_insn_mips): Correct branch instruction type
 140         determination.
 141
 142 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 143
 144         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 145         type and delay slot determination.
 146         (print_insn_mips16): Extend branch instruction type and delay
 147         slot determination to cover all instructions.
 148         * mips16-opc.c (BR): Remove macro.
 149         (UBR, CBR): New macros.
 150         (mips16_opcodes): Update branch annotation for "b", "beqz",
 151         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 152         and "jrc".
 153
 154 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 155
 156         AVX Programming Reference (June, 2010)
 157         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 158         * i386-opc.tbl: Likewise.
 159         * i386-tbl.h: Regenerated.
 160
 161 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 162
 163         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 164
 165 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 166
 167         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 168         ppc_cpu_t before inverting.
 169         (ppc_parse_cpu): Likewise.
 170         (print_insn_powerpc): Likewise.
 171
 172 2010-07-03  Alan Modra  <amodra@gmail.com>
 173
 174         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 175         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 176         (PPC64, MFDEC2): Update.
 177         (NON32, NO371): Define.
 178         (powerpc_opcode): Update to not use old opcode flags, and avoid
 179         -m601 duplicates.
 180
 181 2010-07-03  DJ Delorie  <dj@delorie.com>
 182
 183         * m32c-ibld.c: Regenerate.
 184
 185 2010-07-03  Alan Modra  <amodra@gmail.com>
 186
 187         * ppc-opc.c (PWR2COM): Define.
 188         (PPCPWR2): Add PPC_OPCODE_COMMON.
 189         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 190         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 191         "rac" from -mcom.
 192
 193 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 194
 195         AVX Programming Reference (June, 2010)
 196         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 197         (PREFIX_0FAE_REG_1): Likewise.
 198         (PREFIX_0FAE_REG_2): Likewise.
 199         (PREFIX_0FAE_REG_3): Likewise.
 200         (PREFIX_VEX_3813): Likewise.
 201         (PREFIX_VEX_3A1D): Likewise.
 202         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 203         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 204         PREFIX_VEX_3A1D.
 205         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 206         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 207         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 208
 209         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 210         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 211         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 212
 213         * i386-opc.h (CpuXsaveopt): New.
 214         (CpuFSGSBase): Likewise.
 215         (CpuRdRnd): Likewise.
 216         (CpuF16C): Likewise.
 217         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 218         cpuf16c.
 219
 220         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 221         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 222         * i386-init.h: Regenerated.
 223         * i386-tbl.h: Likewise.
 224
 225 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 226
 227         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 228         and mtocrf on EFS.
 229
 230 2010-06-29  Alan Modra  <amodra@gmail.com>
 231
 232         * maxq-dis.c: Delete file.
 233         * Makefile.am: Remove references to maxq.
 234         * configure.in: Likewise.
 235         * disassemble.c: Likewise.
 236         * Makefile.in: Regenerate.
 237         * configure: Regenerate.
 238         * po/POTFILES.in: Regenerate.
 239
 240 2010-06-29  Alan Modra  <amodra@gmail.com>
 241
 242         * mep-dis.c: Regenerate.
 243
 244 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 245
 246         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 247
 248 2010-06-27  Alan Modra  <amodra@gmail.com>
 249
 250         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 251         (decodeInstr): Likewise.
 252         * dlx-dis.c (print_insn_dlx): Likewise.
 253         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 254         * maxq-dis.c (check_move, print_insn): Likewise.
 255         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 256         * msp430-dis.c (msp430_branchinstr): Likewise.
 257         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 258         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 259         * sparc-dis.c (print_insn_sparc): Likewise.
 260         * fr30-asm.c: Regenerate.
 261         * frv-asm.c: Regenerate.
 262         * ip2k-asm.c: Regenerate.
 263         * iq2000-asm.c: Regenerate.
 264         * lm32-asm.c: Regenerate.
 265         * m32c-asm.c: Regenerate.
 266         * m32r-asm.c: Regenerate.
 267         * mep-asm.c: Regenerate.
 268         * mt-asm.c: Regenerate.
 269         * openrisc-asm.c: Regenerate.
 270         * xc16x-asm.c: Regenerate.
 271         * xstormy16-asm.c: Regenerate.
 272
 273 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 274
 275         PR gas/11673
 276         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 277
 278 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 279
 280         PR binutils/11676
 281         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 282
 283 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 284
 285         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 286         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 287         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 288         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 289         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 290         Treat lwsync as msync on e500.
 291
 292 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 293
 294         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 295
 296 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 297
 298         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 299         constants is the same on 32-bit and 64-bit hosts.
 300
 301 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 302
 303         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 304         .short directives so that they can be reassembled.
 305
 306 2010-05-26  Catherine Moore <clm@codesourcery.com>
 307             David Ung  <davidu@mips.com>
 308
 309         * mips-opc.c: Change membership to I1 for instructions ssnop and
 310         ehb.
 311
 312 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 313
 314         * i386-dis.c (sib): New.
 315         (get_sib): Likewise.
 316         (print_insn): Call get_sib.
 317         OP_E_memory): Use sib.
 318
 319 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 320
 321         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 322         * mips-opc.c (I16): Remove.
 323         (mips_builtin_op): Reclassify jalx.
 324
 325 2010-05-19  Alan Modra  <amodra@gmail.com>
 326
 327         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 328         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 329
 330 2010-05-13  Alan Modra  <amodra@gmail.com>
 331
 332         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 333
 334 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 335
 336         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 337         format.
 338         (print_insn_thumb16): Add support for new %W format.
 339
 340 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 341
 342         * Makefile.in: Regenerate with automake 1.11.1.
 343         * aclocal.m4: Ditto.
 344
 345 2010-05-05  Nick Clifton  <nickc@redhat.com>
 346
 347         * po/es.po: Updated Spanish translation.
 348
 349 2010-04-22  Nick Clifton  <nickc@redhat.com>
 350
 351         * po/opcodes.pot: Updated by the Translation project.
 352         * po/vi.po: Updated Vietnamese translation.
 353
 354 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 355
 356         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 357         bits in opcode.
 358
 359 2010-04-09  Nick Clifton  <nickc@redhat.com>
 360
 361         * i386-dis.c (print_insn): Remove unused variable op.
 362         (OP_sI): Remove unused variable mask.
 363
 364 2010-04-07  Alan Modra  <amodra@gmail.com>
 365
 366         * configure: Regenerate.
 367
 368 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 369
 370         * ppc-opc.c (RBOPT): New define.
 371         ("dccci"): Enable for PPCA2.  Make operands optional.
 372         ("iccci"): Likewise.  Do not deprecate for PPC476.
 373
 374 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 375
 376         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 377
 378 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 379
 380         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 381         * Makefile.in: Regenerate.
 382         * configure.in (bfd_tic6x_arch): New.
 383         * configure: Regenerate.
 384         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 385         (disassembler): Handle TI C6X.
 386         * tic6x-dis.c: New.
 387
 388 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 389
 390         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 391
 392 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 393
 394         * dis-buf.c (buffer_read_memory): Give error for reading just
 395         before the start of memory.
 396
 397 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 398             Quentin Neill <quentin.neill@amd.com>
 399
 400         * i386-dis.c (OP_LWP_I): Removed.
 401         (reg_table): Do not use OP_LWP_I, use Iq.
 402         (OP_LWPCB_E): Remove use of names16.
 403         (OP_LWP_E): Same.
 404         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 405         should not set the Vex.length bit.
 406         * i386-tbl.h: Regenerated.
 407
 408 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 409
 410         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 411
 412 2010-02-24  Nick Clifton  <nickc@redhat.com>
 413
 414         PR binutils/6773
 415         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 416         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 417         (thumb32_opcodes): Likewise.
 418
 419 2010-02-15  Nick Clifton  <nickc@redhat.com>
 420
 421         * po/vi.po: Updated Vietnamese translation.
 422
 423 2010-02-12  Doug Evans  <dje@sebabeach.org>
 424
 425         * lm32-opinst.c: Regenerate.
 426
 427 2010-02-11  Doug Evans  <dje@sebabeach.org>
 428
 429         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 430         (print_address): Delete CGEN_PRINT_ADDRESS.
 431         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 432         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 433         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 434         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 435
 436         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 437         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 438         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 439         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 440         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 441         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 442         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 443         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 444         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 445         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 446         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 447         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 448
 449 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 450
 451         * i386-dis.c: Update copyright.
 452         * i386-gen.c: Likewise.
 453         * i386-opc.h: Likewise.
 454         * i386-opc.tbl: Likewise.
 455
 456 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 457             Sebastian Pop  <sebastian.pop@amd.com>
 458
 459         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 460         function to handle 5th imm8 operand.
 461         (PREFIX_VEX_3A48): Added.
 462         (PREFIX_VEX_3A49): Added.
 463         (VEX_W_3A48_P_2): Added.
 464         (VEX_W_3A49_P_2): Added.
 465         (prefix table): Added entries for PREFIX_VEX_3A48
 466         and PREFIX_VEX_3A49.
 467         (vex table): Added entries for VEX_W_3A48_P_2 and
 468         and VEX_W_3A49_P_2.
 469         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 470         for Vec_Imm4 operands.
 471         * i386-opc.h (enum): Added Vec_Imm4.
 472         (i386_operand_type): Added vec_imm4.
 473         * i386-opc.tbl: Add entries for vpermilp[ds].
 474         * i386-init.h: Regenerated.
 475         * i386-tbl.h: Regenerated.
 476
 477 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 478
 479         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 480         and "pwr7".  Move "a2" into alphabetical order.
 481
 482 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 483
 484         * ppc-dis.c (ppc_opts): Add titan entry.
 485         * ppc-opc.c (TITAN, MULHW): Define.
 486         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 487
 488 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 489
 490         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 491         to CPU_BDVER1_FLAGS
 492         * i386-init.h: Regenerated.
 493
 494 2010-02-03  Anthony Green  <green@moxielogic.com>
 495
 496         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 497         0x0f, and make 0x00 an illegal instruction.
 498
 499 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 500
 501         * opcodes/arm-dis.c (struct arm_private_data): New.
 502         (print_insn_coprocessor, print_insn_arm): Update to use struct
 503         arm_private_data.
 504         (is_mapping_symbol, get_map_sym_type): New functions.
 505         (get_sym_code_type): Check the symbol's section.  Do not check
 506         mapping symbols.
 507         (print_insn): Default to disassembling ARM mode code.  Check
 508         for mapping symbols separately from other symbols.  Use
 509         struct arm_private_data.
 510
 511 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 512
 513         * i386-dis.c (EXVexWdqScalar): New.
 514         (vex_scalar_w_dq_mode): Likewise.
 515         (prefix_table): Update entries for PREFIX_VEX_3899,
 516         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 517         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 518         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 519         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 520         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 521         (OP_EX): Likewise.
 522
 523 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 524
 525         * i386-dis.c (XMScalar): New.
 526         (EXdScalar): Likewise.
 527         (EXqScalar): Likewise.
 528         (EXqScalarS): Likewise.
 529         (VexScalar): Likewise.
 530         (EXdVexScalarS): Likewise.
 531         (EXqVexScalarS): Likewise.
 532         (XMVexScalar): Likewise.
 533         (scalar_mode): Likewise.
 534         (d_scalar_mode): Likewise.
 535         (d_scalar_swap_mode): Likewise.
 536         (q_scalar_mode): Likewise.
 537         (q_scalar_swap_mode): Likewise.
 538         (vex_scalar_mode): Likewise.
 539         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 540         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 541         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 542         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 543         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 544         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 545         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 546         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 547         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 548         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 549         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 550         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 551         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 552         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 553         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 554         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 555         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 556         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 557         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 558         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 559         q_scalar_mode, q_scalar_swap_mode.
 560         (OP_XMM): Handle scalar_mode.
 561         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 562         and q_scalar_swap_mode.
 563         (OP_VEX): Handle vex_scalar_mode.
 564
 565 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 566
 567         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 568
 569 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 570
 571         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 572
 573 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 574
 575         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 576
 577 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 578
 579         * i386-dis.c (Bad_Opcode): New.
 580         (bad_opcode): Likewise.
 581         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 582         (dis386_twobyte): Likewise.
 583         (reg_table): Likewise.
 584         (prefix_table): Likewise.
 585         (x86_64_table): Likewise.
 586         (vex_len_table): Likewise.
 587         (vex_w_table): Likewise.
 588         (mod_table): Likewise.
 589         (rm_table): Likewise.
 590         (float_reg): Likewise.
 591         (reg_table): Remove trailing "(bad)" entries.
 592         (prefix_table): Likewise.
 593         (x86_64_table): Likewise.
 594         (vex_len_table): Likewise.
 595         (vex_w_table): Likewise.
 596         (mod_table): Likewise.
 597         (rm_table): Likewise.
 598         (get_valid_dis386): Handle bytemode 0.
 599
 600 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 601
 602         * i386-opc.h (VEXScalar): New.
 603
 604         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 605         instructions.
 606         * i386-tbl.h: Regenerated.
 607
 608 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 609
 610         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 611
 612         * i386-opc.tbl: Add xsave64 and xrstor64.
 613         * i386-tbl.h: Regenerated.
 614
 615 2010-01-20  Nick Clifton  <nickc@redhat.com>
 616
 617         PR 11170
 618         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 619         based post-indexed addressing.
 620
 621 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 622
 623         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 624         * i386-tbl.h: Regenerated.
 625
 626 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 627
 628         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 629         comments.
 630
 631 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 632
 633         * i386-dis.c (names_mm): New.
 634         (intel_names_mm): Likewise.
 635         (att_names_mm): Likewise.
 636         (names_xmm): Likewise.
 637         (intel_names_xmm): Likewise.
 638         (att_names_xmm): Likewise.
 639         (names_ymm): Likewise.
 640         (intel_names_ymm): Likewise.
 641         (att_names_ymm): Likewise.
 642         (print_insn): Set names_mm, names_xmm and names_ymm.
 643         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 644         (OP_XMM): Likewise.
 645         (OP_EM): Likewise.
 646         (OP_EMC): Likewise.
 647         (OP_MXC): Likewise.
 648         (OP_EX): Likewise.
 649         (XMM_Fixup): Likewise.
 650         (OP_VEX): Likewise.
 651         (OP_EX_VexReg): Likewise.
 652         (OP_Vex_2src): Likewise.
 653         (OP_Vex_2src_1): Likewise.
 654         (OP_Vex_2src_2): Likewise.
 655         (OP_REG_VexI4): Likewise.
 656
 657 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 658
 659         * i386-dis.c (print_insn): Update comments.
 660
 661 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 662
 663         * i386-dis.c (rex_original): Removed.
 664         (ckprefix): Remove rex_original.
 665         (print_insn): Update comments.
 666
 667 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 668
 669         * Makefile.in: Regenerate.
 670         * configure: Regenerate.
 671
 672 2010-01-07  Doug Evans  <dje@sebabeach.org>
 673
 674         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 675         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 676         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 677         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 678         * xstormy16-ibld.c: Regenerate.
 679
 680 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 681
 682         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 683         * i386-init.h: Regenerated.
 684
 685 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 686
 687         * arm-dis.c (print_insn): Fixed search for next symbol and data
 688         dumping condition, and the initial mapping symbol state.
 689
 690 2010-01-05  Doug Evans  <dje@sebabeach.org>
 691
 692         * cgen-ibld.in: #include "cgen/basic-modes.h".
 693         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 694         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 695         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 696         * xstormy16-ibld.c: Regenerate.
 697
 698 2010-01-04  Nick Clifton  <nickc@redhat.com>
 699
 700         PR 11123
 701         * arm-dis.c (print_insn_coprocessor): Initialise value.
 702
 703 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 704
 705         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 706
 707 2010-01-02  Doug Evans  <dje@sebabeach.org>
 708
 709         * cgen-asm.in: Update copyright year.
 710         * cgen-dis.in: Update copyright year.
 711         * cgen-ibld.in: Update copyright year.
 712         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 713         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 714         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 715         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 716         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 717         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 718         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 719         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 720         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 721         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 722         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 723         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 724         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 725         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 726         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 727         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 728         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 729         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 730         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 731         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 732         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 733
 734 For older changes see ChangeLog-2009
 735 \f
 736 Local Variables:
 737 mode: change-log
 738 left-margin: 8
 739 fill-column: 74
 740 version-control: never
 741 End: