opcodes/ChangeLog

   1 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
   2
   3         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
   4         (getregliststring): Support HI/LO and user registers.
   5         * crx-opc.c (crx_instruction): Update data structure according to the
   6         rearrangement done in CRX opcode header file.
   7         (crx_regtab):  Likewise.
   8         (crx_optab):  Likewise.
   9         (crx_instruction): Reorder load/stor instructions, remove unsupported
  10         formats.
  11         support new Co-Processor instruction 'cpi'.
  12
  13 2004-10-27  Nick Clifton  <nickc@redhat.com>
  14
  15         * opcodes/iq2000-asm.c: Regenerate.
  16         * opcodes/iq2000-desc.c: Regenerate.
  17         * opcodes/iq2000-desc.h: Regenerate.
  18         * opcodes/iq2000-dis.c: Regenerate.
  19         * opcodes/iq2000-ibld.c: Regenerate.
  20         * opcodes/iq2000-opc.c: Regenerate.
  21         * opcodes/iq2000-opc.h: Regenerate.
  22
  23 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
  24
  25         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
  26         us4, us5 (respectively).
  27         Remove unsupported 'popa' instruction.
  28         Reverse operands order in store co-processor instructions.
  29
  30 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
  31
  32         * Makefile.am: Run "make dep-am"
  33         * Makefile.in: Regenerate.
  34
  35 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
  36
  37         * xtensa-dis.c: Use ISO C90 formatting.
  38
  39 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
  40
  41         * ppc-opc.c: Revert 2004-09-09 change.
  42
  43 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
  44
  45         * xtensa-dis.c (state_names): Delete.
  46         (fetch_data): Use xtensa_isa_maxlength.
  47         (print_xtensa_operand): Replace operand parameter with opcode/operand
  48         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
  49         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
  50         instruction bundles.  Use xmalloc instead of malloc.
  51
  52 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
  53
  54         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
  55         initializers.
  56
  57 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
  58
  59         * crx-opc.c (crx_instruction): Support Co-processor insns.
  60         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
  61         (getregliststring): Change function to use the above enum.
  62         (print_arg): Handle CO-Processor insns.
  63         (crx_cinvs): Add 'b' option to invalidate the branch-target
  64         cache.
  65
  66 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
  67
  68         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
  69         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
  70         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
  71         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
  72         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
  73
  74 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
  75
  76         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
  77         rather than add it.
  78
  79 2004-09-30  Paul Brook  <paul@codesourcery.com>
  80
  81         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
  82         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
  83
  84 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
  85
  86         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
  87         (CONFIG_STATUS_DEPENDENCIES): New.
  88         (Makefile): Removed.
  89         (config.status): Likewise.
  90         * Makefile.in: Regenerated.
  91
  92 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
  93
  94         * Makefile.am: Run "make dep-am".
  95         * Makefile.in: Regenerate.
  96         * aclocal.m4: Regenerate.
  97         * configure: Regenerate.
  98         * po/POTFILES.in: Regenerate.
  99         * po/opcodes.pot: Regenerate.
 100
 101 2004-09-11  Andreas Schwab  <schwab@suse.de>
 102
 103         * configure: Rebuild.
 104
 105 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 106
 107         * ppc-opc.c (L): Make this field not optional.
 108
 109 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 110
 111         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 112         Fix parameter to 'm[t|f]csr' insns.
 113
 114 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 115
 116         * configure.in: Autoupdate to autoconf 2.59.
 117         * aclocal.m4: Rebuild with aclocal 1.4p6.
 118         * configure: Rebuild with autoconf 2.59.
 119         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 120         bfd changes for autoconf 2.59 on the way).
 121         * config.in: Rebuild with autoheader 2.59.
 122
 123 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 124
 125         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 126
 127 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 128
 129         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 130         (GRPPADLCK2): New define.
 131         (twobyte_has_modrm): True for 0xA6.
 132         (grps): GRPPADLCK2 for opcode 0xA6.
 133
 134 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 135
 136         Introduce SH2a support.
 137         * sh-opc.h (arch_sh2a_base): Renumber.
 138         (arch_sh2a_nofpu_base): Remove.
 139         (arch_sh_base_mask): Adjust.
 140         (arch_opann_mask): New.
 141         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 142         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 143         (sh_table): Adjust whitespace.
 144         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 145         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 146         instruction list throughout.
 147         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 148         of arch_sh2a in instruction list throughout.
 149         (arch_sh2e_up): Accomodate above changes.
 150         (arch_sh2_up): Ditto.
 151         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 152         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 153         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 154         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 155         * sh-opc.h (arch_sh2a_nofpu): New.
 156         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 157         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 158         instruction.
 159         2004-01-20  DJ Delorie  <dj@redhat.com>
 160         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 161         2003-12-29  DJ Delorie  <dj@redhat.com>
 162         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 163         sh_opcode_info, sh_table): Add sh2a support.
 164         (arch_op32): New, to tag 32-bit opcodes.
 165         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 166         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 167         * sh-opc.h (arch_sh2a): Add.
 168         * sh-dis.c (arch_sh2a): Handle.
 169         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 170
 171 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 172
 173         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 174
 175 2004-07-22  Nick Clifton  <nickc@redhat.com>
 176
 177         PR/280
 178         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 179         insns - this is done by objdump itself.
 180         * h8500-dis.c (print_insn_h8500): Likewise.
 181
 182 2004-07-21  Jan Beulich <jbeulich@novell.com>
 183
 184         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 185         regardless of address size prefix in effect.
 186         (ptr_reg): Size or address registers does not depend on rex64, but
 187         on the presence of an address size override.
 188         (OP_MMX): Use rex.x only for xmm registers.
 189         (OP_EM): Use rex.z only for xmm registers.
 190
 191 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 192
 193         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 194         move/branch operations to the bottom so that VR5400 multimedia
 195         instructions take precedence in disassembly.
 196
 197 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 198
 199         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 200         ISA-specific "break" encoding.
 201
 202 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 203
 204         * arm-opc.h: Fix typo in comment.
 205
 206 2004-07-11  Andreas Schwab  <schwab@suse.de>
 207
 208         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 209
 210 2004-07-09  Andreas Schwab  <schwab@suse.de>
 211
 212         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 213
 214 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 215
 216         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 217         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 218         (crx-dis.lo): New target.
 219         (crx-opc.lo): Likewise.
 220         * Makefile.in: Regenerate.
 221         * configure.in: Handle bfd_crx_arch.
 222         * configure: Regenerate.
 223         * crx-dis.c: New file.
 224         * crx-opc.c: New file.
 225         * disassemble.c (ARCH_crx): Define.
 226         (disassembler): Handle ARCH_crx.
 227
 228 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 229
 230         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 231         * ia64-asmtab.c: Regnerate.
 232
 233 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 234
 235         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 236         (extract_fxm): Don't test dialect.
 237         (XFXFXM_MASK): Include the power4 bit.
 238         (XFXM): Add p4 param.
 239         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 240
 241 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 242
 243         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 244         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 245
 246 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 247
 248         * ppc-opc.c (BH, XLBH_MASK): Define.
 249         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 250
 251 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 252
 253         * i386-dis.c (x_mode): Comment.
 254         (two_source_ops): File scope.
 255         (float_mem): Correct fisttpll and fistpll.
 256         (float_mem_mode): New table.
 257         (dofloat): Use it.
 258         (OP_E): Correct intel mode PTR output.
 259         (ptr_reg): Use open_char and close_char.
 260         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 261         operands.  Set two_source_ops.
 262
 263 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 264
 265         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 266         instead of _raw_size.
 267
 268 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 269
 270         * ia64-gen.c (in_iclass): Handle more postinc st
 271         and ld variants.
 272         * ia64-asmtab.c: Rebuilt.
 273
 274 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 275
 276         * s390-opc.txt: Correct architecture mask for some opcodes.
 277         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 278         in the esa mode as well.
 279
 280 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 281
 282         * sh-dis.c (target_arch): Make unsigned.
 283         (print_insn_sh): Replace (most of) switch with a call to
 284         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 285         * sh-opc.h: Redefine architecture flags values.
 286         Add sh3-nommu architecture.
 287         Reorganise <arch>_up macros so they make more visual sense.
 288         (SH_MERGE_ARCH_SET): Define new macro.
 289         (SH_VALID_BASE_ARCH_SET): Likewise.
 290         (SH_VALID_MMU_ARCH_SET): Likewise.
 291         (SH_VALID_CO_ARCH_SET): Likewise.
 292         (SH_VALID_ARCH_SET): Likewise.
 293         (SH_MERGE_ARCH_SET_VALID): Likewise.
 294         (SH_ARCH_SET_HAS_FPU): Likewise.
 295         (SH_ARCH_SET_HAS_DSP): Likewise.
 296         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 297         (sh_get_arch_from_bfd_mach): Add prototype.
 298         (sh_get_arch_up_from_bfd_mach): Likewise.
 299         (sh_get_bfd_mach_from_arch_set): Likewise.
 300         (sh_merge_bfd_arc): Likewise.
 301
 302 2004-05-24  Peter Barada  <peter@the-baradas.com>
 303
 304         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 305         into new match_insn_m68k function.  Loop over canidate
 306         matches and select first that completely matches.
 307         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 308         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 309         to verify addressing for MAC/EMAC.
 310         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 311         reigster halves since 'fpu' and 'spl' look misleading.
 312         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 313         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 314         first, tighten up match masks.
 315         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 316         'size' from special case code in print_insn_m68k to
 317         determine decode size of insns.
 318
 319 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 320
 321         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 322         well as when -mpower4.
 323
 324 2004-05-13  Nick Clifton  <nickc@redhat.com>
 325
 326         * po/fr.po: Updated French translation.
 327
 328 2004-05-05  Peter Barada  <peter@the-baradas.com>
 329
 330         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 331         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 332         * m68k-op.c: Switch from ColdFire chips to core variants.
 333
 334 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 335
 336         PR 147.
 337         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 338
 339 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 340
 341         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 342         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 343
 344 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 345
 346         * sh-dis.c (print_insn_sh): Print the value in constant pool
 347         as a symbol if it looks like a symbol.
 348
 349 2004-04-22  Peter Barada <peter@the-baradas.com>
 350
 351         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 352         appropriate ColdFire architectures.
 353         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 354         mask addressing.
 355         Add EMAC instructions, fix MAC instructions. Remove
 356         macmw/macml/msacmw/msacml instructions since mask addressing now
 357         supported.
 358
 359 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 360
 361         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 362         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 363         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 364         macro.  Adjust all users.
 365
 366 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 367
 368         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 369         separately.
 370
 371 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 372
 373         * m32r-asm.c: Regenerate.
 374
 375 2004-03-29  Stan Shebs  <shebs@apple.com>
 376
 377         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 378         used.
 379
 380 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 381
 382         * aclocal.m4: Regenerate.
 383         * config.in: Regenerate.
 384         * configure: Regenerate.
 385         * po/POTFILES.in: Regenerate.
 386         * po/opcodes.pot: Regenerate.
 387
 388 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 389
 390         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 391         PPC_OPERANDS_GPR_0.
 392         * ppc-opc.c (RA0): Define.
 393         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 394         (RAOPT): Rename from RAO.  Update all uses.
 395         (powerpc_opcodes): Use RA0 as appropriate.
 396
 397 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 398
 399         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 400
 401 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 402
 403         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 404
 405 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 406
 407         * i386-dis.c (GRPPLOCK): Delete.
 408         (grps): Delete GRPPLOCK entry.
 409
 410 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 411
 412         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 413         (M, Mp): Use OP_M.
 414         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 415         (GRPPADLCK): Define.
 416         (dis386): Use NOP_Fixup on "nop".
 417         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 418         (twobyte_has_modrm): Set for 0xa7.
 419         (padlock_table): Delete.  Move to..
 420         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 421         and clflush.
 422         (print_insn): Revert PADLOCK_SPECIAL code.
 423         (OP_E): Delete sfence, lfence, mfence checks.
 424
 425 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 426
 427         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 428         (INVLPG_Fixup): New function.
 429         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 430
 431 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 432
 433         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 434         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 435         (padlock_table): New struct with PadLock instructions.
 436         (print_insn): Handle PADLOCK_SPECIAL.
 437
 438 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 439
 440         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 441         (OP_E): Twiddle clflush to sfence here.
 442
 443 2004-03-08  Nick Clifton  <nickc@redhat.com>
 444
 445         * po/de.po: Updated German translation.
 446
 447 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 448
 449         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 450         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 451         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 452         accordingly.
 453
 454 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 455
 456         * frv-asm.c: Regenerate.
 457         * frv-desc.c: Regenerate.
 458         * frv-desc.h: Regenerate.
 459         * frv-dis.c: Regenerate.
 460         * frv-ibld.c: Regenerate.
 461         * frv-opc.c: Regenerate.
 462         * frv-opc.h: Regenerate.
 463
 464 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 465
 466         * frv-desc.c, frv-opc.c: Regenerate.
 467
 468 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 469
 470         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 471
 472 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 473
 474         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 475         Also correct mistake in the comment.
 476
 477 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 478
 479         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 480         ensure that double registers have even numbers.
 481         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 482         that reserved instruction 0xfffd does not decode the same
 483         as 0xfdfd (ftrv).
 484         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 485         REG_N refers to a double register.
 486         Add REG_N_B01 nibble type and use it instead of REG_NM
 487         in ftrv.
 488         Adjust the bit patterns in a few comments.
 489
 490 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 491
 492         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 493
 494 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 495
 496         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 497
 498 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 499
 500         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 501
 502 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 503
 504         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 505         mtivor32, mtivor33, mtivor34.
 506
 507 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 508
 509         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 510
 511 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 512
 513         * arm-opc.h Maverick accumulator register opcode fixes.
 514
 515 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 516
 517         * m32r-dis.c: Regenerate.
 518
 519 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 520
 521         * sh-opc.h (sh_table): "fsrra", not "fssra".
 522
 523 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 524
 525         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 526         contraints.
 527
 528 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 529
 530         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 531
 532 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 533
 534         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 535         1.  Don't print scale factor on AT&T mode when index missing.
 536
 537 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 538
 539         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 540         when loaded into XR registers.
 541
 542 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 543
 544         * frv-desc.h: Regenerate.
 545         * frv-desc.c: Regenerate.
 546         * frv-opc.c: Regenerate.
 547
 548 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 549
 550         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 551
 552 2004-01-09  Paul Brook  <paul@codesourcery.com>
 553
 554         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 555         specific opcodes.
 556
 557 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 558
 559         * Makefile.am (libopcodes_la_DEPENDENCIES)
 560         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 561         comment about the problem.
 562         * Makefile.in: Regenerate.
 563
 564 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 565
 566         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 567         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 568         cut&paste errors in shifting/truncating numerical operands.
 569         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 570         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 571         (parse_uslo16): Likewise.
 572         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 573         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 574         (parse_s12): Likewise.
 575         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 576         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 577         (parse_uslo16): Likewise.
 578         (parse_uhi16): Parse gothi and gotfuncdeschi.
 579         (parse_d12): Parse got12 and gotfuncdesc12.
 580         (parse_s12): Likewise.
 581
 582 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 583
 584         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 585         instruction which looks similar to an 'rla' instruction.
 586
 587 For older changes see ChangeLog-0203
 588 \f
 589 Local Variables:
 590 mode: change-log
 591 left-margin: 8
 592 fill-column: 74
 593 version-control: never
 594 End: