1d6aaa6844384d9a79b3eaccff1a7a87ba887da2
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 Wed Jan 10 15:13:21 MET 2001 Jan Hubicka <jh@suse.cz>
2
3 * i386-dis.c (PREGRP15 - PREGRP24): New.
4 (dis386_twobyt): Add SSE2 instructions.
5 (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
6 (twobyte_uses_f3_prefix): ... this one.
7 (grps): Add SSE instructions.
8 (prefix_user_table): Add two new slots; add SSE2 instructions.
9 (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
10 Handle the REPNZ and Data16 prefixes as well; do proper lookup
11 to prefix_user_table.
12 (OP_E): Accept mfence and lfence as well.
13 (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
14 (OP_XMM): Support REX extensions.
15 (OP_EM): Likewise.
16 (OP_EX): Likewise.
17
18 2001-01-09 Nick Clifton <nickc@redhat.com>
19
20 * arm-dis.c (print_insn): Set pc to zero for instructions with
21 a reloc associated with them.
22
23 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
24
25 * cgen-asm.in (parse_insn_normal): Changed syn to be
26 CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn
27 as character to use CGEN_SYNTAX_CHAR macro and all comparisons
28 to '\0' to use 0 instead.
29 * cgen-dis.in (print_insn_normal): Ditto.
30 * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
31
32 Fri Jan 5 11:31:07 MET 2001 Jan Hubicka <jh@suse.cz>
33
34 * i386-dis.c: Add x86_64 support.
35 (rex): New static variable.
36 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
37 (USED_REX): New macro.
38 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
39 (OP_I64, OP_OFF64, OP_IMREG): New functions.
40 (OP_REG, OP_OFF): Declare.
41 (get64, get32, get32s): New functions.
42 (r??_reg): New constants.
43 (dis386_att): Change templates of instruction implicitly promoted
44 to 64bit; change e?? to RMe?? for unwind RM byte instructions.
45 (grps): Likewise.
46 (dis386_intel): Likewise.
47 (dixx86_64_att): New table based on dis386_att.
48 (dixx86_64_intel): New table based on dis386_intel.
49 (names64, names8rex): New global variable.
50 (names32, names16): Add extended registers.
51 (prefix_user_t): Recognize rex prefixes.
52 (prefix_name): Print REX prefixes nicely.
53 (op_riprel): New global variable.
54 (start_pc): Set type to bfd_vma.
55 (print_insn_i386): Detect the 64bit mode and use proper table;
56 move ckprefix after initializing the buffer; output unused rex prefixes;
57 output information about target of RIP relative addresses.
58 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
59 (print_operand_value): New function.
60 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
61 REX prefix and new modes.
62 (get64, get32s): New.
63 (get32): Return bfd_signed_vma type.
64 (set_op): Initialize the op_riprel.
65 * disassemble.c (disassembler): Recognize the x86-64 disassembly.
66
67 2001-01-03 Richard Sandiford <r.sandiford@redhat.com>
68
69 cgen-dis.in (read_insn): Use bfd_get_bits()
70
71 2001-01-02 Richard Sandiford <rsandifo@redhat.com>
72
73 * cgen-dis.c (hash_insn_array): Use bfd_put_bits().
74 (hash_insn_list): Likewise
75 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
76 (extract_1): Use bfd_get_bits().
77 (extract_normal): Apply sign extension to both extraction
78 methods.
79 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
80 (cgen_put_insn_value): Use bfd_put_bits()
81
82 2000-12-28 Frank Ch. Eigler <fche@redhat.com>
83
84 * cgen-asm.in (parse_insn_normal): Print better error message for
85 instructions with missing operands.
86
87 2000-12-21 Santeri Paavolainen <santtu@ssh.com>
88
89 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
90
91 2000-12-16 Nick Clifton <nickc@redhat.com>
92
93 * Makefile.in: Regenerate.
94 * aclocal.m4: Regenerate.
95 * config.in: Regenerate.
96 * configure.in: Add spacing.
97 * configure: Regenerate.
98 * ia64-asmtab.c: Regenerate.
99 * po/opcodes.pot: Regenerate.
100
101 2000-12-12 Frank Ch. Eigler <fche@redhat.com>
102
103 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
104 error messages over later parse-time ones.
105
106 2000-12-12 Jim Wilson <wilson@redhat.com>
107
108 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
109 argument.
110 * ia64_gen.c (insert_deplist): Cast sizeof result to int.
111 (print_dependency_table): Print NULL if semantics field not set.
112 (insert_opcode_dependencies): Mark cmp parameter as unused.
113 (print_main_table): Use fprintf_vma to print long long fields.
114 (main): Mark argv paramter as unused. Convert to old style definition.
115 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
116 * ia64-asmtab.c: Regnerate.
117
118 2000-12-09 Nick Clifton <nickc@redhat.com>
119
120 * m32r-dis.c (print_insn): Prevent re-read of instruction from
121 wrong address.
122
123 * fr30-dis.c: Regenerate.
124
125 2000-12-08 Peter Targett <peter.targett@arccores.com>
126
127 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
128 * Makefile.am (C_FILES): Add arc-ext.c.
129 (ALL_MACHINES) Add arc-ext.lo.
130 (INCLUDES) Add opcode directory to list.
131 New dependency entry for arc-ext.lo.
132 * disassemble.c (disassembler): Correct call to
133 arc_get_disassembler.
134 * arc-opc.c: New update for ARC, including full base
135 instructions for ARC variants.
136 * arc-dis.h, arc-dis.c: New update for ARC, including
137 extensibility functionality.
138 * arc-ext.h, arc-ext.c: New files for handling extensibility.
139
140 2000-12-03 Chris Demetriou cgd@sibyte.com
141
142 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
143 MOD_HILO, and MOD_LO macros.
144
145 * mips-opc.c (M1, M2): Delete.
146 (mips_builtin_opcodes): Remove all uses of M1.
147
148 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
149 instructions take "G" format second operands and use the
150 correct flags.
151 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
152 match.
153 Delete "sel" code operands from mfc1 and mtc1.
154 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
155 for dm[ft]c[023].
156
157 2000-12-03 Ed Satterthwaite ehs@sibyte.com and
158 Chris Demetriou cgd@sibyte.com
159
160 * mips-opc.c (mips_builtin_opcodes): Finish additions
161 for MIPS32 support, and clean up existing entries for
162 aesthetics, consistency with the MIPS32 ISA, and
163 with consistency the rest of the table.
164
165 2000-12-01 Nick Clifton <nickc@redhat.com>
166
167 * mips16-opc.c (mips16_opcodes): Add initialiser for membership
168 field.
169
170 2000-12-01 Chris Demetriou <cgd@sibyte.com>
171
172 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
173 specifiers. Update 'B' for new constant names, and remove
174 'm'.
175 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
176 near the top of the array, so they are disassembled properly.
177 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
178 code for MIPS32. Update "clo" and "clz" to use 'U' operand
179 specifier. Add 'H' format specifier variants for "mfc1,"
180 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
181 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
182 "wait" variant which uses 'J' operand specifier.
183
184 * mips-dis.c (set_mips_isa_type): Update to use
185 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
186 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
187 * mips-opc.c (I32): New constant for instructions added in
188 MIPS32.
189 (P4): Delete.
190 (mips_builtin_opcodes) Replace all uses of P4 with I32.
191
192 * mips-dis.c (set_mips_isa_type): Add cases for
193 bfd_mach_mips5 and bfd_mach_mips64.
194 * mips-opc.c (I64): New definitions.
195
196 * mips-dis.c (set_mips_isa_type): Add case for
197 bfd_mach_mips_sb1.
198
199 2000-11-28 Hans-Peter Nilsson <hp@bitrange.com>
200
201 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
202 (print_insn_ppi): Make nib1, nib2, nib3 unsigned.
203 Initialize variable dc to NULL.
204 (print_insn_shx): Remove unused label d_reg_n.
205
206 2000-11-24 Nick Clifton <nickc@redhat.com>
207
208 * arm-opc.h: Add new opcode formatting parameter 'B'.
209 (arm_opcodes): Add XScale, v5, and v5te instructions.
210 (thumb_opcodes): Add v5t instructions.
211
212 * arm-dis.c (print_insn_arm): Handle new 'B' format
213 parameter.
214 (print_insn_thumb): Decode BLX(1) instruction.
215
216 2000-11-21 Chris Demetriou <cgd@sibyte.com>
217
218 * mips-opc.c: Fix file header comment.
219
220 2000-11-14 Hans-Peter Nilsson <hp@axis.com>
221
222 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
223 print_insn_cris_with_register_prefix.
224
225 2000-11-11 Alexandre Oliva <aoliva@redhat.com>
226
227 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
228
229 2000-11-07 Matthew Green <mrg@redhat.com>
230
231 * cgen-dis.in (print_insn): All insns which can fit into insn_value
232 must be loaded there in their entirety.
233
234 2000-10-20 Jakub Jelinek <jakub@redhat.com>
235
236 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
237 (compute_arch_mask): Add v8plusb and v9b machines.
238 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
239 * opcodes/sparc-opc.c: Support for Cheetah instruction set.
240 (prefetch_table): Add #invalidate.
241
242 2000-10-16 Nick Clifton <nickc@redhat.com>
243
244 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
245
246 2000-10-06 Dave Brolley <brolley@redhat.com>
247
248 * fr30-desc.h: Regenerate.
249 * m32r-desc.h: Regenerate.
250 * m32r-ibld.c: Regenerate.
251
252 2000-10-05 Jim Wilson <wilson@cygnus.com>
253
254 * ia64-ic.tbl: Update from Intel.
255 * ia64-asmtab.c: Regenerate.
256
257 2000-10-04 Kazu Hirata <kazu@hxi.com>
258
259 * ia64-gen.c: Convert C++-style comments to C-style comments.
260 * tic54x-dis.c: Likewise.
261
262 2000-09-29 Hans-Peter Nilsson <hp@axis.com>
263
264 Changes to add dollar prefix to registers for files where user symbols
265 don't have a leading underscore. Fix formatting.
266 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
267 (format_reg): Add parameter with_reg_prefix. All callers changed.
268 (print_with_operands): Ditto.
269 (print_insn_cris_generic): Renamed from print_insn_cris, add
270 parameter with_reg_prefix.
271 (print_insn_cris_with_register_prefix,
272 print_insn_cris_without_register_prefix, cris_get_disassembler):
273 New.
274 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
275
276 2000-09-22 Jim Wilson <wilson@cygnus.com>
277
278 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
279 gt, ge, ngt, and nge.
280 * ia64-asmtab.c: Regenerate.
281
282 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
283 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
284 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
285 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
286 * ia64-asmtab.c: Regnerate.
287
288 2000-09-13 Anders Norlander <anorland@acc.umu.se>
289
290 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
291 Add mfc0 and mtc0 with sub-selection values.
292 Add clo and clz opcodes.
293 Add msub and msubu instructions for MIPS32.
294 Add madd/maddu aliases for mad/madu for MIPS32.
295 Support wait, deret, eret, movn, pref for MIPS32.
296 Support tlbp, tlbr, tlbwi, tlbwr.
297 (P4): New define.
298
299 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
300 (print_insn_arg): Handle 'H' args.
301 (set_mips_isa_type): Recognize 4K.
302 Use CPU_* defines instead of hardcoded numbers.
303
304 2000-09-11 Catherine Moore <clm@redhat.com>
305
306 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
307 (d30v_format_tab): Use Rb2 for modinc and moddec.
308
309 2000-09-07 Catherine Moore <clm@redhat.com>
310
311 * d30v-opc.c (d30v_format_tab): Use format Ra for
312 modinc and moddec.
313
314 2000-09-06 Alexandre Oliva <aoliva@redhat.com>
315
316 * configure: Rebuilt with new libtool.m4.
317
318 2000-09-05 Nick Clifton <nickc@redhat.com>
319
320 * configure: Regenerate.
321 * po/opcodes.pot: Regenerate.
322
323 2000-08-31 Alexandre Oliva <aoliva@redhat.com>
324
325 * acinclude.m4: Include libtool and gettext macros from the
326 top level.
327 * aclocal.m4, configure: Rebuilt.
328
329 2000-08-30 Kazu Hirata <kazu@hxi.com>
330
331 * tic80-dis.c: Fix formatting.
332
333 2000-08-29 Kazu Hirata <kazu@hxi.com>
334
335 * w65-dis.c: Fix formatting.
336
337 2000-08-28 Mark Hatle <mhatle@mvista.com>
338
339 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
340 (powerpc_opcodes): Add table entries for PPC 405 instructions.
341 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
342 instructions. Added extended mnemonic mftbl as defined in the
343 405GP manual for all PPCs.
344
345 2000-08-28 Jim Wilson <wilson@cygnus.com>
346
347 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
348 call. Change last goto to use failed instead of done.
349
350 2000-08-28 Dave Brolley <brolley@redhat.com>
351
352 * cgen-ibld.in (cgen_put_insn_int_value): New function.
353 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
354 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
355 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
356 * cgen-dis.in (read_insn): New static function.
357 (print_insn): Use read_insn to read the insn into the buffer and set
358 up for disassembly.
359 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
360 in the buffer.
361 * fr30-asm.c: Regenerated.
362 * fr30-desc.c: Regenerated.
363 * fr30-desc.h Regenerated.
364 * fr30-dis.c: Regenerated.
365 * fr30-ibld.c: Regenerated.
366 * fr30-opc.c: Regenerated.
367 * fr30-opc.h Regenerated.
368 * m32r-asm.c: Regenerated.
369 * m32r-desc.c: Regenerated.
370 * m32r-desc.h Regenerated.
371 * m32r-dis.c: Regenerated.
372 * m32r-ibld.c: Regenerated.
373 * m32r-opc.c: Regenerated.
374
375 2000-08-28 Kazu Hirata <kazu@hxi.com>
376
377 * tic30-dis.c: Fix formatting.
378
379 2000-08-27 Kazu Hirata <kazu@hxi.com>
380
381 * sh-dis.c: Fix formatting.
382
383 2000-08-24 David Edelsohn <dje@watson.ibm.com>
384
385 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
386
387 2000-08-24 Kazu Hirata <kazu@hxi.com>
388
389 * z8k-dis.c: Fix formatting.
390
391 2000-08-16 Jim Wilson <wilson@cygnus.com>
392
393 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
394 break, mov-immediate, nop.
395 * ia64-opc-f.c: Delete fpsub instructions.
396 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
397 address operand. Rewrite using macros to avoid long lines.
398 * ia64-opc.h (POSTINC): Define.
399 * ia64-asmtab.c: Regenerate.
400
401 2000-08-15 Jim Wilson <wilson@cygnus.com>
402
403 * ia64-ic.tbl: Add missing entries.
404
405 2000-08-08 Jason Eckhardt <jle@cygnus.com>
406
407 * i860-dis.c (print_br_address): Change third argument from int
408 to long.
409
410 2000-08-07 Richard Henderson <rth@cygnus.com>
411
412 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
413 for MLI templates. Handle IA64_OPND_TGT64.
414
415 2000-08-04 Ben Elliston <bje@redhat.com>
416
417 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
418 * cgen.sh: Likewise.
419
420 2000-08-02 Jim Wilson <wilson@cygnus.com>
421
422 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
423
424 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
425
426 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
427 Change return type from void to int. Check the combination
428 of operands, return 1 if valid. Fix to avoid BUF overflow.
429 Report undefined combinations of operands in COMMENT.
430 Report internal errors to stderr. Output the adiw/sbiw
431 constant operand in both decimal and hex.
432 (print_insn_avr): Disassemble ldd/std with displacement of 0
433 as ld/st. Check avr_operand () return value, handle invalid
434 combinations of operands like unknown opcodes.
435
436 2000-07-28 Ben Elliston <bje@redhat.com>
437
438 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
439 (run-cgen, stamp-m32r, stamp-fr30): New targets.
440 * Makefile.in: Regenerate.
441 * configure.in: Add --enable-cgen-maint option.
442 * configure: Regenerate.
443
444 2000-07-26 Dave Brolley <brolley@redhat.com>
445
446 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
447 (cgen_hw_lookup_by_num): Ditto.
448 (cgen_operand_lookup_by_name): Ditto.
449 (print_address): Ditto.
450 (print_keyword): Ditto.
451 * cgen-dis.c (hash_insn_array): Mark unused parameters with
452 ATTRIBUTE_UNUSED.
453 * cgen-asm.c (hash_insn_array): Mark unused parameters with
454 ATTRIBUTE_UNUSED.
455 (cgen_parse_keyword): Ditto.
456
457 2000-07-22 Jason Eckhardt <jle@cygnus.com>
458
459 * i860-dis.c: New file.
460 (print_insn_i860): New function.
461 (print_br_address): New function.
462 (sign_extend): New function.
463 (BITWISE_OP): New macro.
464 (I860_REG_PREFIX): New macro.
465 (grnames, frnames, crnames): New structures.
466
467 * disassemble.c (ARCH_i860): Define.
468 (disassembler): Add check for bfd_arch_i860 to set disassemble
469 function to print_insn_i860.
470
471 * Makefile.in (CFILES): Added i860-dis.c.
472 (ALL_MACHINES): Added i860-dis.lo.
473 (i860-dis.lo): New dependences.
474
475 * configure.in: New bits for bfd_i860_arch.
476
477 * configure: Regenerated.
478
479 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
480
481 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
482 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
483 (cris-dis.lo, cris-opc.lo): New rules.
484 * Makefile.in: Rebuild.
485 * configure.in (bfd_cris_arch): New target.
486 * configure: Rebuild.
487 * disassemble.c (ARCH_cris): Define.
488 (disassembler): Support ARCH_cris.
489 * cris-dis.c, cris-opc.c: New files.
490 * po/POTFILES.in, po/opcodes.pot: Regenerate.
491
492 2000-07-11 Jakub Jelinek <jakub@redhat.com>
493
494 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
495 Reported by Bill Clarke <llib@computer.org>.
496
497 2000-07-09 Geoffrey Keating <geoffk@cygnus.com>
498
499 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
500 Patch by Randall J Fisher <rfisher@ecn.purdue.edu>.
501
502 2000-07-09 Alan Modra <alan@linuxcare.com.au>
503
504 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
505 fput_const, extract_3, extract_5_load, extract_5_store,
506 extract_5r_store, extract_5R_store, extract_10U_store,
507 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
508 extract_12, extract_17, extract_22): Prototype.
509 (print_insn_hppa): Rename inner block opcode -> opc to avoid
510 shadowing outer block.
511 (GET_BIT): Define.
512
513 2000-07-05 DJ Delorie <dj@redhat.com>
514
515 * MAINTAINERS: new
516
517 2000-07-04 Alexandre Oliva <aoliva@redhat.com>
518
519 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
520
521 2000-07-03 Marek Michalkiewicz <marekm@linux.org.pl>
522
523 * avr-dis.c (avr_operand): Change _ () to _() around all strings
524 marked for translation (exception from the usual coding style).
525 (print_insn_avr): Initialize insn2 to avoid warnings.
526
527 2000-07-03 Kazu Hirata <kazu@hxi.com>
528
529 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
530 * h8500-dis.c: Fix formatting.
531
532 2000-07-01 Alan Modra <alan@linuxcare.com.au>
533
534 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
535 (CLEANFILES): Add DEPA.
536 * Makefile.in: Regenerate.
537
538 2000-06-26 Scott Bambrough <scottb@netwinder.org>
539
540 * arm-dis.c (regnames): Add an additional register set to match
541 the set used by GCC. Make it the default.
542
543 2000-06-22 Alan Modra <alan@linuxcare.com.au>
544
545 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
546 find one.
547 * Makefile.in: Regenerate.
548
549 2000-06-20 H.J. Lu <hjl@gnu.org>
550
551 * Makefile.am: Rebuild dependency.
552 * Makefile.in: Rebuild.
553
554 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
555
556 * Makefile.in, configure: regenerate
557 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
558 ARCH_m68hc11.
559 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
560 New functions.
561 * configure.in: Recognize m68hc12 and m68hc11.
562 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
563 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
564 and opcode generation for m68hc11 and m68hc12.
565
566 2000-06-16 Nick Duffek <nsd@redhat.com>
567
568 * disassemble.c (disassembler): Refer to the PowerPC 620 using
569 bfd_mach_ppc_620 instead of 620.
570
571 2000-06-12 Kazu Hirata <kazu@hxi.com>
572
573 * h8300-dis.c: Fix formatting.
574 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
575 correctly.
576
577 Fri Jun 9 21:49:02 2000 Denis Chertykov <denisc@overta.ru>
578
579 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
580
581 Wed Jun 7 21:36:45 2000 Denis Chertykov <denisc@overta.ru>
582
583 * avr-dis.c: completely rewritten.
584
585 2000-06-02 Kazu Hirata <kazu@hxi.com>
586
587 * h8300-dis.c: Follow the GNU coding style.
588 (bfd_h8_disassemble) Fix a typo.
589
590 2000-06-01 Kazu Hirata <kazu@hxi.com>
591
592 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
593 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
594 correctly. Fix a typo.
595
596 2000-05-31 Nick Clifton <nickc@cygnus.com>
597
598 * opintl.h (_(String)): Explain why dgettext is used instead of
599 gettext.
600
601 2000-05-30 Nick Clifton <nickc@cygnus.com>
602
603 * opintl.h (gettext, dgettext, dcgettext, textdomain,
604 bindtextdomain): Replace defines with those from intl/libgettext.h
605 to quieten gcc warnings.
606
607 2000-05-26 Alan Modra <alan@linuxcare.com.au>
608
609 * Makefile.am: Update dependencies with "make dep-am"
610 * Makefile.in: Regenerate.
611
612 Thu May 25 22:53:20 2000 Alexandre Oliva <aoliva@cygnus.com>
613
614 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
615 sign-extending operands.
616
617 Mon May 15 15:18:07 2000 Donald Lindsay <dlindsay@cygnus.com>
618
619 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
620 except brf's.
621
622 2000-05-21 Nick Clifton <nickc@cygnus.com>
623
624 * Makefile.am (LIBIBERTY): Define.
625
626 Fri May 19 12:29:27 EDT 2000 Diego Novillo <dnovillo@redhat.com>
627
628 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
629 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
630 (reg_names): Rename to std_reg_names. Change it to a char **
631 static variable.
632 (std_reg_names): New name for reg_names.
633 (set_mips_isa_type): Set reg_names to point to std_reg_names by
634 default.
635
636 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
637
638 * fr30-desc.h: Partially regenerated to account for changed
639 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
640 * m32r-desc.h: Ditto.
641
642 2000-05-15 Nick Clifton <nickc@cygnus.com>
643
644 * arm-opc.h: Use upper case for flasg in MSR and MRS
645 instructions. Allow any bit to be set in the field_mask of
646 the MSR instruction.
647
648 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
649 field_mask of an MSR instruction.
650
651 2000-05-11 Thomas de Lellis <tdel@windriver.com>
652
653 * arm-opc.c: Disassembly of thumb ldsb/ldsh
654 instructions changed to ldrsb/ldrsh.
655
656 2000-05-11 Ulf Carlsson <ulfc@engr.sgi.com>
657
658 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
659 target addresses for 'jal' and 'j'.
660
661 2000-05-10 Geoff Keating <geoffk@cygnus.com>
662
663 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
664 also available in common mode when powerpc syntax is being used.
665
666 2000-05-08 Alan Modra <alan@linuxcare.com.au>
667
668 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
669 (dummy_print_address): Ditto.
670
671 2000-05-04 Timothy Wall <twall@cygnus.com>
672
673 * tic54x-opc.c: New.
674 * tic54x-dis.c: New.
675 * disassemble.c (disassembler): Add ARCH_tic54x.
676 * configure.in: Added tic54x target.
677 * configure: Ditto.
678 * Makefile.am: Add tic54x dependencies.
679 * Makefile.in: Ditto.
680
681 2000-05-03 J.T. Conklin <jtc@redback.com>
682
683 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
684 vector unit operands.
685 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
686 unit instruction formats.
687 (PPCVEC): New macro, mask for vector instructions.
688 (powerpc_operands): Add table entries for above operand types.
689 (powerpc_opcodes): Add table entries for vector instructions.
690
691 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
692 (print_insn_little_powerpc): Likewise.
693 (print_insn_powerpc): Prepend 'v' when printing vector registers.
694
695 Mon Apr 24 15:21:35 2000 Clinton Popetz <cpopetz@cygnus.com>
696
697 * configure.in: Add bfd_powerpc_64_arch.
698 * disassemble.c (disassembler): Use print_insn_big_powerpc for
699 64 bit code.
700
701 2000-04-24 Nick Clifton <nickc@cygnus.com>
702
703 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
704 field.
705
706 Sun Apr 23 17:54:14 2000 Denis Chertykov <denisc@overta.ru>
707
708 * avr-dis.c (reg_fmul_d): New. Extract destination register from
709 FMUL instruction.
710 (reg_fmul_r): New. Extract source register from FMUL instruction.
711 (reg_muls_d): New. Extract destination register from MULS instruction.
712 (reg_muls_r): New. Extract source register from MULS instruction.
713 (reg_movw_d): New. Extract destination register from MOVW instruction.
714 (reg_movw_r): New. Extract source register from MOVW instruction.
715 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
716 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
717
718 2000-04-22 Timothy Wall <twall@cygnus.com>
719
720 * ia64-gen.c (general): Add an ordered table of primary
721 opcode names, as well as priority fields to disassembly data
722 structures to enforce a preferred disassembly format based on the
723 ordering of the opcode tables.
724 (load_insn_classes): Show a useful message if IC tables are missing.
725 (load_depfile): Ditto.
726 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
727 distinguish preferred disassembly.
728 * ia64-opc-f.c: Reorder some insn for preferred disassembly
729 format. Fix incorrect flag on fma.s/fma.s.s0.
730 * ia64-opc.c: Scan *all* disassembly matches and use the one with
731 the highest priority.
732 * ia64-opc-b.c: Use more abbreviations.
733 * ia64-asmtab.c: Regenerate.
734
735 Fri Apr 21 16:03:39 2000 Jason Eckhardt <jle@cygnus.com>
736
737 * hppa-dis.c (extract_16): New function.
738 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
739 new operand types l,y,&,fe,fE,fx.
740
741 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
742 David Mosberger <davidm@hpl.hp.com>
743 Timothy Wall <twall@cygnus.com>
744 Bob Manson <manson@charmed.cygnus.com>
745 Jim Wilson <wilson@cygnus.com>
746
747 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
748 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
749 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
750 ia64-asmtab.c.
751 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
752 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
753 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
754 * Makefile.in: Rebuild.
755 * configure Rebuild.
756 * configure.in (bfd_ia64_arch): New target.
757 * disassemble.c (ARCH_ia64): Define.
758 (disassembler): Support ARCH_ia64.
759 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
760 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
761 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
762 ia64-war.tbl, ia64-waw.tbl): New files.
763
764 2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
765
766 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
767 (disassemble): Use them.
768
769 2000-04-14 Alan Modra <alan@linuxcare.com.au>
770
771 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
772 * Makefile.am: Update dependencies.
773 * Makefile.in: Regenerate.
774
775 2000-04-14 Michael Sokolov <msokolov@ivan.Harhan.ORG>
776
777 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
778 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
779 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
780 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
781 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
782 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
783 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
784 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
785 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
786 ansidecl.h as sysdep.h includes it.
787
788 Fri Apr 7 15:56:57 2000 Andrew Cagney <cagney@b1.cygnus.com>
789
790 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
791 --enable-build-warnings option.
792 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
793 * Makefile.in, configure: Re-generate.
794
795 Wed Apr 5 22:28:18 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
796
797 * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
798 stc GBR,@-<REG_N> is available for arch_sh1_up.
799 Group parallel processing insn with identical mnemonics together.
800 Make three-operand psha / pshl come first.
801
802 Wed Apr 5 22:05:40 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
803
804 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
805 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
806 (sh_arg_type): Add A_PC.
807 (sh_table): Update entries using immediates. Add repeat.
808 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
809 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
810
811 2000-04-04 Alan Modra <alan@linuxcare.com.au>
812
813 * po/opcodes.pot: Regenerate.
814
815 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
816 (DEP): Quote when passing vars to sub-make. Add warning message
817 to end.
818 (DEP1): Rewrite for "gcc -MM".
819 (CLEANFILES): Add DEP2.
820 Update dependencies.
821 * Makefile.in: Regenerate.
822
823 2000-04-03 Denis Chertykov <denisc@overta.ru>
824
825 * avr-dis.c: Syntax cleanup.
826 (add0fff): Print the pc relative address as a signed number.
827 (add03f8): Likewise.
828
829 2000-04-01 Ian Lance Taylor <ian@zembu.com>
830
831 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
832 the parameter ATTRIBUTE_UNUSED.
833 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
834
835 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
836
837 * m10300-opc.c: SP-based offsets are always unsigned.
838
839 2000-03-29 Thomas de Lellis <tdel@windriver.com>
840
841 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
842 [branch always] instead of "undefined".
843
844 2000-03-27 Nick Clifton <nickc@cygnus.com>
845
846 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
847 short instructions, from end of list of long instructions.
848
849 2000-03-27 Ian Lance Taylor <ian@zembu.com>
850
851 * Makefile.am (CFILES): Add avr-dis.c.
852 (ALL_MACHINES): Add avr-dis.lo.
853
854 2000-03-27 Alan Modra <alan@linuxcare.com>
855
856 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
857 truncate integers.
858 (print_insn_avr): Call function via pointer in K&R compatible way.
859 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
860 add0fff, add03f8): Convert to old style function declaration and
861 add prototype.
862 (avrdis_opcode): Add prototype.
863
864 2000-03-27 Denis Chertykov <denisc@overta.ru>
865
866 * avr-dis.c: New file. AVR disassembler.
867 * configure.in (bfd_avr_arch): New architecture support.
868 * disassemble.c: Likewise.
869 * configure: Regenerate.
870
871 Mon Mar 6 19:52:05 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
872
873 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
874
875 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
876
877 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
878 flag to determine if operand is pc-relative.
879 * d30v-opc.c:
880 (d30v_format_table):
881 (REL6S3): Renamed from IMM6S3.
882 Added flag OPERAND_PCREL.
883 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
884 added flag OPERAND_PCREL.
885 (IMM12S3U): Replaced with REL12S3.
886 (SHORT_D2, LONG_D): Delay target is pc-relative.
887 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
888 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
889 using the REL* operands.
890 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
891 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
892 LONG_Db, using REL* operands.
893 (SHORT_U, SHORT_A5S): Removed stray alternatives.
894 (d30v_opcode_table): Use new *r formats.
895
896 2000-02-28 Nick Clifton <nickc@cygnus.com>
897
898 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
899 'signed_overflow_ok_p'.
900
901 2000-02-27 Eli Zaretskii <eliz@is.elta.co.il>
902
903 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
904 name of the libtool directory.
905 * Makefile.in: Rebuild.
906
907 2000-02-24 Nick Clifton <nickc@cygnus.com>
908
909 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
910 (cgen_clear_signed_overflow_ok): New function.
911 (cgen_signed_overflow_ok_p): New function.
912
913 2000-02-23 Andrew Haley <aph@cygnus.com>
914
915 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
916 m32r-ibld.c,m32r-opc.h: Rebuild.
917
918 2000-02-23 Linas Vepstas <linas@linas.org>
919
920 * i370-dis.c, i370-opc.c: New.
921
922 * disassemble.c (ARCH_i370): Define.
923 (disassembler): Handle it.
924
925 * Makefile.am: Add support for Linux/IBM 370.
926 * configure.in: Likewise.
927
928 * Makefile.in: Regenerate.
929 * configure: Likewise.
930
931 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
932
933 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
934 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
935 procedure.
936
937 2000-02-22 Andrew Haley <aph@cygnus.com>
938
939 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
940 force gp32 to zero.
941 * mips-opc.c (G6): New define.
942 (mips_builtin_op): Add "move" definition for -gp32.
943
944 2000-02-22 Ian Lance Taylor <ian@zembu.com>
945
946 From Grant Erickson <gerickso@Brocade.COM>:
947 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
948
949 2000-02-21 Alan Modra <alan@spri.levels.unisa.edu.au>
950
951 * dis-buf.c (buffer_read_memory): Change `length' param and all int
952 vars to unsigned.
953
954 Thu Feb 17 00:18:12 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
955
956 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
957 (print_insn_ppi): Likewise.
958 (print_insn_shx): Use info->mach to select appropriate insn set.
959 Add support for sh-dsp. Remove FD_REG_N support.
960 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
961 (sh_arg_type): Likewise. Remove FD_REG_N.
962 (sh_dsp_reg_nums): New enum.
963 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
964 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
965 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
966 (arch_sh3_dsp_up): Likewise.
967 (sh_opcode_info): New field: arch.
968 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
969 D_REG_N. Fill in arch field. Add sh-dsp insns.
970
971 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
972
973 * arm-dis.c: Change flavor name from atpcs-special to
974 special-atpcs to prevent name conflict in gdb.
975 (get_arm_regname_num_options, set_arm_regname_option,
976 get_arm_regnames): New functions. API to access the several
977 flavor of register names. Note: Used by gdb.
978 (print_insn_thumb): Use the register name entry from the currently
979 selected flavor for LR and PC.
980
981 2000-02-10 Nick Clifton <nickc@cygnus.com>
982
983 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
984 classes.
985 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
986 "mulsh.h" instructions.
987 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
988 classes.
989 (print_insn_mcore): Add support for little endian targets.
990 Add support for MULSH and OPSR classes.
991
992 2000-02-07 Nick Clifton <nickc@cygnus.com>
993
994 * arm-dis.c (parse_arm_diassembler_option): Rename again.
995 Previous delat did not take.
996
997 2000-02-03 Timothy Wall <twall@redhat.com>
998
999 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
1000 to adjust target address bounds checking and calculate the
1001 appropriate octet offset into data.
1002
1003 2000-01-27 Nick Clifton <nickc@redhat.com>
1004
1005 * arm-dis.c: (parse_disassembler_option): Rename to
1006 parse_arm_disassembler_option and allow to be exported.
1007
1008 * disassemble.c (disassembler_usage): New function: Print out any
1009 target specific disassembler options.
1010 Call arm_disassembler_options() if the ARM architecture is being
1011 supported.
1012
1013 * arm-dis.c (NUM_ELEM): Define this macro if not already
1014 defined.
1015 (arm_regname): New struct type for ARM register names.
1016 (arm_toggle_regnames): Delete.
1017 (parse_disassembler_option): Use register name structure.
1018 (print_insn): New function: Combines duplicate code found in
1019 print_insn_big_arm and print_insn_little_arm.
1020 (print_insn_big_arm): Call print_insn.
1021 (print_insn_little_arm): Call print_insn.
1022 (print_arm_disassembler_options): Display list of supported,
1023 ARM specific disassembler options.
1024
1025 2000-01-27 Thomas de Lellis <tdel@windriver.com>
1026
1027 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
1028 ARM_STT_16BIT flag as Thumb code symbols.
1029
1030 * arm-dis.c (printf_insn_little_arm): Ditto.
1031
1032 2000-01-25 Thomas de Lellis <tdel@windriver.com>
1033
1034 * arm-dis.c (printf_insn_thumb): Prevent double dumping
1035 of raw thumb instructions.
1036
1037 2000-01-20 Nick Clifton <nickc@cygnus.com>
1038
1039 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
1040
1041 2000-01-03 Nick Clifton <nickc@cygnus.com>
1042
1043 * arm-dis.c (streq): New macro.
1044 (strneq): New macro.
1045 (force_thumb): ew local variable.
1046 (parse_disassembler_option): New function: Parse a single, ARM
1047 specific disassembler command line switch.
1048 (parse_disassembler_option): Call parse_disassembler_option to
1049 parse individual command line switches.
1050 (print_insn_big_arm): Check force_thumb.
1051 (print_insn_little_arm): Check force_thumb.
1052
1053 For older changes see ChangeLog-9899
1054 \f
1055 Local Variables:
1056 mode: change-log
1057 left-margin: 8
1058 fill-column: 74
1059 version-control: never
1060 End:
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