opcodes/ChangeLog

   1 2010-04-09  Nick Clifton  <nickc@redhat.com>
   2
   3         * i386-dis.c (print_insn): Remove unused variable op.
   4         (OP_sI): Remove unused variable mask.
   5
   6 2010-04-07  Alan Modra  <amodra@gmail.com>
   7
   8         * configure: Regenerate.
   9
  10 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
  11
  12         * ppc-opc.c (RBOPT): New define.
  13         ("dccci"): Enable for PPCA2.  Make operands optional.
  14         ("iccci"): Likewise.  Do not deprecate for PPC476.
  15
  16 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
  17
  18         * cr16-opc.c (cr16_instruction): Fix typo in comment.
  19
  20 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
  21
  22         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
  23         * Makefile.in: Regenerate.
  24         * configure.in (bfd_tic6x_arch): New.
  25         * configure: Regenerate.
  26         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
  27         (disassembler): Handle TI C6X.
  28         * tic6x-dis.c: New.
  29
  30 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
  31
  32         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
  33
  34 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
  35
  36         * dis-buf.c (buffer_read_memory): Give error for reading just
  37         before the start of memory.
  38
  39 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
  40             Quentin Neill <quentin.neill@amd.com>
  41
  42         * i386-dis.c (OP_LWP_I): Removed.
  43         (reg_table): Do not use OP_LWP_I, use Iq.
  44         (OP_LWPCB_E): Remove use of names16.
  45         (OP_LWP_E): Same.
  46         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
  47         should not set the Vex.length bit.
  48         * i386-tbl.h: Regenerated.
  49
  50 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
  51
  52         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
  53
  54 2010-02-24  Nick Clifton  <nickc@redhat.com>
  55
  56         PR binutils/6773
  57         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
  58         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
  59         (thumb32_opcodes): Likewise.
  60
  61 2010-02-15  Nick Clifton  <nickc@redhat.com>
  62
  63         * po/vi.po: Updated Vietnamese translation.
  64
  65 2010-02-12  Doug Evans  <dje@sebabeach.org>
  66
  67         * lm32-opinst.c: Regenerate.
  68
  69 2010-02-11  Doug Evans  <dje@sebabeach.org>
  70
  71         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
  72         (print_address): Delete CGEN_PRINT_ADDRESS.
  73         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
  74         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
  75         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
  76         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
  77
  78         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
  79         * frv-desc.c, * frv-desc.h, * frv-opc.c,
  80         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
  81         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
  82         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
  83         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
  84         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
  85         * mep-desc.c, * mep-desc.h, * mep-opc.c,
  86         * mt-desc.c, * mt-desc.h, * mt-opc.c,
  87         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
  88         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
  89         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
  90
  91 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
  92
  93         * i386-dis.c: Update copyright.
  94         * i386-gen.c: Likewise.
  95         * i386-opc.h: Likewise.
  96         * i386-opc.tbl: Likewise.
  97
  98 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
  99             Sebastian Pop  <sebastian.pop@amd.com>
 100
 101         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 102         function to handle 5th imm8 operand.
 103         (PREFIX_VEX_3A48): Added.
 104         (PREFIX_VEX_3A49): Added.
 105         (VEX_W_3A48_P_2): Added.
 106         (VEX_W_3A49_P_2): Added.
 107         (prefix table): Added entries for PREFIX_VEX_3A48
 108         and PREFIX_VEX_3A49.
 109         (vex table): Added entries for VEX_W_3A48_P_2 and
 110         and VEX_W_3A49_P_2.
 111         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 112         for Vec_Imm4 operands.
 113         * i386-opc.h (enum): Added Vec_Imm4.
 114         (i386_operand_type): Added vec_imm4.
 115         * i386-opc.tbl: Add entries for vpermilp[ds].
 116         * i386-init.h: Regenerated.
 117         * i386-tbl.h: Regenerated.
 118
 119 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 120
 121         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 122         and "pwr7".  Move "a2" into alphabetical order.
 123
 124 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 125
 126         * ppc-dis.c (ppc_opts): Add titan entry.
 127         * ppc-opc.c (TITAN, MULHW): Define.
 128         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 129
 130 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 131
 132         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 133         to CPU_BDVER1_FLAGS
 134         * i386-init.h: Regenerated.
 135
 136 2010-02-03  Anthony Green  <green@moxielogic.com>
 137
 138         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 139         0x0f, and make 0x00 an illegal instruction.
 140
 141 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 142
 143         * opcodes/arm-dis.c (struct arm_private_data): New.
 144         (print_insn_coprocessor, print_insn_arm): Update to use struct
 145         arm_private_data.
 146         (is_mapping_symbol, get_map_sym_type): New functions.
 147         (get_sym_code_type): Check the symbol's section.  Do not check
 148         mapping symbols.
 149         (print_insn): Default to disassembling ARM mode code.  Check
 150         for mapping symbols separately from other symbols.  Use
 151         struct arm_private_data.
 152
 153 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 154
 155         * i386-dis.c (EXVexWdqScalar): New.
 156         (vex_scalar_w_dq_mode): Likewise.
 157         (prefix_table): Update entries for PREFIX_VEX_3899,
 158         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 159         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 160         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 161         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 162         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 163         (OP_EX): Likewise.
 164
 165 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 166
 167         * i386-dis.c (XMScalar): New.
 168         (EXdScalar): Likewise.
 169         (EXqScalar): Likewise.
 170         (EXqScalarS): Likewise.
 171         (VexScalar): Likewise.
 172         (EXdVexScalarS): Likewise.
 173         (EXqVexScalarS): Likewise.
 174         (XMVexScalar): Likewise.
 175         (scalar_mode): Likewise.
 176         (d_scalar_mode): Likewise.
 177         (d_scalar_swap_mode): Likewise.
 178         (q_scalar_mode): Likewise.
 179         (q_scalar_swap_mode): Likewise.
 180         (vex_scalar_mode): Likewise.
 181         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 182         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 183         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 184         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 185         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 186         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 187         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 188         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 189         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 190         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 191         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 192         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 193         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 194         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 195         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 196         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 197         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 198         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 199         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 200         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 201         q_scalar_mode, q_scalar_swap_mode.
 202         (OP_XMM): Handle scalar_mode.
 203         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 204         and q_scalar_swap_mode.
 205         (OP_VEX): Handle vex_scalar_mode.
 206
 207 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 208
 209         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 210
 211 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 212
 213         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 214
 215 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 216
 217         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 218
 219 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 220
 221         * i386-dis.c (Bad_Opcode): New.
 222         (bad_opcode): Likewise.
 223         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 224         (dis386_twobyte): Likewise.
 225         (reg_table): Likewise.
 226         (prefix_table): Likewise.
 227         (x86_64_table): Likewise.
 228         (vex_len_table): Likewise.
 229         (vex_w_table): Likewise.
 230         (mod_table): Likewise.
 231         (rm_table): Likewise.
 232         (float_reg): Likewise.
 233         (reg_table): Remove trailing "(bad)" entries.
 234         (prefix_table): Likewise.
 235         (x86_64_table): Likewise.
 236         (vex_len_table): Likewise.
 237         (vex_w_table): Likewise.
 238         (mod_table): Likewise.
 239         (rm_table): Likewise.
 240         (get_valid_dis386): Handle bytemode 0.
 241
 242 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 243
 244         * i386-opc.h (VEXScalar): New.
 245
 246         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 247         instructions.
 248         * i386-tbl.h: Regenerated.
 249
 250 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 251
 252         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 253
 254         * i386-opc.tbl: Add xsave64 and xrstor64.
 255         * i386-tbl.h: Regenerated.
 256
 257 2010-01-20  Nick Clifton  <nickc@redhat.com>
 258
 259         PR 11170
 260         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 261         based post-indexed addressing.
 262
 263 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 264
 265         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 266         * i386-tbl.h: Regenerated.
 267
 268 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 269
 270         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 271         comments.
 272
 273 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 274
 275         * i386-dis.c (names_mm): New.
 276         (intel_names_mm): Likewise.
 277         (att_names_mm): Likewise.
 278         (names_xmm): Likewise.
 279         (intel_names_xmm): Likewise.
 280         (att_names_xmm): Likewise.
 281         (names_ymm): Likewise.
 282         (intel_names_ymm): Likewise.
 283         (att_names_ymm): Likewise.
 284         (print_insn): Set names_mm, names_xmm and names_ymm.
 285         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 286         (OP_XMM): Likewise.
 287         (OP_EM): Likewise.
 288         (OP_EMC): Likewise.
 289         (OP_MXC): Likewise.
 290         (OP_EX): Likewise.
 291         (XMM_Fixup): Likewise.
 292         (OP_VEX): Likewise.
 293         (OP_EX_VexReg): Likewise.
 294         (OP_Vex_2src): Likewise.
 295         (OP_Vex_2src_1): Likewise.
 296         (OP_Vex_2src_2): Likewise.
 297         (OP_REG_VexI4): Likewise.
 298
 299 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 300
 301         * i386-dis.c (print_insn): Update comments.
 302
 303 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 304
 305         * i386-dis.c (rex_original): Removed.
 306         (ckprefix): Remove rex_original.
 307         (print_insn): Update comments.
 308
 309 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 310
 311         * Makefile.in: Regenerate.
 312         * configure: Regenerate.
 313
 314 2010-01-07  Doug Evans  <dje@sebabeach.org>
 315
 316         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 317         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 318         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 319         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 320         * xstormy16-ibld.c: Regenerate.
 321
 322 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 323
 324         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 325         * i386-init.h: Regenerated.
 326
 327 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 328
 329         * arm-dis.c (print_insn): Fixed search for next symbol and data
 330         dumping condition, and the initial mapping symbol state.
 331
 332 2010-01-05  Doug Evans  <dje@sebabeach.org>
 333
 334         * cgen-ibld.in: #include "cgen/basic-modes.h".
 335         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 336         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 337         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 338         * xstormy16-ibld.c: Regenerate.
 339
 340 2010-01-04  Nick Clifton  <nickc@redhat.com>
 341
 342         PR 11123
 343         * arm-dis.c (print_insn_coprocessor): Initialise value.
 344
 345 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 346
 347         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 348
 349 2010-01-02  Doug Evans  <dje@sebabeach.org>
 350
 351         * cgen-asm.in: Update copyright year.
 352         * cgen-dis.in: Update copyright year.
 353         * cgen-ibld.in: Update copyright year.
 354         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 355         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 356         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 357         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 358         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 359         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 360         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 361         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 362         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 363         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 364         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 365         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 366         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 367         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 368         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 369         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 370         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 371         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 372         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 373         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 374         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 375
 376 For older changes see ChangeLog-2009
 377 \f
 378 Local Variables:
 379 mode: change-log
 380 left-margin: 8
 381 fill-column: 74
 382 version-control: never
 383 End: