1 2020-01-18 Nick Clifton <nickc@redhat.com>
3 * configure: Regenerate.
4 * po/opcodes.pot: Regenerate.
6 2020-01-18 Nick Clifton <nickc@redhat.com>
8 Binutils 2.34 branch created.
10 2020-01-17 Christian Biesinger <cbiesinger@google.com>
12 * opintl.h: Fix spelling error (seperate).
14 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
16 * i386-opc.tbl: Add {vex} pseudo prefix.
17 * i386-tbl.h: Regenerated.
19 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
22 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
23 (neon_opcodes): Likewise.
24 (select_arm_features): Make sure we enable MVE bits when selecting
25 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
28 2020-01-16 Jan Beulich <jbeulich@suse.com>
30 * i386-opc.tbl: Drop stale comment from XOP section.
32 2020-01-16 Jan Beulich <jbeulich@suse.com>
34 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
35 (extractps): Add VexWIG to SSE2AVX forms.
36 * i386-tbl.h: Re-generate.
38 2020-01-16 Jan Beulich <jbeulich@suse.com>
40 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
41 Size64 from and use VexW1 on SSE2AVX forms.
42 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
43 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
44 * i386-tbl.h: Re-generate.
46 2020-01-15 Alan Modra <amodra@gmail.com>
48 * tic4x-dis.c (tic4x_version): Make unsigned long.
49 (optab, optab_special, registernames): New file scope vars.
50 (tic4x_print_register): Set up registernames rather than
51 malloc'd registertable.
52 (tic4x_disassemble): Delete optable and optable_special. Use
53 optab and optab_special instead. Throw away old optab,
54 optab_special and registernames when info->mach changes.
56 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
59 * z80-dis.c (suffix): Use .db instruction to generate double
62 2020-01-14 Alan Modra <amodra@gmail.com>
64 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
65 values to unsigned before shifting.
67 2020-01-13 Thomas Troeger <tstroege@gmx.de>
69 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
71 (print_insn_thumb16, print_insn_thumb32): Likewise.
72 (print_insn): Initialize the insn info.
73 * i386-dis.c (print_insn): Initialize the insn info fields, and
76 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
78 * arc-opc.c (C_NE): Make it required.
80 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
82 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
83 reserved register name.
85 2020-01-13 Alan Modra <amodra@gmail.com>
87 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
88 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
90 2020-01-13 Alan Modra <amodra@gmail.com>
92 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
93 result of wasm_read_leb128 in a uint64_t and check that bits
94 are not lost when copying to other locals. Use uint32_t for
95 most locals. Use PRId64 when printing int64_t.
97 2020-01-13 Alan Modra <amodra@gmail.com>
99 * score-dis.c: Formatting.
100 * score7-dis.c: Formatting.
102 2020-01-13 Alan Modra <amodra@gmail.com>
104 * score-dis.c (print_insn_score48): Use unsigned variables for
105 unsigned values. Don't left shift negative values.
106 (print_insn_score32): Likewise.
107 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
109 2020-01-13 Alan Modra <amodra@gmail.com>
111 * tic4x-dis.c (tic4x_print_register): Remove dead code.
113 2020-01-13 Alan Modra <amodra@gmail.com>
115 * fr30-ibld.c: Regenerate.
117 2020-01-13 Alan Modra <amodra@gmail.com>
119 * xgate-dis.c (print_insn): Don't left shift signed value.
120 (ripBits): Formatting, use 1u.
122 2020-01-10 Alan Modra <amodra@gmail.com>
124 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
125 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
127 2020-01-10 Alan Modra <amodra@gmail.com>
129 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
130 and XRREG value earlier to avoid a shift with negative exponent.
131 * m10200-dis.c (disassemble): Similarly.
133 2020-01-09 Nick Clifton <nickc@redhat.com>
136 * z80-dis.c (ld_ii_ii): Use correct cast.
138 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
141 * z80-dis.c (ld_ii_ii): Use character constant when checking
144 2020-01-09 Jan Beulich <jbeulich@suse.com>
146 * i386-dis.c (SEP_Fixup): New.
148 (dis386_twobyte): Use it for sysenter/sysexit.
149 (enum x86_64_isa): Change amd64 enumerator to value 1.
150 (OP_J): Compare isa64 against intel64 instead of amd64.
151 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
153 * i386-tbl.h: Re-generate.
155 2020-01-08 Alan Modra <amodra@gmail.com>
157 * z8k-dis.c: Include libiberty.h
158 (instr_data_s): Make max_fetched unsigned.
159 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
160 Don't exceed byte_info bounds.
161 (output_instr): Make num_bytes unsigned.
162 (unpack_instr): Likewise for nibl_count and loop.
163 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
165 * z8k-opc.h: Regenerate.
167 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
169 * arc-tbl.h (llock): Use 'LLOCK' as class.
171 (scond): Use 'SCOND' as class.
173 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
176 2020-01-06 Alan Modra <amodra@gmail.com>
178 * m32c-ibld.c: Regenerate.
180 2020-01-06 Alan Modra <amodra@gmail.com>
183 * z80-dis.c (suffix): Don't use a local struct buffer copy.
184 Peek at next byte to prevent recursion on repeated prefix bytes.
185 Ensure uninitialised "mybuf" is not accessed.
186 (print_insn_z80): Don't zero n_fetch and n_used here,..
187 (print_insn_z80_buf): ..do it here instead.
189 2020-01-04 Alan Modra <amodra@gmail.com>
191 * m32r-ibld.c: Regenerate.
193 2020-01-04 Alan Modra <amodra@gmail.com>
195 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
197 2020-01-04 Alan Modra <amodra@gmail.com>
199 * crx-dis.c (match_opcode): Avoid shift left of signed value.
201 2020-01-04 Alan Modra <amodra@gmail.com>
203 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
205 2020-01-03 Jan Beulich <jbeulich@suse.com>
207 * aarch64-tbl.h (aarch64_opcode_table): Use
208 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
210 2020-01-03 Jan Beulich <jbeulich@suse.com>
212 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
213 forms of SUDOT and USDOT.
215 2020-01-03 Jan Beulich <jbeulich@suse.com>
217 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
219 * opcodes/aarch64-dis-2.c: Re-generate.
221 2020-01-03 Jan Beulich <jbeulich@suse.com>
223 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
225 * opcodes/aarch64-dis-2.c: Re-generate.
227 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
229 * z80-dis.c: Add support for eZ80 and Z80 instructions.
231 2020-01-01 Alan Modra <amodra@gmail.com>
233 Update year range in copyright notice of all files.
235 For older changes see ChangeLog-2019
237 Copyright (C) 2020 Free Software Foundation, Inc.
239 Copying and distribution of this file, with or without modification,
240 are permitted in any medium without royalty provided the copyright
241 notice and this notice are preserved.
247 version-control: never