1 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
3 * csky-dis.c (csky_output_operand): Assign dis_info.value for
6 2020-08-30 Alan Modra <amodra@gmail.com>
8 * cr16-dis.c: Formatting.
9 (parameter): Delete struct typedef. Use dwordU instead
11 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
13 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
15 2020-08-29 Alan Modra <amodra@gmail.com>
18 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
19 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
21 2020-08-28 Alan Modra <amodra@gmail.com>
25 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
26 (extract_normal): Likewise.
27 (insert_normal): Likewise, and move past zero length test.
28 (put_insn_int_value): Handle mask for zero length, use 1UL.
29 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
30 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
31 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
32 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
34 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
36 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
37 (csky_dis_info): Add member isa.
38 (csky_find_inst_info): Skip instructions that do not belong to
40 (csky_get_disassembler): Get infomation from attribute section.
41 (print_insn_csky): Set defualt ISA flag.
42 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
43 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
44 isa_flag32'type to unsigned 64 bits.
46 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
48 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
50 2020-08-26 David Faust <david.faust@oracle.com>
52 * bpf-desc.c: Regenerate.
53 * bpf-desc.h: Likewise.
54 * bpf-opc.c: Likewise.
55 * bpf-opc.h: Likewise.
56 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
59 2020-08-25 Alan Modra <amodra@gmail.com>
62 * vax-dis.c (parse_disassembler_options): Always add at least one
63 to entry_addr_total_slots.
65 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
67 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
68 in other CPUs to speed up disassembling.
69 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
70 Change plsli.u16 to plsli.16, change sync's operand format.
72 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
74 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
76 2020-08-21 Nick Clifton <nickc@redhat.com>
78 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
81 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
83 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
85 2020-08-19 Alan Modra <amodra@gmail.com>
87 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
90 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
92 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
93 <xvcvbf16spn>: ...to this.
95 2020-08-12 Alex Coplan <alex.coplan@arm.com>
97 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
99 2020-08-12 Nick Clifton <nickc@redhat.com>
101 * po/sr.po: Updated Serbian translation.
103 2020-08-11 Alan Modra <amodra@gmail.com>
105 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
107 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
109 * aarch64-opc.c (aarch64_print_operand):
110 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
111 (aarch64_sys_reg_supported_p): Function removed.
112 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
113 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
116 2020-08-10 Alan Modra <amodra@gmail.com>
118 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
121 2020-08-10 Alan Modra <amodra@gmail.com>
123 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
124 Enable icbt for power5, miso for power8.
126 2020-08-10 Alan Modra <amodra@gmail.com>
128 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
129 mtvsrd, and similarly for mfvsrd.
131 2020-08-04 Christian Groessler <chris@groessler.org>
132 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
134 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
135 opcodes (special "out" to absolute address).
136 * z8k-opc.h: Regenerate.
138 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
141 * i386-opc.h (Prefix_Disp8): New.
142 (Prefix_Disp16): Likewise.
143 (Prefix_Disp32): Likewise.
144 (Prefix_Load): Likewise.
145 (Prefix_Store): Likewise.
146 (Prefix_VEX): Likewise.
147 (Prefix_VEX3): Likewise.
148 (Prefix_EVEX): Likewise.
149 (Prefix_REX): Likewise.
150 (Prefix_NoOptimize): Likewise.
151 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
152 * i386-tbl.h: Regenerated.
154 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
156 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
157 default case with abort() instead of printing an error message and
158 continuing, to avoid a maybe-uninitialized warning.
160 2020-07-24 Nick Clifton <nickc@redhat.com>
162 * po/de.po: Updated German translation.
164 2020-07-21 Jan Beulich <jbeulich@suse.com>
166 * i386-dis.c (OP_E_memory): Revert previous change.
168 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
171 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
172 without base nor index registers.
174 2020-07-15 Jan Beulich <jbeulich@suse.com>
176 * i386-dis.c (putop): Move 'V' and 'W' handling.
178 2020-07-15 Jan Beulich <jbeulich@suse.com>
180 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
181 construct for push/pop of register.
182 (putop): Honor cond when handling 'P'. Drop handling of plain
185 2020-07-15 Jan Beulich <jbeulich@suse.com>
187 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
188 description. Drop '&' description. Use P for push of immediate,
189 pushf/popf, enter, and leave. Use %LP for lret/retf.
190 (dis386_twobyte): Use P for push/pop of fs/gs.
191 (reg_table): Use P for push/pop. Use @ for near call/jmp.
192 (x86_64_table): Use P for far call/jmp.
193 (putop): Drop handling of 'U' and '&'. Move and adjust handling
194 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
196 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
197 and dqw_mode (unconditional).
199 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
202 * i386-dis.c (OP_E_memory): Without base nor index registers,
203 32-bit displacement to 64 bits.
205 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
207 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
208 faulty double register pair is detected.
210 2020-07-14 Jan Beulich <jbeulich@suse.com>
212 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
214 2020-07-14 Jan Beulich <jbeulich@suse.com>
216 * i386-dis.c (OP_R, Rm): Delete.
217 (MOD_0F24, MOD_0F26): Rename to ...
218 (X86_64_0F24, X86_64_0F26): ... respectively.
219 (dis386): Update 'L' and 'Z' comments.
220 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
222 (mod_table): Move opcode 0F24 and 0F26 entries ...
223 (x86_64_table): ... here.
224 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
227 2020-07-14 Jan Beulich <jbeulich@suse.com>
229 * i386-dis.c (Rd, Rdq, MaskR): Delete.
230 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
231 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
232 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
233 MOD_EVEX_0F387C): New enumerators.
234 (reg_table): Use Edq for rdssp.
235 (prefix_table): Use Edq for incssp.
236 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
237 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
238 ktest*, and kshift*. Use Edq / MaskE for kmov*.
239 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
240 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
241 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
242 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
243 0F3828_P_1 and 0F3838_P_1.
244 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
245 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
247 2020-07-14 Jan Beulich <jbeulich@suse.com>
249 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
250 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
251 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
252 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
253 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
254 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
255 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
256 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
257 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
258 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
259 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
260 (reg_table, prefix_table, three_byte_table, vex_table,
261 vex_len_table, mod_table, rm_table): Replace / remove respective
263 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
264 of PREFIX_DATA in used_prefixes.
266 2020-07-14 Jan Beulich <jbeulich@suse.com>
268 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
269 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
270 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
271 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
272 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
273 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
274 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
275 VEX_W_0F3A33_L_0): Delete.
276 (dis386): Adjust "BW" description.
277 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
278 0F3A31, 0F3A32, and 0F3A33.
279 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
281 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
284 2020-07-14 Jan Beulich <jbeulich@suse.com>
286 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
287 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
288 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
289 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
290 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
291 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
292 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
293 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
294 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
295 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
296 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
297 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
298 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
299 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
300 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
301 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
302 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
303 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
304 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
305 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
306 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
307 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
308 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
309 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
310 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
311 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
312 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
313 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
314 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
315 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
316 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
317 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
318 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
319 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
320 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
321 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
322 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
323 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
324 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
325 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
326 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
327 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
328 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
329 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
330 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
331 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
332 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
333 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
334 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
335 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
336 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
337 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
338 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
339 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
340 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
341 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
342 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
343 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
344 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
345 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
346 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
347 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
348 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
349 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
350 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
351 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
352 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
353 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
354 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
355 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
356 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
357 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
358 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
359 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
360 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
361 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
362 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
363 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
364 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
365 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
366 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
367 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
368 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
369 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
370 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
371 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
372 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
373 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
374 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
375 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
376 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
377 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
378 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
379 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
380 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
381 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
382 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
383 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
384 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
385 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
386 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
387 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
388 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
389 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
390 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
391 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
392 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
393 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
394 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
395 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
396 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
397 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
398 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
399 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
400 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
401 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
402 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
403 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
404 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
405 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
406 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
407 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
408 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
409 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
410 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
411 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
412 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
413 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
414 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
415 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
416 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
417 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
418 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
419 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
420 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
421 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
422 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
423 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
424 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
425 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
426 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
427 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
428 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
429 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
430 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
431 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
432 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
433 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
434 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
435 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
436 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
437 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
438 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
439 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
440 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
441 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
442 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
443 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
444 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
445 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
446 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
447 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
448 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
449 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
450 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
451 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
452 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
453 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
454 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
455 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
456 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
457 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
458 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
459 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
460 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
461 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
462 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
463 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
464 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
465 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
466 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
467 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
468 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
469 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
470 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
471 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
472 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
473 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
474 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
475 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
476 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
477 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
478 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
479 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
480 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
481 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
482 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
483 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
484 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
485 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
486 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
487 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
488 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
489 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
490 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
491 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
492 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
493 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
494 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
495 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
496 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
497 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
498 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
499 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
500 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
501 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
502 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
503 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
504 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
505 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
506 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
507 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
508 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
509 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
510 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
511 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
512 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
513 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
514 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
515 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
516 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
517 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
518 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
519 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
520 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
521 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
522 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
523 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
524 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
525 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
526 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
527 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
528 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
529 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
530 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
531 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
532 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
533 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
534 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
535 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
536 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
537 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
538 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
539 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
540 EVEX_W_0F3A72_P_2): Rename to ...
541 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
542 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
543 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
544 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
545 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
546 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
547 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
548 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
549 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
550 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
551 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
552 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
553 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
554 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
555 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
556 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
557 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
558 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
559 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
560 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
561 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
562 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
563 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
564 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
565 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
566 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
567 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
568 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
569 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
570 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
571 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
572 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
573 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
574 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
575 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
576 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
577 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
578 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
579 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
580 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
581 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
582 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
583 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
584 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
585 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
586 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
587 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
588 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
589 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
590 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
591 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
592 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
593 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
594 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
595 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
596 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
597 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
598 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
599 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
600 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
601 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
602 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
603 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
604 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
605 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
606 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
607 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
608 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
609 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
610 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
611 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
612 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
614 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
615 vex_w_table, mod_table): Replace / remove respective entries.
616 (print_insn): Move up dp->prefix_requirement handling. Handle
618 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
619 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
620 Replace / remove respective entries.
622 2020-07-14 Jan Beulich <jbeulich@suse.com>
624 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
625 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
626 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
627 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
628 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
630 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
631 0F2C, 0F2D, 0F2E, and 0F2F.
632 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
635 2020-07-14 Jan Beulich <jbeulich@suse.com>
637 * i386-dis.c (OP_VexR, VexScalarR): New.
638 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
639 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
640 need_vex_reg): Delete.
641 (prefix_table): Replace VexScalar by VexScalarR and
642 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
643 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
644 (vex_len_table): Replace EXqVexScalarS by EXqS.
645 (get_valid_dis386): Don't set need_vex_reg.
646 (print_insn): Don't initialize need_vex_reg.
647 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
648 q_scalar_swap_mode cases.
649 (OP_EX): Don't check for d_scalar_swap_mode and
651 (OP_VEX): Done check need_vex_reg.
652 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
653 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
654 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
656 2020-07-14 Jan Beulich <jbeulich@suse.com>
658 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
659 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
660 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
661 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
662 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
663 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
664 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
665 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
666 (vex_table): Replace Vex128 by Vex.
667 (vex_len_table): Likewise. Adjust referenced enum names.
668 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
669 referenced enum names.
670 (OP_VEX): Drop vex128_mode and vex256_mode cases.
671 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
673 2020-07-14 Jan Beulich <jbeulich@suse.com>
675 * i386-dis.c (dis386): "LW" description now applies to "DQ".
676 (putop): Handle "DQ". Don't handle "LW" anymore.
677 (prefix_table, mod_table): Replace %LW by %DQ.
678 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
680 2020-07-14 Jan Beulich <jbeulich@suse.com>
682 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
683 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
684 d_scalar_swap_mode case handling. Move shift adjsutment into
685 the case its applicable to.
687 2020-07-14 Jan Beulich <jbeulich@suse.com>
689 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
690 (EXbScalar, EXwScalar): Fold to ...
691 (EXbwUnit): ... this.
692 (b_scalar_mode, w_scalar_mode): Fold to ...
693 (bw_unit_mode): ... this.
694 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
695 w_scalar_mode handling by bw_unit_mode one.
696 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
698 * i386-dis-evex-prefix.h: ... here.
700 2020-07-14 Jan Beulich <jbeulich@suse.com>
702 * i386-dis.c (PCMPESTR_Fixup): Delete.
703 (dis386): Adjust "LQ" description.
704 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
705 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
706 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
707 vpcmpestrm, and vpcmpestri.
708 (putop): Honor "cond" when handling LQ.
709 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
710 vcvtsi2ss and vcvtusi2ss.
711 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
712 vcvtsi2sd and vcvtusi2sd.
714 2020-07-14 Jan Beulich <jbeulich@suse.com>
716 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
717 (simd_cmp_op): Add const.
718 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
719 (CMP_Fixup): Handle VEX case.
720 (prefix_table): Replace VCMP by CMP.
721 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
723 2020-07-14 Jan Beulich <jbeulich@suse.com>
725 * i386-dis.c (MOVBE_Fixup): Delete.
727 (prefix_table): Use Mv for movbe entries.
729 2020-07-14 Jan Beulich <jbeulich@suse.com>
731 * i386-dis.c (CRC32_Fixup): Delete.
732 (prefix_table): Use Eb/Ev for crc32 entries.
734 2020-07-14 Jan Beulich <jbeulich@suse.com>
736 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
737 Conditionalize invocations of "USED_REX (0)".
739 2020-07-14 Jan Beulich <jbeulich@suse.com>
741 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
742 CH, DH, BH, AX, DX): Delete.
743 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
744 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
745 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
747 2020-07-10 Lili Cui <lili.cui@intel.com>
749 * i386-dis.c (TMM): New.
752 (MVexSIBMEM): Likewise.
753 (tmm_mode): Likewise.
754 (vex_sibmem_mode): Likewise.
755 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
756 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
757 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
758 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
759 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
760 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
761 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
762 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
763 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
764 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
765 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
766 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
767 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
768 (PREFIX_VEX_0F3849_X86_64): Likewise.
769 (PREFIX_VEX_0F384B_X86_64): Likewise.
770 (PREFIX_VEX_0F385C_X86_64): Likewise.
771 (PREFIX_VEX_0F385E_X86_64): Likewise.
772 (X86_64_VEX_0F3849): Likewise.
773 (X86_64_VEX_0F384B): Likewise.
774 (X86_64_VEX_0F385C): Likewise.
775 (X86_64_VEX_0F385E): Likewise.
776 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
777 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
778 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
779 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
780 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
781 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
782 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
783 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
784 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
785 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
786 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
787 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
788 (VEX_W_0F3849_X86_64_P_0): Likewise.
789 (VEX_W_0F3849_X86_64_P_2): Likewise.
790 (VEX_W_0F3849_X86_64_P_3): Likewise.
791 (VEX_W_0F384B_X86_64_P_1): Likewise.
792 (VEX_W_0F384B_X86_64_P_2): Likewise.
793 (VEX_W_0F384B_X86_64_P_3): Likewise.
794 (VEX_W_0F385C_X86_64_P_1): Likewise.
795 (VEX_W_0F385E_X86_64_P_0): Likewise.
796 (VEX_W_0F385E_X86_64_P_1): Likewise.
797 (VEX_W_0F385E_X86_64_P_2): Likewise.
798 (VEX_W_0F385E_X86_64_P_3): Likewise.
799 (names_tmm): Likewise.
800 (att_names_tmm): Likewise.
801 (intel_operand_size): Handle void_mode.
802 (OP_XMM): Handle tmm_mode.
805 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
806 CpuAMX_BF16 and CpuAMX_TILE.
807 (operand_type_shorthands): Add RegTMM.
808 (operand_type_init): Likewise.
809 (operand_types): Add Tmmword.
810 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
811 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
812 * i386-opc.h (CpuAMX_INT8): New.
813 (CpuAMX_BF16): Likewise.
814 (CpuAMX_TILE): Likewise.
817 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
818 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
819 (i386_operand_type): Add tmmword.
820 * i386-opc.tbl: Add AMX instructions.
821 * i386-reg.tbl: Add AMX registers.
822 * i386-init.h: Regenerated.
823 * i386-tbl.h: Likewise.
825 2020-07-08 Jan Beulich <jbeulich@suse.com>
827 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
828 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
830 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
831 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
833 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
834 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
835 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
836 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
837 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
838 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
839 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
840 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
841 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
842 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
843 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
844 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
845 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
846 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
847 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
848 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
849 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
850 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
851 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
852 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
853 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
854 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
855 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
856 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
857 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
858 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
859 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
860 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
861 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
862 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
863 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
864 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
865 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
866 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
867 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
868 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
869 (reg_table): Re-order XOP entries. Adjust their operands.
870 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
871 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
872 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
873 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
874 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
875 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
876 entries by references ...
877 (vex_len_table): ... to resepctive new entries here. For several
878 new and existing entries reference ...
879 (vex_w_table): ... new entries here.
880 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
882 2020-07-08 Jan Beulich <jbeulich@suse.com>
884 * i386-dis.c (XMVexScalarI4): Define.
885 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
886 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
887 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
888 (vex_len_table): Move scalar FMA4 entries ...
889 (prefix_table): ... here.
890 (OP_REG_VexI4): Handle scalar_mode.
891 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
892 * i386-tbl.h: Re-generate.
894 2020-07-08 Jan Beulich <jbeulich@suse.com>
896 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
898 (OP_VexW, VexW): New.
899 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
900 for shifts and rotates by register.
902 2020-07-08 Jan Beulich <jbeulich@suse.com>
904 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
905 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
906 OP_EX_VexReg): Delete.
907 (OP_VexI4, VexI4): New.
908 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
909 (prefix_table): ... here.
910 (print_insn): Drop setting of vex_w_done.
912 2020-07-08 Jan Beulich <jbeulich@suse.com>
914 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
915 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
916 (xop_table): Replace operands of 4-operand insns.
917 (OP_REG_VexI4): Move VEX.W based operand swaping here.
919 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
921 * arc-opc.c (insert_rbd): New function.
924 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
927 2020-07-07 Jan Beulich <jbeulich@suse.com>
929 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
930 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
931 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
932 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
934 (putop): Handle "BW".
935 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
936 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
938 * i386-dis-evex-prefix.h: ... here.
940 2020-07-06 Jan Beulich <jbeulich@suse.com>
942 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
943 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
944 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
945 VEX_W_0FXOP_09_83): New enumerators.
946 (xop_table): Reference the above.
947 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
948 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
949 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
950 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
952 2020-07-06 Jan Beulich <jbeulich@suse.com>
954 * i386-dis.c (EVEX_W_0F3838_P_1,
955 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
956 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
957 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
958 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
959 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
960 (putop): Centralize management of last[]. Delete SAVE_LAST.
961 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
962 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
963 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
964 * i386-dis-evex-prefix.h: here.
966 2020-07-06 Jan Beulich <jbeulich@suse.com>
968 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
969 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
970 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
971 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
973 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
974 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
975 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
976 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
977 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
978 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
979 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
980 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
982 * i386-dis-evex-len.h: Adjust comments.
983 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
984 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
985 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
986 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
987 MOD_EVEX_0F385B_P_2_W_1 table entries.
988 * i386-dis-evex-w.h: Reference mod_table[] for
989 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
992 2020-07-06 Jan Beulich <jbeulich@suse.com>
994 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
995 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
997 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
998 Likewise. Mark 256-bit entries invalid.
1000 2020-07-06 Jan Beulich <jbeulich@suse.com>
1002 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1003 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1004 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1005 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1006 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1007 PREFIX_EVEX_0F382B): Delete.
1008 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1009 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1010 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1011 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1012 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1014 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1015 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1016 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1017 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1019 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1020 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1021 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1022 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1023 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1024 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1025 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1026 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1027 PREFIX_EVEX_0F382B): Remove table entries.
1028 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1029 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1030 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1032 2020-07-06 Jan Beulich <jbeulich@suse.com>
1034 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1035 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1037 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1038 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1039 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1040 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1043 2020-07-06 Jan Beulich <jbeulich@suse.com>
1045 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1046 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1047 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1048 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1049 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1050 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1051 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1052 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1053 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1056 2020-07-06 Jan Beulich <jbeulich@suse.com>
1058 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1059 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1060 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1062 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1064 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1066 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1068 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1070 2020-07-06 Jan Beulich <jbeulich@suse.com>
1072 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1073 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1074 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1075 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1076 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1077 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1078 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1079 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1080 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1081 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1082 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1083 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1084 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1085 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1086 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1087 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1088 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1089 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1090 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1091 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1092 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1093 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1094 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1095 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1096 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1097 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1098 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1099 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1100 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1101 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1102 (prefix_table): Add EXxEVexR to FMA table entries.
1103 (OP_Rounding): Move abort() invocation.
1104 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1105 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1106 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1107 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1108 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1109 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1110 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1111 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1112 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1113 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1115 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1116 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1117 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1118 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1119 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1120 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1121 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1122 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1123 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1124 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1125 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1126 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1127 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1128 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1129 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1130 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1131 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1132 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1133 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1134 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1135 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1136 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1137 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1138 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1139 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1140 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1141 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1142 Delete table entries.
1143 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1144 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1145 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1148 2020-07-06 Jan Beulich <jbeulich@suse.com>
1150 * i386-dis.c (EXqScalarS): Delete.
1151 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1152 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1154 2020-07-06 Jan Beulich <jbeulich@suse.com>
1156 * i386-dis.c (safe-ctype.h): Include.
1157 (EXdScalar, EXqScalar): Delete.
1158 (d_scalar_mode, q_scalar_mode): Delete.
1159 (prefix_table, vex_len_table): Use EXxmm_md in place of
1160 EXdScalar and EXxmm_mq in place of EXqScalar.
1161 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1162 d_scalar_mode and q_scalar_mode.
1163 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1164 (vmovsd): Use EXxmm_mq.
1166 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1169 * arc-dis.c: Fix spelling mistake.
1170 * po/opcodes.pot: Regenerate.
1172 2020-07-06 Nick Clifton <nickc@redhat.com>
1174 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1175 * po/uk.po: Updated Ukranian translation.
1177 2020-07-04 Nick Clifton <nickc@redhat.com>
1179 * configure: Regenerate.
1180 * po/opcodes.pot: Regenerate.
1182 2020-07-04 Nick Clifton <nickc@redhat.com>
1184 Binutils 2.35 branch created.
1186 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1188 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1189 * i386-opc.h (VexSwapSources): New.
1190 (i386_opcode_modifier): Add vexswapsources.
1191 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1192 with two source operands swapped.
1193 * i386-tbl.h: Regenerated.
1195 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1197 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1198 unprivileged CSR can also be initialized.
1200 2020-06-29 Alan Modra <amodra@gmail.com>
1202 * arm-dis.c: Use C style comments.
1203 * cr16-opc.c: Likewise.
1204 * ft32-dis.c: Likewise.
1205 * moxie-opc.c: Likewise.
1206 * tic54x-dis.c: Likewise.
1207 * s12z-opc.c: Remove useless comment.
1208 * xgate-dis.c: Likewise.
1210 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1212 * i386-opc.tbl: Add a blank line.
1214 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1216 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1217 (VecSIB128): Renamed to ...
1219 (VecSIB256): Renamed to ...
1221 (VecSIB512): Renamed to ...
1223 (VecSIB): Renamed to ...
1225 (i386_opcode_modifier): Replace vecsib with sib.
1226 * i386-opc.tbl (VecSIB128): New.
1227 (VecSIB256): Likewise.
1228 (VecSIB512): Likewise.
1229 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1230 and VecSIB512, respectively.
1232 2020-06-26 Jan Beulich <jbeulich@suse.com>
1234 * i386-dis.c: Adjust description of I macro.
1235 (x86_64_table): Drop use of I.
1236 (float_mem): Replace use of I.
1237 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1239 2020-06-26 Jan Beulich <jbeulich@suse.com>
1241 * i386-dis.c: (print_insn): Avoid straight assignment to
1242 priv.orig_sizeflag when processing -M sub-options.
1244 2020-06-25 Jan Beulich <jbeulich@suse.com>
1246 * i386-dis.c: Adjust description of J macro.
1247 (dis386, x86_64_table, mod_table): Replace J.
1248 (putop): Remove handling of J.
1250 2020-06-25 Jan Beulich <jbeulich@suse.com>
1252 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1254 2020-06-25 Jan Beulich <jbeulich@suse.com>
1256 * i386-dis.c: Adjust description of "LQ" macro.
1257 (dis386_twobyte): Use LQ for sysret.
1258 (putop): Adjust handling of LQ.
1260 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1262 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1263 * riscv-dis.c: Include elfxx-riscv.h.
1265 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1267 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1269 2020-06-17 Lili Cui <lili.cui@intel.com>
1271 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1273 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1276 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1277 * i386-opc.tbl: Likewise.
1278 * i386-tbl.h: Regenerated.
1280 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1282 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1284 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1286 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1287 (SR_CORE): Likewise.
1288 (SR_FEAT): Likewise.
1290 (SR_V8_1): Likewise.
1291 (SR_V8_2): Likewise.
1292 (SR_V8_3): Likewise.
1293 (SR_V8_4): Likewise.
1296 (SR_SSBS): Likewise.
1298 (SR_ID_PFR2): Likewise.
1299 (SR_PROFILE): Likewise.
1300 (SR_MEMTAG): Likewise.
1301 (SR_SCXTNUM): Likewise.
1302 (aarch64_sys_regs): Refactor to store feature information in the table.
1303 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1304 that now describe their own features.
1305 (aarch64_pstatefield_supported_p): Likewise.
1307 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1309 * i386-dis.c (prefix_table): Fix a typo in comments.
1311 2020-06-09 Jan Beulich <jbeulich@suse.com>
1313 * i386-dis.c (rex_ignored): Delete.
1314 (ckprefix): Drop rex_ignored initialization.
1315 (get_valid_dis386): Drop setting of rex_ignored.
1316 (print_insn): Drop checking of rex_ignored. Don't record data
1317 size prefix as used with VEX-and-alike encodings.
1319 2020-06-09 Jan Beulich <jbeulich@suse.com>
1321 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1322 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1323 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1324 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1325 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1326 VEX_0F12, and VEX_0F16.
1327 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1328 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1329 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1330 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1331 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1332 MOD_VEX_0F16_PREFIX_2 entries.
1334 2020-06-09 Jan Beulich <jbeulich@suse.com>
1336 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1337 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1338 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1339 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1340 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1341 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1342 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1343 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1344 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1345 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1346 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1347 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1348 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1349 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1350 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1351 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1352 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1353 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1354 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1355 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1356 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1357 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1358 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1359 EVEX_W_0FC6_P_2): Delete.
1360 (print_insn): Add EVEX.W vs embedded prefix consistency check
1361 to prefix validation.
1362 * i386-dis-evex.h (evex_table): Don't further descend for
1363 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1364 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1366 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1367 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1368 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1369 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1370 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1371 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1372 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1373 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1374 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1375 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1376 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1377 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1378 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1379 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1380 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1381 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1382 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1383 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1384 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1385 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1386 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1387 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1388 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1389 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1390 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1391 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1392 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1394 2020-06-09 Jan Beulich <jbeulich@suse.com>
1396 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1397 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1398 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1400 (print_insn): Drop pointless check against bad_opcode. Split
1401 prefix validation into legacy and VEX-and-alike parts.
1402 (putop): Re-work 'X' macro handling.
1404 2020-06-09 Jan Beulich <jbeulich@suse.com>
1406 * i386-dis.c (MOD_0F51): Rename to ...
1407 (MOD_0F50): ... this.
1409 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1411 * arm-dis.c (arm_opcodes): Add dfb.
1412 (thumb32_opcodes): Add dfb.
1414 2020-06-08 Jan Beulich <jbeulich@suse.com>
1416 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1418 2020-06-06 Alan Modra <amodra@gmail.com>
1420 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1422 2020-06-05 Alan Modra <amodra@gmail.com>
1424 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1425 size is large enough.
1427 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1429 * disassemble.c (disassemble_init_for_target): Set endian_code for
1431 * bpf-desc.c: Regenerate.
1432 * bpf-opc.c: Likewise.
1433 * bpf-dis.c: Likewise.
1435 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1437 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1438 (cgen_put_insn_value): Likewise.
1439 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1440 * cgen-dis.in (print_insn): Likewise.
1441 * cgen-ibld.in (insert_1): Likewise.
1442 (insert_1): Likewise.
1443 (insert_insn_normal): Likewise.
1444 (extract_1): Likewise.
1445 * bpf-dis.c: Regenerate.
1446 * bpf-ibld.c: Likewise.
1447 * bpf-ibld.c: Likewise.
1448 * cgen-dis.in: Likewise.
1449 * cgen-ibld.in: Likewise.
1450 * cgen-opc.c: Likewise.
1451 * epiphany-dis.c: Likewise.
1452 * epiphany-ibld.c: Likewise.
1453 * fr30-dis.c: Likewise.
1454 * fr30-ibld.c: Likewise.
1455 * frv-dis.c: Likewise.
1456 * frv-ibld.c: Likewise.
1457 * ip2k-dis.c: Likewise.
1458 * ip2k-ibld.c: Likewise.
1459 * iq2000-dis.c: Likewise.
1460 * iq2000-ibld.c: Likewise.
1461 * lm32-dis.c: Likewise.
1462 * lm32-ibld.c: Likewise.
1463 * m32c-dis.c: Likewise.
1464 * m32c-ibld.c: Likewise.
1465 * m32r-dis.c: Likewise.
1466 * m32r-ibld.c: Likewise.
1467 * mep-dis.c: Likewise.
1468 * mep-ibld.c: Likewise.
1469 * mt-dis.c: Likewise.
1470 * mt-ibld.c: Likewise.
1471 * or1k-dis.c: Likewise.
1472 * or1k-ibld.c: Likewise.
1473 * xc16x-dis.c: Likewise.
1474 * xc16x-ibld.c: Likewise.
1475 * xstormy16-dis.c: Likewise.
1476 * xstormy16-ibld.c: Likewise.
1478 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1480 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1481 (print_insn_): Handle instruction endian.
1482 * bpf-dis.c: Regenerate.
1483 * bpf-desc.c: Regenerate.
1484 * epiphany-dis.c: Likewise.
1485 * epiphany-desc.c: Likewise.
1486 * fr30-dis.c: Likewise.
1487 * fr30-desc.c: Likewise.
1488 * frv-dis.c: Likewise.
1489 * frv-desc.c: Likewise.
1490 * ip2k-dis.c: Likewise.
1491 * ip2k-desc.c: Likewise.
1492 * iq2000-dis.c: Likewise.
1493 * iq2000-desc.c: Likewise.
1494 * lm32-dis.c: Likewise.
1495 * lm32-desc.c: Likewise.
1496 * m32c-dis.c: Likewise.
1497 * m32c-desc.c: Likewise.
1498 * m32r-dis.c: Likewise.
1499 * m32r-desc.c: Likewise.
1500 * mep-dis.c: Likewise.
1501 * mep-desc.c: Likewise.
1502 * mt-dis.c: Likewise.
1503 * mt-desc.c: Likewise.
1504 * or1k-dis.c: Likewise.
1505 * or1k-desc.c: Likewise.
1506 * xc16x-dis.c: Likewise.
1507 * xc16x-desc.c: Likewise.
1508 * xstormy16-dis.c: Likewise.
1509 * xstormy16-desc.c: Likewise.
1511 2020-06-03 Nick Clifton <nickc@redhat.com>
1513 * po/sr.po: Updated Serbian translation.
1515 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1517 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1518 (riscv_get_priv_spec_class): Likewise.
1520 2020-06-01 Alan Modra <amodra@gmail.com>
1522 * bpf-desc.c: Regenerate.
1524 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1525 David Faust <david.faust@oracle.com>
1527 * bpf-desc.c: Regenerate.
1528 * bpf-opc.h: Likewise.
1529 * bpf-opc.c: Likewise.
1530 * bpf-dis.c: Likewise.
1532 2020-05-28 Alan Modra <amodra@gmail.com>
1534 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1537 2020-05-28 Alan Modra <amodra@gmail.com>
1539 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1541 (print_insn_ns32k): Revert last change.
1543 2020-05-28 Nick Clifton <nickc@redhat.com>
1545 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1548 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1550 Fix extraction of signed constants in nios2 disassembler (again).
1552 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1553 extractions of signed fields.
1555 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1557 * s390-opc.txt: Relocate vector load/store instructions with
1558 additional alignment parameter and change architecture level
1559 constraint from z14 to z13.
1561 2020-05-21 Alan Modra <amodra@gmail.com>
1563 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1564 * sparc-dis.c: Likewise.
1565 * tic4x-dis.c: Likewise.
1566 * xtensa-dis.c: Likewise.
1567 * bpf-desc.c: Regenerate.
1568 * epiphany-desc.c: Regenerate.
1569 * fr30-desc.c: Regenerate.
1570 * frv-desc.c: Regenerate.
1571 * ip2k-desc.c: Regenerate.
1572 * iq2000-desc.c: Regenerate.
1573 * lm32-desc.c: Regenerate.
1574 * m32c-desc.c: Regenerate.
1575 * m32r-desc.c: Regenerate.
1576 * mep-asm.c: Regenerate.
1577 * mep-desc.c: Regenerate.
1578 * mt-desc.c: Regenerate.
1579 * or1k-desc.c: Regenerate.
1580 * xc16x-desc.c: Regenerate.
1581 * xstormy16-desc.c: Regenerate.
1583 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1585 * riscv-opc.c (riscv_ext_version_table): The table used to store
1586 all information about the supported spec and the corresponding ISA
1587 versions. Currently, only Zicsr is supported to verify the
1588 correctness of Z sub extension settings. Others will be supported
1589 in the future patches.
1590 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1591 classes and the corresponding strings.
1592 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1593 spec class by giving a ISA spec string.
1594 * riscv-opc.c (struct priv_spec_t): New structure.
1595 (struct priv_spec_t priv_specs): List for all supported privilege spec
1596 classes and the corresponding strings.
1597 (riscv_get_priv_spec_class): New function. Get the corresponding
1598 privilege spec class by giving a spec string.
1599 (riscv_get_priv_spec_name): New function. Get the corresponding
1600 privilege spec string by giving a CSR version class.
1601 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1602 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1603 according to the chosen version. Build a hash table riscv_csr_hash to
1604 store the valid CSR for the chosen pirv verison. Dump the direct
1605 CSR address rather than it's name if it is invalid.
1606 (parse_riscv_dis_option_without_args): New function. Parse the options
1608 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1609 parse the options without arguments first, and then handle the options
1610 with arguments. Add the new option -Mpriv-spec, which has argument.
1611 * riscv-dis.c (print_riscv_disassembler_options): Add description
1612 about the new OBJDUMP option.
1614 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1616 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1617 WC values on POWER10 sync, dcbf and wait instructions.
1618 (insert_pl, extract_pl): New functions.
1619 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1620 (LS3): New , 3-bit L for sync.
1621 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1622 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1623 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1624 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1625 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1626 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1627 <wait>: Enable PL operand on POWER10.
1628 <dcbf>: Enable L3OPT operand on POWER10.
1629 <sync>: Enable SC2 operand on POWER10.
1631 2020-05-19 Stafford Horne <shorne@gmail.com>
1634 * or1k-asm.c: Regenerate.
1635 * or1k-desc.c: Regenerate.
1636 * or1k-desc.h: Regenerate.
1637 * or1k-dis.c: Regenerate.
1638 * or1k-ibld.c: Regenerate.
1639 * or1k-opc.c: Regenerate.
1640 * or1k-opc.h: Regenerate.
1641 * or1k-opinst.c: Regenerate.
1643 2020-05-11 Alan Modra <amodra@gmail.com>
1645 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1648 2020-05-11 Alan Modra <amodra@gmail.com>
1650 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1651 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1653 2020-05-11 Alan Modra <amodra@gmail.com>
1655 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1657 2020-05-11 Alan Modra <amodra@gmail.com>
1659 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1660 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1662 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1664 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1667 2020-05-11 Alan Modra <amodra@gmail.com>
1669 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1670 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1671 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1672 (prefix_opcodes): Add xxeval.
1674 2020-05-11 Alan Modra <amodra@gmail.com>
1676 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1677 xxgenpcvwm, xxgenpcvdm.
1679 2020-05-11 Alan Modra <amodra@gmail.com>
1681 * ppc-opc.c (MP, VXVAM_MASK): Define.
1682 (VXVAPS_MASK): Use VXVA_MASK.
1683 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1684 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1685 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1686 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1688 2020-05-11 Alan Modra <amodra@gmail.com>
1689 Peter Bergner <bergner@linux.ibm.com>
1691 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1693 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1694 YMSK2, XA6a, XA6ap, XB6a entries.
1695 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1696 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1698 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1699 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1700 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1701 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1702 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1703 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1704 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1705 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1706 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1707 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1708 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1709 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1710 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1711 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1713 2020-05-11 Alan Modra <amodra@gmail.com>
1715 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1716 (insert_xts, extract_xts): New functions.
1717 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1718 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1719 (VXRC_MASK, VXSH_MASK): Define.
1720 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1721 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1722 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1723 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1724 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1725 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1726 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1728 2020-05-11 Alan Modra <amodra@gmail.com>
1730 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1731 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1732 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1733 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1734 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1736 2020-05-11 Alan Modra <amodra@gmail.com>
1738 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1739 (XTP, DQXP, DQXP_MASK): Define.
1740 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1741 (prefix_opcodes): Add plxvp and pstxvp.
1743 2020-05-11 Alan Modra <amodra@gmail.com>
1745 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1746 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1747 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1749 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1751 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1753 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1755 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1757 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1759 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1761 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1763 2020-05-11 Alan Modra <amodra@gmail.com>
1765 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1767 2020-05-11 Alan Modra <amodra@gmail.com>
1769 * ppc-dis.c (ppc_opts): Add "power10" entry.
1770 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1771 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1773 2020-05-11 Nick Clifton <nickc@redhat.com>
1775 * po/fr.po: Updated French translation.
1777 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1779 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1780 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1781 (operand_general_constraint_met_p): validate
1782 AARCH64_OPND_UNDEFINED.
1783 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1785 * aarch64-asm-2.c: Regenerated.
1786 * aarch64-dis-2.c: Regenerated.
1787 * aarch64-opc-2.c: Regenerated.
1789 2020-04-29 Nick Clifton <nickc@redhat.com>
1792 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1795 2020-04-29 Nick Clifton <nickc@redhat.com>
1797 * po/sv.po: Updated Swedish translation.
1799 2020-04-29 Nick Clifton <nickc@redhat.com>
1802 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1803 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1804 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1807 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1810 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1811 cmpi only on m68020up and cpu32.
1813 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1815 * aarch64-asm.c (aarch64_ins_none): New.
1816 * aarch64-asm.h (ins_none): New declaration.
1817 * aarch64-dis.c (aarch64_ext_none): New.
1818 * aarch64-dis.h (ext_none): New declaration.
1819 * aarch64-opc.c (aarch64_print_operand): Update case for
1820 AARCH64_OPND_BARRIER_PSB.
1821 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1822 (AARCH64_OPERANDS): Update inserter/extracter for
1823 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1824 * aarch64-asm-2.c: Regenerated.
1825 * aarch64-dis-2.c: Regenerated.
1826 * aarch64-opc-2.c: Regenerated.
1828 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1830 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1831 (aarch64_feature_ras, RAS): Likewise.
1832 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1833 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1834 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1835 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1836 * aarch64-asm-2.c: Regenerated.
1837 * aarch64-dis-2.c: Regenerated.
1838 * aarch64-opc-2.c: Regenerated.
1840 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1842 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1843 (print_insn_neon): Support disassembly of conditional
1846 2020-02-16 David Faust <david.faust@oracle.com>
1848 * bpf-desc.c: Regenerate.
1849 * bpf-desc.h: Likewise.
1850 * bpf-opc.c: Regenerate.
1851 * bpf-opc.h: Likewise.
1853 2020-04-07 Lili Cui <lili.cui@intel.com>
1855 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1856 (prefix_table): New instructions (see prefixes above).
1857 (rm_table): Likewise
1858 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1859 CPU_ANY_TSXLDTRK_FLAGS.
1860 (cpu_flags): Add CpuTSXLDTRK.
1861 * i386-opc.h (enum): Add CpuTSXLDTRK.
1862 (i386_cpu_flags): Add cputsxldtrk.
1863 * i386-opc.tbl: Add XSUSPLDTRK insns.
1864 * i386-init.h: Regenerate.
1865 * i386-tbl.h: Likewise.
1867 2020-04-02 Lili Cui <lili.cui@intel.com>
1869 * i386-dis.c (prefix_table): New instructions serialize.
1870 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1871 CPU_ANY_SERIALIZE_FLAGS.
1872 (cpu_flags): Add CpuSERIALIZE.
1873 * i386-opc.h (enum): Add CpuSERIALIZE.
1874 (i386_cpu_flags): Add cpuserialize.
1875 * i386-opc.tbl: Add SERIALIZE insns.
1876 * i386-init.h: Regenerate.
1877 * i386-tbl.h: Likewise.
1879 2020-03-26 Alan Modra <amodra@gmail.com>
1881 * disassemble.h (opcodes_assert): Declare.
1882 (OPCODES_ASSERT): Define.
1883 * disassemble.c: Don't include assert.h. Include opintl.h.
1884 (opcodes_assert): New function.
1885 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1886 (bfd_h8_disassemble): Reduce size of data array. Correctly
1887 calculate maxlen. Omit insn decoding when insn length exceeds
1888 maxlen. Exit from nibble loop when looking for E, before
1889 accessing next data byte. Move processing of E outside loop.
1890 Replace tests of maxlen in loop with assertions.
1892 2020-03-26 Alan Modra <amodra@gmail.com>
1894 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1896 2020-03-25 Alan Modra <amodra@gmail.com>
1898 * z80-dis.c (suffix): Init mybuf.
1900 2020-03-22 Alan Modra <amodra@gmail.com>
1902 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1903 successflly read from section.
1905 2020-03-22 Alan Modra <amodra@gmail.com>
1907 * arc-dis.c (find_format): Use ISO C string concatenation rather
1908 than line continuation within a string. Don't access needs_limm
1909 before testing opcode != NULL.
1911 2020-03-22 Alan Modra <amodra@gmail.com>
1913 * ns32k-dis.c (print_insn_arg): Update comment.
1914 (print_insn_ns32k): Reduce size of index_offset array, and
1915 initialize, passing -1 to print_insn_arg for args that are not
1916 an index. Don't exit arg loop early. Abort on bad arg number.
1918 2020-03-22 Alan Modra <amodra@gmail.com>
1920 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1921 * s12z-opc.c: Formatting.
1922 (operands_f): Return an int.
1923 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1924 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1925 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1926 (exg_sex_discrim): Likewise.
1927 (create_immediate_operand, create_bitfield_operand),
1928 (create_register_operand_with_size, create_register_all_operand),
1929 (create_register_all16_operand, create_simple_memory_operand),
1930 (create_memory_operand, create_memory_auto_operand): Don't
1931 segfault on malloc failure.
1932 (z_ext24_decode): Return an int status, negative on fail, zero
1934 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1935 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1936 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1937 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1938 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1939 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1940 (loop_primitive_decode, shift_decode, psh_pul_decode),
1941 (bit_field_decode): Similarly.
1942 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1943 to return value, update callers.
1944 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1945 Don't segfault on NULL operand.
1946 (decode_operation): Return OP_INVALID on first fail.
1947 (decode_s12z): Check all reads, returning -1 on fail.
1949 2020-03-20 Alan Modra <amodra@gmail.com>
1951 * metag-dis.c (print_insn_metag): Don't ignore status from
1954 2020-03-20 Alan Modra <amodra@gmail.com>
1956 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1957 Initialize parts of buffer not written when handling a possible
1958 2-byte insn at end of section. Don't attempt decoding of such
1959 an insn by the 4-byte machinery.
1961 2020-03-20 Alan Modra <amodra@gmail.com>
1963 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1964 partially filled buffer. Prevent lookup of 4-byte insns when
1965 only VLE 2-byte insns are possible due to section size. Print
1966 ".word" rather than ".long" for 2-byte leftovers.
1968 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1971 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1973 2020-03-13 Jan Beulich <jbeulich@suse.com>
1975 * i386-dis.c (X86_64_0D): Rename to ...
1976 (X86_64_0E): ... this.
1978 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1980 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1981 * Makefile.in: Regenerated.
1983 2020-03-09 Jan Beulich <jbeulich@suse.com>
1985 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1987 * i386-tbl.h: Re-generate.
1989 2020-03-09 Jan Beulich <jbeulich@suse.com>
1991 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1992 vprot*, vpsha*, and vpshl*.
1993 * i386-tbl.h: Re-generate.
1995 2020-03-09 Jan Beulich <jbeulich@suse.com>
1997 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1998 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1999 * i386-tbl.h: Re-generate.
2001 2020-03-09 Jan Beulich <jbeulich@suse.com>
2003 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2004 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2005 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2006 * i386-tbl.h: Re-generate.
2008 2020-03-09 Jan Beulich <jbeulich@suse.com>
2010 * i386-gen.c (struct template_arg, struct template_instance,
2011 struct template_param, struct template, templates,
2012 parse_template, expand_templates): New.
2013 (process_i386_opcodes): Various local variables moved to
2014 expand_templates. Call parse_template and expand_templates.
2015 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2016 * i386-tbl.h: Re-generate.
2018 2020-03-06 Jan Beulich <jbeulich@suse.com>
2020 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2021 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2022 register and memory source templates. Replace VexW= by VexW*
2024 * i386-tbl.h: Re-generate.
2026 2020-03-06 Jan Beulich <jbeulich@suse.com>
2028 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2029 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2030 * i386-tbl.h: Re-generate.
2032 2020-03-06 Jan Beulich <jbeulich@suse.com>
2034 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2035 * i386-tbl.h: Re-generate.
2037 2020-03-06 Jan Beulich <jbeulich@suse.com>
2039 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2040 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2041 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2042 VexW0 on SSE2AVX variants.
2043 (vmovq): Drop NoRex64 from XMM/XMM variants.
2044 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2045 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2046 applicable use VexW0.
2047 * i386-tbl.h: Re-generate.
2049 2020-03-06 Jan Beulich <jbeulich@suse.com>
2051 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2052 * i386-opc.h (Rex64): Delete.
2053 (struct i386_opcode_modifier): Remove rex64 field.
2054 * i386-opc.tbl (crc32): Drop Rex64.
2055 Replace Rex64 with Size64 everywhere else.
2056 * i386-tbl.h: Re-generate.
2058 2020-03-06 Jan Beulich <jbeulich@suse.com>
2060 * i386-dis.c (OP_E_memory): Exclude recording of used address
2061 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2062 addressed memory operands for MPX insns.
2064 2020-03-06 Jan Beulich <jbeulich@suse.com>
2066 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2067 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2068 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2069 (ptwrite): Split into non-64-bit and 64-bit forms.
2070 * i386-tbl.h: Re-generate.
2072 2020-03-06 Jan Beulich <jbeulich@suse.com>
2074 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2076 * i386-tbl.h: Re-generate.
2078 2020-03-04 Jan Beulich <jbeulich@suse.com>
2080 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2081 (prefix_table): Move vmmcall here. Add vmgexit.
2082 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2083 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2084 (cpu_flags): Add CpuSEV_ES entry.
2085 * i386-opc.h (CpuSEV_ES): New.
2086 (union i386_cpu_flags): Add cpusev_es field.
2087 * i386-opc.tbl (vmgexit): New.
2088 * i386-init.h, i386-tbl.h: Re-generate.
2090 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2092 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2094 * i386-opc.h (IGNORESIZE): New.
2095 (DEFAULTSIZE): Likewise.
2096 (IgnoreSize): Removed.
2097 (DefaultSize): Likewise.
2098 (MnemonicSize): New.
2099 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2101 * i386-opc.tbl (IgnoreSize): New.
2102 (DefaultSize): Likewise.
2103 * i386-tbl.h: Regenerated.
2105 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2108 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2111 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2114 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2115 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2116 * i386-tbl.h: Regenerated.
2118 2020-02-26 Alan Modra <amodra@gmail.com>
2120 * aarch64-asm.c: Indent labels correctly.
2121 * aarch64-dis.c: Likewise.
2122 * aarch64-gen.c: Likewise.
2123 * aarch64-opc.c: Likewise.
2124 * alpha-dis.c: Likewise.
2125 * i386-dis.c: Likewise.
2126 * nds32-asm.c: Likewise.
2127 * nfp-dis.c: Likewise.
2128 * visium-dis.c: Likewise.
2130 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2132 * arc-regs.h (int_vector_base): Make it available for all ARC
2135 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2137 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2140 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2142 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2143 c.mv/c.li if rs1 is zero.
2145 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2147 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2148 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2150 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2151 * i386-opc.h (CpuABM): Removed.
2153 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2154 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2155 popcnt. Remove CpuABM from lzcnt.
2156 * i386-init.h: Regenerated.
2157 * i386-tbl.h: Likewise.
2159 2020-02-17 Jan Beulich <jbeulich@suse.com>
2161 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2162 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2163 VexW1 instead of open-coding them.
2164 * i386-tbl.h: Re-generate.
2166 2020-02-17 Jan Beulich <jbeulich@suse.com>
2168 * i386-opc.tbl (AddrPrefixOpReg): Define.
2169 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2170 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2171 templates. Drop NoRex64.
2172 * i386-tbl.h: Re-generate.
2174 2020-02-17 Jan Beulich <jbeulich@suse.com>
2177 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2178 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2179 into Intel syntax instance (with Unpsecified) and AT&T one
2181 (vcvtneps2bf16): Likewise, along with folding the two so far
2183 * i386-tbl.h: Re-generate.
2185 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2187 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2188 CPU_ANY_SSE4A_FLAGS.
2190 2020-02-17 Alan Modra <amodra@gmail.com>
2192 * i386-gen.c (cpu_flag_init): Correct last change.
2194 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2196 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2199 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2201 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2204 2020-02-14 Jan Beulich <jbeulich@suse.com>
2207 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2208 destination for Cpu64-only variant.
2209 (movzx): Fold patterns.
2210 * i386-tbl.h: Re-generate.
2212 2020-02-13 Jan Beulich <jbeulich@suse.com>
2214 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2215 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2216 CPU_ANY_SSE4_FLAGS entry.
2217 * i386-init.h: Re-generate.
2219 2020-02-12 Jan Beulich <jbeulich@suse.com>
2221 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2222 with Unspecified, making the present one AT&T syntax only.
2223 * i386-tbl.h: Re-generate.
2225 2020-02-12 Jan Beulich <jbeulich@suse.com>
2227 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2228 * i386-tbl.h: Re-generate.
2230 2020-02-12 Jan Beulich <jbeulich@suse.com>
2233 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2234 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2235 Amd64 and Intel64 templates.
2236 (call, jmp): Likewise for far indirect variants. Dro
2238 * i386-tbl.h: Re-generate.
2240 2020-02-11 Jan Beulich <jbeulich@suse.com>
2242 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2243 * i386-opc.h (ShortForm): Delete.
2244 (struct i386_opcode_modifier): Remove shortform field.
2245 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2246 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2247 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2248 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2250 * i386-tbl.h: Re-generate.
2252 2020-02-11 Jan Beulich <jbeulich@suse.com>
2254 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2255 fucompi): Drop ShortForm from operand-less templates.
2256 * i386-tbl.h: Re-generate.
2258 2020-02-11 Alan Modra <amodra@gmail.com>
2260 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2261 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2262 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2263 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2264 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2266 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2268 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2269 (cde_opcodes): Add VCX* instructions.
2271 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2272 Matthew Malcomson <matthew.malcomson@arm.com>
2274 * arm-dis.c (struct cdeopcode32): New.
2275 (CDE_OPCODE): New macro.
2276 (cde_opcodes): New disassembly table.
2277 (regnames): New option to table.
2278 (cde_coprocs): New global variable.
2279 (print_insn_cde): New
2280 (print_insn_thumb32): Use print_insn_cde.
2281 (parse_arm_disassembler_options): Parse coprocN args.
2283 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2286 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2288 * i386-opc.h (AMD64): Removed.
2289 (Intel64): Likewose.
2291 (INTEL64): Likewise.
2292 (INTEL64ONLY): Likewise.
2293 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2294 * i386-opc.tbl (Amd64): New.
2295 (Intel64): Likewise.
2296 (Intel64Only): Likewise.
2297 Replace AMD64 with Amd64. Update sysenter/sysenter with
2298 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2299 * i386-tbl.h: Regenerated.
2301 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2304 * z80-dis.c: Add support for GBZ80 opcodes.
2306 2020-02-04 Alan Modra <amodra@gmail.com>
2308 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2310 2020-02-03 Alan Modra <amodra@gmail.com>
2312 * m32c-ibld.c: Regenerate.
2314 2020-02-01 Alan Modra <amodra@gmail.com>
2316 * frv-ibld.c: Regenerate.
2318 2020-01-31 Jan Beulich <jbeulich@suse.com>
2320 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2321 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2322 (OP_E_memory): Replace xmm_mdq_mode case label by
2323 vex_scalar_w_dq_mode one.
2324 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2326 2020-01-31 Jan Beulich <jbeulich@suse.com>
2328 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2329 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2330 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2331 (intel_operand_size): Drop vex_w_dq_mode case label.
2333 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2335 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2336 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2338 2020-01-30 Alan Modra <amodra@gmail.com>
2340 * m32c-ibld.c: Regenerate.
2342 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2344 * bpf-opc.c: Regenerate.
2346 2020-01-30 Jan Beulich <jbeulich@suse.com>
2348 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2349 (dis386): Use them to replace C2/C3 table entries.
2350 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2351 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2352 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2353 * i386-tbl.h: Re-generate.
2355 2020-01-30 Jan Beulich <jbeulich@suse.com>
2357 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2359 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2361 * i386-tbl.h: Re-generate.
2363 2020-01-30 Alan Modra <amodra@gmail.com>
2365 * tic4x-dis.c (tic4x_dp): Make unsigned.
2367 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2368 Jan Beulich <jbeulich@suse.com>
2371 * i386-dis.c (MOVSXD_Fixup): New function.
2372 (movsxd_mode): New enum.
2373 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2374 (intel_operand_size): Handle movsxd_mode.
2375 (OP_E_register): Likewise.
2377 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2378 register on movsxd. Add movsxd with 16-bit destination register
2379 for AMD64 and Intel64 ISAs.
2380 * i386-tbl.h: Regenerated.
2382 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2385 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2386 * aarch64-asm-2.c: Regenerate
2387 * aarch64-dis-2.c: Likewise.
2388 * aarch64-opc-2.c: Likewise.
2390 2020-01-21 Jan Beulich <jbeulich@suse.com>
2392 * i386-opc.tbl (sysret): Drop DefaultSize.
2393 * i386-tbl.h: Re-generate.
2395 2020-01-21 Jan Beulich <jbeulich@suse.com>
2397 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2399 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2400 * i386-tbl.h: Re-generate.
2402 2020-01-20 Nick Clifton <nickc@redhat.com>
2404 * po/de.po: Updated German translation.
2405 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2406 * po/uk.po: Updated Ukranian translation.
2408 2020-01-20 Alan Modra <amodra@gmail.com>
2410 * hppa-dis.c (fput_const): Remove useless cast.
2412 2020-01-20 Alan Modra <amodra@gmail.com>
2414 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2416 2020-01-18 Nick Clifton <nickc@redhat.com>
2418 * configure: Regenerate.
2419 * po/opcodes.pot: Regenerate.
2421 2020-01-18 Nick Clifton <nickc@redhat.com>
2423 Binutils 2.34 branch created.
2425 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2427 * opintl.h: Fix spelling error (seperate).
2429 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2431 * i386-opc.tbl: Add {vex} pseudo prefix.
2432 * i386-tbl.h: Regenerated.
2434 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2437 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2438 (neon_opcodes): Likewise.
2439 (select_arm_features): Make sure we enable MVE bits when selecting
2440 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2443 2020-01-16 Jan Beulich <jbeulich@suse.com>
2445 * i386-opc.tbl: Drop stale comment from XOP section.
2447 2020-01-16 Jan Beulich <jbeulich@suse.com>
2449 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2450 (extractps): Add VexWIG to SSE2AVX forms.
2451 * i386-tbl.h: Re-generate.
2453 2020-01-16 Jan Beulich <jbeulich@suse.com>
2455 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2456 Size64 from and use VexW1 on SSE2AVX forms.
2457 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2458 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2459 * i386-tbl.h: Re-generate.
2461 2020-01-15 Alan Modra <amodra@gmail.com>
2463 * tic4x-dis.c (tic4x_version): Make unsigned long.
2464 (optab, optab_special, registernames): New file scope vars.
2465 (tic4x_print_register): Set up registernames rather than
2466 malloc'd registertable.
2467 (tic4x_disassemble): Delete optable and optable_special. Use
2468 optab and optab_special instead. Throw away old optab,
2469 optab_special and registernames when info->mach changes.
2471 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2474 * z80-dis.c (suffix): Use .db instruction to generate double
2477 2020-01-14 Alan Modra <amodra@gmail.com>
2479 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2480 values to unsigned before shifting.
2482 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2484 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2486 (print_insn_thumb16, print_insn_thumb32): Likewise.
2487 (print_insn): Initialize the insn info.
2488 * i386-dis.c (print_insn): Initialize the insn info fields, and
2491 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2493 * arc-opc.c (C_NE): Make it required.
2495 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2497 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2498 reserved register name.
2500 2020-01-13 Alan Modra <amodra@gmail.com>
2502 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2503 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2505 2020-01-13 Alan Modra <amodra@gmail.com>
2507 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2508 result of wasm_read_leb128 in a uint64_t and check that bits
2509 are not lost when copying to other locals. Use uint32_t for
2510 most locals. Use PRId64 when printing int64_t.
2512 2020-01-13 Alan Modra <amodra@gmail.com>
2514 * score-dis.c: Formatting.
2515 * score7-dis.c: Formatting.
2517 2020-01-13 Alan Modra <amodra@gmail.com>
2519 * score-dis.c (print_insn_score48): Use unsigned variables for
2520 unsigned values. Don't left shift negative values.
2521 (print_insn_score32): Likewise.
2522 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2524 2020-01-13 Alan Modra <amodra@gmail.com>
2526 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2528 2020-01-13 Alan Modra <amodra@gmail.com>
2530 * fr30-ibld.c: Regenerate.
2532 2020-01-13 Alan Modra <amodra@gmail.com>
2534 * xgate-dis.c (print_insn): Don't left shift signed value.
2535 (ripBits): Formatting, use 1u.
2537 2020-01-10 Alan Modra <amodra@gmail.com>
2539 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2540 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2542 2020-01-10 Alan Modra <amodra@gmail.com>
2544 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2545 and XRREG value earlier to avoid a shift with negative exponent.
2546 * m10200-dis.c (disassemble): Similarly.
2548 2020-01-09 Nick Clifton <nickc@redhat.com>
2551 * z80-dis.c (ld_ii_ii): Use correct cast.
2553 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2556 * z80-dis.c (ld_ii_ii): Use character constant when checking
2559 2020-01-09 Jan Beulich <jbeulich@suse.com>
2561 * i386-dis.c (SEP_Fixup): New.
2563 (dis386_twobyte): Use it for sysenter/sysexit.
2564 (enum x86_64_isa): Change amd64 enumerator to value 1.
2565 (OP_J): Compare isa64 against intel64 instead of amd64.
2566 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2568 * i386-tbl.h: Re-generate.
2570 2020-01-08 Alan Modra <amodra@gmail.com>
2572 * z8k-dis.c: Include libiberty.h
2573 (instr_data_s): Make max_fetched unsigned.
2574 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2575 Don't exceed byte_info bounds.
2576 (output_instr): Make num_bytes unsigned.
2577 (unpack_instr): Likewise for nibl_count and loop.
2578 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2580 * z8k-opc.h: Regenerate.
2582 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2584 * arc-tbl.h (llock): Use 'LLOCK' as class.
2586 (scond): Use 'SCOND' as class.
2588 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2591 2020-01-06 Alan Modra <amodra@gmail.com>
2593 * m32c-ibld.c: Regenerate.
2595 2020-01-06 Alan Modra <amodra@gmail.com>
2598 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2599 Peek at next byte to prevent recursion on repeated prefix bytes.
2600 Ensure uninitialised "mybuf" is not accessed.
2601 (print_insn_z80): Don't zero n_fetch and n_used here,..
2602 (print_insn_z80_buf): ..do it here instead.
2604 2020-01-04 Alan Modra <amodra@gmail.com>
2606 * m32r-ibld.c: Regenerate.
2608 2020-01-04 Alan Modra <amodra@gmail.com>
2610 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2612 2020-01-04 Alan Modra <amodra@gmail.com>
2614 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2616 2020-01-04 Alan Modra <amodra@gmail.com>
2618 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2620 2020-01-03 Jan Beulich <jbeulich@suse.com>
2622 * aarch64-tbl.h (aarch64_opcode_table): Use
2623 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2625 2020-01-03 Jan Beulich <jbeulich@suse.com>
2627 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2628 forms of SUDOT and USDOT.
2630 2020-01-03 Jan Beulich <jbeulich@suse.com>
2632 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2634 * opcodes/aarch64-dis-2.c: Re-generate.
2636 2020-01-03 Jan Beulich <jbeulich@suse.com>
2638 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2640 * opcodes/aarch64-dis-2.c: Re-generate.
2642 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2644 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2646 2020-01-01 Alan Modra <amodra@gmail.com>
2648 Update year range in copyright notice of all files.
2650 For older changes see ChangeLog-2019
2652 Copyright (C) 2020 Free Software Foundation, Inc.
2654 Copying and distribution of this file, with or without modification,
2655 are permitted in any medium without royalty provided the copyright
2656 notice and this notice are preserved.
2662 version-control: never
projects / deliverable / binutils-gdb.git / blob