opcodes/ChangeLog

   1 2005-03-02  Jan Beulich  <jbeulich@novell.com>
   2
   3         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
   4         accesses.
   5         (OP_C): Consider lock prefix in non-64-bit modes.
   6
   7 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
   8
   9         * cris-dis.c (format_hex): Remove ineffective warning fix.
  10         * crx-dis.c (make_instruction): Warning fix.
  11         * frv-asm.c: Regenerate.
  12
  13 2005-02-23  Nick Clifton  <nickc@redhat.com>
  14
  15         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  16         read_memory.
  17
  18         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  19
  20         * crx-dis.c (make_instruction): Move argument structure into inner
  21         scope and ensure that all of its fields are initialised before
  22         they are used.
  23
  24         * fr30-asm.c: Regenerate.
  25         * fr30-dis.c: Regenerate.
  26         * frv-asm.c: Regenerate.
  27         * frv-dis.c: Regenerate.
  28         * ip2k-asm.c: Regenerate.
  29         * ip2k-dis.c: Regenerate.
  30         * iq2000-asm.c: Regenerate.
  31         * iq2000-dis.c: Regenerate.
  32         * m32r-asm.c: Regenerate.
  33         * m32r-dis.c: Regenerate.
  34         * openrisc-asm.c: Regenerate.
  35         * openrisc-dis.c: Regenerate.
  36         * xstormy16-asm.c: Regenerate.
  37         * xstormy16-dis.c: Regenerate.
  38
  39 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  40
  41         * arc-ext.c: Warning fixes.
  42         * arc-ext.h: Likewise.
  43         * cgen-opc.c: Likewise.
  44         * ia64-gen.c: Likewise.
  45         * maxq-dis.c: Likewise.
  46         * ns32k-dis.c: Likewise.
  47         * w65-dis.c: Likewise.
  48         * ia64-asmtab.c: Regenerate.
  49
  50 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  51
  52         * fr30-desc.c: Regenerate.
  53         * fr30-desc.h: Regenerate.
  54         * fr30-opc.c: Regenerate.
  55         * fr30-opc.h: Regenerate.
  56         * frv-desc.c: Regenerate.
  57         * frv-desc.h: Regenerate.
  58         * frv-opc.c: Regenerate.
  59         * frv-opc.h: Regenerate.
  60         * ip2k-desc.c: Regenerate.
  61         * ip2k-desc.h: Regenerate.
  62         * ip2k-opc.c: Regenerate.
  63         * ip2k-opc.h: Regenerate.
  64         * iq2000-desc.c: Regenerate.
  65         * iq2000-desc.h: Regenerate.
  66         * iq2000-opc.c: Regenerate.
  67         * iq2000-opc.h: Regenerate.
  68         * m32r-desc.c: Regenerate.
  69         * m32r-desc.h: Regenerate.
  70         * m32r-opc.c: Regenerate.
  71         * m32r-opc.h: Regenerate.
  72         * m32r-opinst.c: Regenerate.
  73         * openrisc-desc.c: Regenerate.
  74         * openrisc-desc.h: Regenerate.
  75         * openrisc-opc.c: Regenerate.
  76         * openrisc-opc.h: Regenerate.
  77         * xstormy16-desc.c: Regenerate.
  78         * xstormy16-desc.h: Regenerate.
  79         * xstormy16-opc.c: Regenerate.
  80         * xstormy16-opc.h: Regenerate.
  81
  82 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
  83
  84         * Makefile.am: Run "make dep-am"
  85         * Makefile.in: Regenerate.
  86
  87 2005-02-15  Nick Clifton  <nickc@redhat.com>
  88
  89         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
  90         compile time warnings.
  91         (print_keyword): Likewise.
  92         (default_print_insn): Likewise.
  93
  94         * fr30-desc.c: Regenerated.
  95         * fr30-desc.h: Regenerated.
  96         * fr30-dis.c: Regenerated.
  97         * fr30-opc.c: Regenerated.
  98         * fr30-opc.h: Regenerated.
  99         * frv-desc.c: Regenerated.
 100         * frv-dis.c: Regenerated.
 101         * frv-opc.c: Regenerated.
 102         * ip2k-asm.c: Regenerated.
 103         * ip2k-desc.c: Regenerated.
 104         * ip2k-desc.h: Regenerated.
 105         * ip2k-dis.c: Regenerated.
 106         * ip2k-opc.c: Regenerated.
 107         * ip2k-opc.h: Regenerated.
 108         * iq2000-desc.c: Regenerated.
 109         * iq2000-dis.c: Regenerated.
 110         * iq2000-opc.c: Regenerated.
 111         * m32r-asm.c: Regenerated.
 112         * m32r-desc.c: Regenerated.
 113         * m32r-desc.h: Regenerated.
 114         * m32r-dis.c: Regenerated.
 115         * m32r-opc.c: Regenerated.
 116         * m32r-opc.h: Regenerated.
 117         * m32r-opinst.c: Regenerated.
 118         * openrisc-desc.c: Regenerated.
 119         * openrisc-desc.h: Regenerated.
 120         * openrisc-dis.c: Regenerated.
 121         * openrisc-opc.c: Regenerated.
 122         * openrisc-opc.h: Regenerated.
 123         * xstormy16-desc.c: Regenerated.
 124         * xstormy16-desc.h: Regenerated.
 125         * xstormy16-dis.c: Regenerated.
 126         * xstormy16-opc.c: Regenerated.
 127         * xstormy16-opc.h: Regenerated.
 128
 129 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 130
 131         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 132         address.
 133
 134 2005-02-11  Nick Clifton  <nickc@redhat.com>
 135
 136         * iq2000-asm.c: Regenerate.
 137
 138         * frv-dis.c: Regenerate.
 139
 140 2005-02-07  Jim Blandy  <jimb@redhat.com>
 141
 142         * Makefile.am (CGEN): Load guile.scm before calling the main
 143         application script.
 144         * Makefile.in: Regenerated.
 145         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 146         Simply pass the cgen-opc.scm path to ${cgen} as its first
 147         argument; ${cgen} itself now contains the '-s', or whatever is
 148         appropriate for the Scheme being used.
 149
 150 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 151
 152         * configure: Regenerate to track ../gettext.m4.
 153
 154 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 155
 156         * ia64-gen.c (NELEMS): Define.
 157         (shrink): Generate alias with missing second predicate register when
 158         opcode has two outputs and these are both predicates.
 159         * ia64-opc-i.c (FULL17): Define.
 160         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 161         here to generate output template.
 162         (TBITCM, TNATCM): Undefine after use.
 163         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 164         first input. Add ld16 aliases without ar.csd as second output. Add
 165         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 166         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 167         ar.ccv as third/fourth inputs. Consolidate through...
 168         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 169         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 170         * ia64-asmtab.c: Regenerate.
 171
 172 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 173
 174         * configure: Regenerate to track ../gettext.m4 change.
 175
 176 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 177
 178         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 179         * frv-asm.c: Rebuilt.
 180         * frv-desc.c: Rebuilt.
 181         * frv-desc.h: Rebuilt.
 182         * frv-dis.c: Rebuilt.
 183         * frv-ibld.c: Rebuilt.
 184         * frv-opc.c: Rebuilt.
 185         * frv-opc.h: Rebuilt.
 186
 187 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 188
 189         * configure: Regenerate, ../gettext.m4 was updated.
 190
 191 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 192
 193         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 194         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 195         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 196         * mips-dis.c: Ditto.
 197
 198 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 199
 200         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 201
 202 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 203
 204         * mips-dis.c (no_aliases): New disassembly option flag.
 205         (set_default_mips_dis_options): Init no_aliases to zero.
 206         (parse_mips_dis_option): Handle no-aliases option.
 207         (print_insn_mips): Ignore table entries that are aliases
 208         if no_aliases is set.
 209         (print_insn_mips16): Ditto.
 210         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 211         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 212         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 213         * mips16-opc.c (mips16_opcodes): Ditto.
 214
 215 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 216
 217         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 218         (inheritance diagram): Add missing edge.
 219         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 220         easier for the testsuite.
 221         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 222         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 223         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 224         arch_sh2a_or_sh4_up child.
 225         (sh_table): Do renaming as above.
 226         Correct comment for ldc.l for gas testsuite to read.
 227         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 228         Correct comments for movy.w and movy.l for gas testsuite to read.
 229         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 230
 231 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 232
 233         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 234
 235 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 236
 237         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 238
 239 2005-01-10  Andreas Schwab  <schwab@suse.de>
 240
 241         * disassemble.c (disassemble_init_for_target) <case
 242         bfd_arch_ia64>: Set skip_zeroes to 16.
 243         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 244
 245 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 246
 247         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 248
 249 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 250
 251         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 252         memory references. Convert avr_operand() to C90 formatting.
 253
 254 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 255
 256         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 257
 258 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 259
 260         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 261         (no_op_insn): Initialize array with instructions that have no
 262         operands.
 263         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 264
 265 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 266
 267         * arm-dis.c: Correct top-level comment.
 268
 269 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 270
 271         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 272         architecuture defining the insn.
 273         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 274         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 275         field.
 276         Also include opcode/arm.h.
 277         * Makefile.am (arm-dis.lo): Update dependency list.
 278         * Makefile.in: Regenerate.
 279
 280 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 281
 282         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 283         reflect the change to the short immediate syntax.
 284
 285 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 286
 287         * or32-opc.c (debug): Warning fix.
 288         * po/POTFILES.in: Regenerate.
 289
 290         * maxq-dis.c: Formatting.
 291         (print_insn): Warning fix.
 292
 293 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 294
 295         * arm-dis.c (WORD_ADDRESS): Define.
 296         (print_insn): Use it.  Correct big-endian end-of-section handling.
 297
 298 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 299             Vineet Sharma      <vineets@noida.hcltech.com>
 300
 301         * maxq-dis.c: New file.
 302         * disassemble.c (ARCH_maxq): Define.
 303         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 304         instructions..
 305         * configure.in: Add case for bfd_maxq_arch.
 306         * configure: Regenerate.
 307         * Makefile.am: Add support for maxq-dis.c
 308         * Makefile.in: Regenerate.
 309         * aclocal.m4: Regenerate.
 310
 311 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 312
 313         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 314         mode.
 315         * crx-dis.c: Likewise.
 316
 317 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 318
 319         Generally, handle CRISv32.
 320         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 321         (struct cris_disasm_data): New type.
 322         (format_reg, format_hex, cris_constraint, print_flags)
 323         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 324         callers changed.
 325         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 326         (print_insn_crisv32_without_register_prefix)
 327         (print_insn_crisv10_v32_with_register_prefix)
 328         (print_insn_crisv10_v32_without_register_prefix)
 329         (cris_parse_disassembler_options): New functions.
 330         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 331         parameter.  All callers changed.
 332         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 333         failure.
 334         (cris_constraint) <case 'Y', 'U'>: New cases.
 335         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 336         for constraint 'n'.
 337         (print_with_operands) <case 'Y'>: New case.
 338         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 339         <case 'N', 'Y', 'Q'>: New cases.
 340         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 341         (print_insn_cris_with_register_prefix)
 342         (print_insn_cris_without_register_prefix): Call
 343         cris_parse_disassembler_options.
 344         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 345         for CRISv32 and the size of immediate operands.  New v32-only
 346         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 347         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 348         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 349         Change brp to be v3..v10.
 350         (cris_support_regs): New vector.
 351         (cris_opcodes): Update head comment.  New format characters '[',
 352         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 353         Add new opcodes for v32 and adjust existing opcodes to accommodate
 354         differences to earlier variants.
 355         (cris_cond15s): New vector.
 356
 357 2004-11-04 Jan Beulich <jbeulich@novell.com>
 358
 359         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 360         (indirEb): Remove.
 361         (Mp): Use f_mode rather than none at all.
 362         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 363         replaces what previously was x_mode; x_mode now means 128-bit SSE
 364         operands.
 365         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 366         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 367         pinsrw's second operand is Edqw.
 368         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 369         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 370         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 371         mode when an operand size override is present or always suffixing.
 372         More instructions will need to be added to this group.
 373         (putop): Handle new macro chars 'C' (short/long suffix selector),
 374         'I' (Intel mode override for following macro char), and 'J' (for
 375         adding the 'l' prefix to far branches in AT&T mode). When an
 376         alternative was specified in the template, honor macro character when
 377         specified for Intel mode.
 378         (OP_E): Handle new *_mode values. Correct pointer specifications for
 379         memory operands. Consolidate output of index register.
 380         (OP_G): Handle new *_mode values.
 381         (OP_I): Handle const_1_mode.
 382         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 383         respective opcode prefix bits have been consumed.
 384         (OP_EM, OP_EX): Provide some default handling for generating pointer
 385         specifications.
 386
 387 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 388
 389         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 390         COP_INST macro.
 391
 392 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 393
 394         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 395         (getregliststring): Support HI/LO and user registers.
 396         * crx-opc.c (crx_instruction): Update data structure according to the
 397         rearrangement done in CRX opcode header file.
 398         (crx_regtab):  Likewise.
 399         (crx_optab):  Likewise.
 400         (crx_instruction): Reorder load/stor instructions, remove unsupported
 401         formats.
 402         support new Co-Processor instruction 'cpi'.
 403
 404 2004-10-27  Nick Clifton  <nickc@redhat.com>
 405
 406         * opcodes/iq2000-asm.c: Regenerate.
 407         * opcodes/iq2000-desc.c: Regenerate.
 408         * opcodes/iq2000-desc.h: Regenerate.
 409         * opcodes/iq2000-dis.c: Regenerate.
 410         * opcodes/iq2000-ibld.c: Regenerate.
 411         * opcodes/iq2000-opc.c: Regenerate.
 412         * opcodes/iq2000-opc.h: Regenerate.
 413
 414 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 415
 416         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 417         us4, us5 (respectively).
 418         Remove unsupported 'popa' instruction.
 419         Reverse operands order in store co-processor instructions.
 420
 421 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 422
 423         * Makefile.am: Run "make dep-am"
 424         * Makefile.in: Regenerate.
 425
 426 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 427
 428         * xtensa-dis.c: Use ISO C90 formatting.
 429
 430 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 431
 432         * ppc-opc.c: Revert 2004-09-09 change.
 433
 434 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 435
 436         * xtensa-dis.c (state_names): Delete.
 437         (fetch_data): Use xtensa_isa_maxlength.
 438         (print_xtensa_operand): Replace operand parameter with opcode/operand
 439         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 440         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 441         instruction bundles.  Use xmalloc instead of malloc.
 442
 443 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 444
 445         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 446         initializers.
 447
 448 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 449
 450         * crx-opc.c (crx_instruction): Support Co-processor insns.
 451         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 452         (getregliststring): Change function to use the above enum.
 453         (print_arg): Handle CO-Processor insns.
 454         (crx_cinvs): Add 'b' option to invalidate the branch-target
 455         cache.
 456
 457 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 458
 459         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 460         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 461         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 462         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 463         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 464
 465 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 466
 467         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 468         rather than add it.
 469
 470 2004-09-30  Paul Brook  <paul@codesourcery.com>
 471
 472         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 473         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 474
 475 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 476
 477         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 478         (CONFIG_STATUS_DEPENDENCIES): New.
 479         (Makefile): Removed.
 480         (config.status): Likewise.
 481         * Makefile.in: Regenerated.
 482
 483 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 484
 485         * Makefile.am: Run "make dep-am".
 486         * Makefile.in: Regenerate.
 487         * aclocal.m4: Regenerate.
 488         * configure: Regenerate.
 489         * po/POTFILES.in: Regenerate.
 490         * po/opcodes.pot: Regenerate.
 491
 492 2004-09-11  Andreas Schwab  <schwab@suse.de>
 493
 494         * configure: Rebuild.
 495
 496 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 497
 498         * ppc-opc.c (L): Make this field not optional.
 499
 500 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 501
 502         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 503         Fix parameter to 'm[t|f]csr' insns.
 504
 505 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 506
 507         * configure.in: Autoupdate to autoconf 2.59.
 508         * aclocal.m4: Rebuild with aclocal 1.4p6.
 509         * configure: Rebuild with autoconf 2.59.
 510         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 511         bfd changes for autoconf 2.59 on the way).
 512         * config.in: Rebuild with autoheader 2.59.
 513
 514 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 515
 516         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 517
 518 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 519
 520         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 521         (GRPPADLCK2): New define.
 522         (twobyte_has_modrm): True for 0xA6.
 523         (grps): GRPPADLCK2 for opcode 0xA6.
 524
 525 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 526
 527         Introduce SH2a support.
 528         * sh-opc.h (arch_sh2a_base): Renumber.
 529         (arch_sh2a_nofpu_base): Remove.
 530         (arch_sh_base_mask): Adjust.
 531         (arch_opann_mask): New.
 532         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 533         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 534         (sh_table): Adjust whitespace.
 535         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 536         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 537         instruction list throughout.
 538         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 539         of arch_sh2a in instruction list throughout.
 540         (arch_sh2e_up): Accomodate above changes.
 541         (arch_sh2_up): Ditto.
 542         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 543         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 544         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 545         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 546         * sh-opc.h (arch_sh2a_nofpu): New.
 547         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 548         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 549         instruction.
 550         2004-01-20  DJ Delorie  <dj@redhat.com>
 551         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 552         2003-12-29  DJ Delorie  <dj@redhat.com>
 553         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 554         sh_opcode_info, sh_table): Add sh2a support.
 555         (arch_op32): New, to tag 32-bit opcodes.
 556         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 557         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 558         * sh-opc.h (arch_sh2a): Add.
 559         * sh-dis.c (arch_sh2a): Handle.
 560         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 561
 562 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 563
 564         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 565
 566 2004-07-22  Nick Clifton  <nickc@redhat.com>
 567
 568         PR/280
 569         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 570         insns - this is done by objdump itself.
 571         * h8500-dis.c (print_insn_h8500): Likewise.
 572
 573 2004-07-21  Jan Beulich <jbeulich@novell.com>
 574
 575         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 576         regardless of address size prefix in effect.
 577         (ptr_reg): Size or address registers does not depend on rex64, but
 578         on the presence of an address size override.
 579         (OP_MMX): Use rex.x only for xmm registers.
 580         (OP_EM): Use rex.z only for xmm registers.
 581
 582 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 583
 584         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 585         move/branch operations to the bottom so that VR5400 multimedia
 586         instructions take precedence in disassembly.
 587
 588 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 589
 590         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 591         ISA-specific "break" encoding.
 592
 593 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 594
 595         * arm-opc.h: Fix typo in comment.
 596
 597 2004-07-11  Andreas Schwab  <schwab@suse.de>
 598
 599         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 600
 601 2004-07-09  Andreas Schwab  <schwab@suse.de>
 602
 603         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 604
 605 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 606
 607         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 608         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 609         (crx-dis.lo): New target.
 610         (crx-opc.lo): Likewise.
 611         * Makefile.in: Regenerate.
 612         * configure.in: Handle bfd_crx_arch.
 613         * configure: Regenerate.
 614         * crx-dis.c: New file.
 615         * crx-opc.c: New file.
 616         * disassemble.c (ARCH_crx): Define.
 617         (disassembler): Handle ARCH_crx.
 618
 619 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 620
 621         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 622         * ia64-asmtab.c: Regnerate.
 623
 624 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 625
 626         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 627         (extract_fxm): Don't test dialect.
 628         (XFXFXM_MASK): Include the power4 bit.
 629         (XFXM): Add p4 param.
 630         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 631
 632 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 633
 634         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 635         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 636
 637 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 638
 639         * ppc-opc.c (BH, XLBH_MASK): Define.
 640         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 641
 642 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 643
 644         * i386-dis.c (x_mode): Comment.
 645         (two_source_ops): File scope.
 646         (float_mem): Correct fisttpll and fistpll.
 647         (float_mem_mode): New table.
 648         (dofloat): Use it.
 649         (OP_E): Correct intel mode PTR output.
 650         (ptr_reg): Use open_char and close_char.
 651         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 652         operands.  Set two_source_ops.
 653
 654 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 655
 656         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 657         instead of _raw_size.
 658
 659 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 660
 661         * ia64-gen.c (in_iclass): Handle more postinc st
 662         and ld variants.
 663         * ia64-asmtab.c: Rebuilt.
 664
 665 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 666
 667         * s390-opc.txt: Correct architecture mask for some opcodes.
 668         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 669         in the esa mode as well.
 670
 671 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 672
 673         * sh-dis.c (target_arch): Make unsigned.
 674         (print_insn_sh): Replace (most of) switch with a call to
 675         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 676         * sh-opc.h: Redefine architecture flags values.
 677         Add sh3-nommu architecture.
 678         Reorganise <arch>_up macros so they make more visual sense.
 679         (SH_MERGE_ARCH_SET): Define new macro.
 680         (SH_VALID_BASE_ARCH_SET): Likewise.
 681         (SH_VALID_MMU_ARCH_SET): Likewise.
 682         (SH_VALID_CO_ARCH_SET): Likewise.
 683         (SH_VALID_ARCH_SET): Likewise.
 684         (SH_MERGE_ARCH_SET_VALID): Likewise.
 685         (SH_ARCH_SET_HAS_FPU): Likewise.
 686         (SH_ARCH_SET_HAS_DSP): Likewise.
 687         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 688         (sh_get_arch_from_bfd_mach): Add prototype.
 689         (sh_get_arch_up_from_bfd_mach): Likewise.
 690         (sh_get_bfd_mach_from_arch_set): Likewise.
 691         (sh_merge_bfd_arc): Likewise.
 692
 693 2004-05-24  Peter Barada  <peter@the-baradas.com>
 694
 695         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 696         into new match_insn_m68k function.  Loop over canidate
 697         matches and select first that completely matches.
 698         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 699         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 700         to verify addressing for MAC/EMAC.
 701         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 702         reigster halves since 'fpu' and 'spl' look misleading.
 703         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 704         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 705         first, tighten up match masks.
 706         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 707         'size' from special case code in print_insn_m68k to
 708         determine decode size of insns.
 709
 710 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 711
 712         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 713         well as when -mpower4.
 714
 715 2004-05-13  Nick Clifton  <nickc@redhat.com>
 716
 717         * po/fr.po: Updated French translation.
 718
 719 2004-05-05  Peter Barada  <peter@the-baradas.com>
 720
 721         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 722         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 723         * m68k-op.c: Switch from ColdFire chips to core variants.
 724
 725 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 726
 727         PR 147.
 728         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 729
 730 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 731
 732         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 733         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 734
 735 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 736
 737         * sh-dis.c (print_insn_sh): Print the value in constant pool
 738         as a symbol if it looks like a symbol.
 739
 740 2004-04-22  Peter Barada <peter@the-baradas.com>
 741
 742         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 743         appropriate ColdFire architectures.
 744         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 745         mask addressing.
 746         Add EMAC instructions, fix MAC instructions. Remove
 747         macmw/macml/msacmw/msacml instructions since mask addressing now
 748         supported.
 749
 750 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 751
 752         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 753         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 754         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 755         macro.  Adjust all users.
 756
 757 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 758
 759         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 760         separately.
 761
 762 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 763
 764         * m32r-asm.c: Regenerate.
 765
 766 2004-03-29  Stan Shebs  <shebs@apple.com>
 767
 768         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 769         used.
 770
 771 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 772
 773         * aclocal.m4: Regenerate.
 774         * config.in: Regenerate.
 775         * configure: Regenerate.
 776         * po/POTFILES.in: Regenerate.
 777         * po/opcodes.pot: Regenerate.
 778
 779 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 780
 781         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 782         PPC_OPERANDS_GPR_0.
 783         * ppc-opc.c (RA0): Define.
 784         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 785         (RAOPT): Rename from RAO.  Update all uses.
 786         (powerpc_opcodes): Use RA0 as appropriate.
 787
 788 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 789
 790         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 791
 792 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 793
 794         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 795
 796 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 797
 798         * i386-dis.c (GRPPLOCK): Delete.
 799         (grps): Delete GRPPLOCK entry.
 800
 801 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 802
 803         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 804         (M, Mp): Use OP_M.
 805         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 806         (GRPPADLCK): Define.
 807         (dis386): Use NOP_Fixup on "nop".
 808         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 809         (twobyte_has_modrm): Set for 0xa7.
 810         (padlock_table): Delete.  Move to..
 811         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 812         and clflush.
 813         (print_insn): Revert PADLOCK_SPECIAL code.
 814         (OP_E): Delete sfence, lfence, mfence checks.
 815
 816 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 817
 818         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 819         (INVLPG_Fixup): New function.
 820         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 821
 822 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 823
 824         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 825         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 826         (padlock_table): New struct with PadLock instructions.
 827         (print_insn): Handle PADLOCK_SPECIAL.
 828
 829 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 830
 831         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 832         (OP_E): Twiddle clflush to sfence here.
 833
 834 2004-03-08  Nick Clifton  <nickc@redhat.com>
 835
 836         * po/de.po: Updated German translation.
 837
 838 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 839
 840         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 841         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 842         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 843         accordingly.
 844
 845 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 846
 847         * frv-asm.c: Regenerate.
 848         * frv-desc.c: Regenerate.
 849         * frv-desc.h: Regenerate.
 850         * frv-dis.c: Regenerate.
 851         * frv-ibld.c: Regenerate.
 852         * frv-opc.c: Regenerate.
 853         * frv-opc.h: Regenerate.
 854
 855 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 856
 857         * frv-desc.c, frv-opc.c: Regenerate.
 858
 859 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 860
 861         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 862
 863 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 864
 865         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 866         Also correct mistake in the comment.
 867
 868 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 869
 870         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 871         ensure that double registers have even numbers.
 872         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 873         that reserved instruction 0xfffd does not decode the same
 874         as 0xfdfd (ftrv).
 875         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 876         REG_N refers to a double register.
 877         Add REG_N_B01 nibble type and use it instead of REG_NM
 878         in ftrv.
 879         Adjust the bit patterns in a few comments.
 880
 881 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 882
 883         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 884
 885 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 886
 887         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 888
 889 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 890
 891         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 892
 893 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 894
 895         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 896         mtivor32, mtivor33, mtivor34.
 897
 898 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 899
 900         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 901
 902 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 903
 904         * arm-opc.h Maverick accumulator register opcode fixes.
 905
 906 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 907
 908         * m32r-dis.c: Regenerate.
 909
 910 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 911
 912         * sh-opc.h (sh_table): "fsrra", not "fssra".
 913
 914 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 915
 916         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 917         contraints.
 918
 919 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 920
 921         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 922
 923 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 924
 925         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 926         1.  Don't print scale factor on AT&T mode when index missing.
 927
 928 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 929
 930         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 931         when loaded into XR registers.
 932
 933 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 934
 935         * frv-desc.h: Regenerate.
 936         * frv-desc.c: Regenerate.
 937         * frv-opc.c: Regenerate.
 938
 939 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 940
 941         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 942
 943 2004-01-09  Paul Brook  <paul@codesourcery.com>
 944
 945         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 946         specific opcodes.
 947
 948 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 949
 950         * Makefile.am (libopcodes_la_DEPENDENCIES)
 951         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 952         comment about the problem.
 953         * Makefile.in: Regenerate.
 954
 955 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 956
 957         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 958         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 959         cut&paste errors in shifting/truncating numerical operands.
 960         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 961         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 962         (parse_uslo16): Likewise.
 963         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 964         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 965         (parse_s12): Likewise.
 966         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 967         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 968         (parse_uslo16): Likewise.
 969         (parse_uhi16): Parse gothi and gotfuncdeschi.
 970         (parse_d12): Parse got12 and gotfuncdesc12.
 971         (parse_s12): Likewise.
 972
 973 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 974
 975         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 976         instruction which looks similar to an 'rla' instruction.
 977
 978 For older changes see ChangeLog-0203
 979 \f
 980 Local Variables:
 981 mode: change-log
 982 left-margin: 8
 983 fill-column: 74
 984 version-control: never
 985 End: