1 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
3 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
5 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
7 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
9 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
11 * arm-dis.c (neon_opcodes): Add support for AES instructions.
13 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
15 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
18 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
20 * arm-dis.c (coprocessor_opcodes): Add VRINT.
21 (neon_opcodes): Likewise.
23 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
25 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
27 (neon_opcodes): Likewise.
29 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
31 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
32 (neon_opcodes): Likewise.
34 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
36 * arm-dis.c (coprocessor_opcodes): Add VSEL.
37 (print_insn_coprocessor): Add new %<>c bitfield format
40 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
42 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
43 (thumb32_opcodes): Likewise.
44 (print_arm_insn): Add support for %<>T formatter.
46 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
48 * arm-dis.c (arm_opcodes): Add HLT.
49 (thumb_opcodes): Likewise.
51 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
53 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
55 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
57 * arm-dis.c (arm_opcodes): Add SEVL.
58 (thumb_opcodes): Likewise.
59 (thumb32_opcodes): Likewise.
61 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
63 * arm-dis.c (data_barrier_option): New function.
64 (print_insn_arm): Use data_barrier_option.
65 (print_insn_thumb32): Use data_barrier_option.
67 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
69 * arm-dis.c (COND_UNCOND): New constant.
70 (print_insn_coprocessor): Add support for %u format specifier.
71 (print_insn_neon): Likewise.
73 2012-08-21 David S. Miller <davem@davemloft.net>
75 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
78 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
80 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
81 vabsduh, vabsduw, mviwsplt.
83 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
85 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
88 * i386-opc.h: Update CpuPRFCHW comment.
90 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
91 * i386-init.h: Regenerated.
92 * i386-tbl.h: Likewise.
94 2012-08-17 Nick Clifton <nickc@redhat.com>
96 * po/uk.po: New Ukranian translation.
97 * configure.in (ALL_LINGUAS): Add uk.
98 * configure: Regenerate.
100 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
102 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
103 RBX for the third operand.
104 <"lswi">: Use RAX for second and NBI for the third operand.
106 2012-08-15 DJ Delorie <dj@redhat.com>
108 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
109 operands, so that data addresses can be corrected when not
111 * rl78-decode.c: Regenerate.
112 * rl78-dis.c (print_insn_rl78): Make order of modifiers
113 irrelevent. When the 'e' specifier is used on an operand and no
114 ES prefix is provided, adjust address to make it absolute.
116 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
118 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
120 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
122 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
124 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
126 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
127 macros, use local variables for info struct member accesses,
128 update the type of the variable used to hold the instruction
130 (print_insn_mips, print_mips16_insn_arg): Likewise.
131 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
132 local variables for info struct member accesses.
133 (print_insn_micromips): Add GET_OP_S local macro.
134 (_print_insn_mips): Update the type of the variable used to hold
135 the instruction word.
137 2012-08-13 Ian Bolton <ian.bolton@arm.com>
138 Laurent Desnogues <laurent.desnogues@arm.com>
139 Jim MacArthur <jim.macarthur@arm.com>
140 Marcus Shawcroft <marcus.shawcroft@arm.com>
141 Nigel Stephens <nigel.stephens@arm.com>
142 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
143 Richard Earnshaw <rearnsha@arm.com>
144 Sofiane Naci <sofiane.naci@arm.com>
145 Tejas Belagod <tejas.belagod@arm.com>
146 Yufeng Zhang <yufeng.zhang@arm.com>
148 * Makefile.am: Add AArch64.
149 * Makefile.in: Regenerate.
150 * aarch64-asm.c: New file.
151 * aarch64-asm.h: New file.
152 * aarch64-dis.c: New file.
153 * aarch64-dis.h: New file.
154 * aarch64-gen.c: New file.
155 * aarch64-opc.c: New file.
156 * aarch64-opc.h: New file.
157 * aarch64-tbl.h: New file.
158 * configure.in: Add AArch64.
159 * configure: Regenerate.
160 * disassemble.c: Add AArch64.
161 * aarch64-asm-2.c: New file (automatically generated).
162 * aarch64-dis-2.c: New file (automatically generated).
163 * aarch64-opc-2.c: New file (automatically generated).
164 * po/POTFILES.in: Regenerate.
166 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
168 * micromips-opc.c (micromips_opcodes): Update comment.
169 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
170 instructions for IOCT as appropriate.
171 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
173 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
174 the result of a check for the -Wno-missing-field-initializers
176 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
177 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
179 (mips16-opc.lo): Likewise.
180 (micromips-opc.lo): Likewise.
181 * aclocal.m4: Regenerate.
182 * configure: Regenerate.
183 * Makefile.in: Regenerate.
185 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
188 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
189 * i386-init.h: Regenerated.
191 2012-08-09 Nick Clifton <nickc@redhat.com>
193 * po/vi.po: Updated Vietnamese translation.
195 2012-08-07 Roland McGrath <mcgrathr@google.com>
197 * i386-dis.c (reg_table): Fill out REG_0F0D table with
198 AMD-reserved cases as "prefetch".
199 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
200 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
201 (reg_table): Use those under REG_0F18.
202 (mod_table): Add those cases as "nop/reserved".
204 2012-08-07 Jan Beulich <jbeulich@suse.com>
206 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
208 2012-08-06 Roland McGrath <mcgrathr@google.com>
210 * i386-dis.c (print_insn): Print spaces between multiple excess
211 prefixes. Return actual number of excess prefixes consumed,
214 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
216 2012-08-06 Roland McGrath <mcgrathr@google.com>
217 Victor Khimenko <khim@google.com>
218 H.J. Lu <hongjiu.lu@intel.com>
220 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
221 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
222 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
223 (OP_E_register): Likewise.
224 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
226 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
228 * configure.in: Formatting.
229 * configure: Regenerate.
231 2012-08-01 Alan Modra <amodra@gmail.com>
233 * h8300-dis.c: Fix printf arg warnings.
234 * i960-dis.c: Likewise.
235 * mips-dis.c: Likewise.
236 * pdp11-dis.c: Likewise.
237 * sh-dis.c: Likewise.
238 * v850-dis.c: Likewise.
239 * configure.in: Formatting.
240 * configure: Regenerate.
241 * rl78-decode.c: Regenerate.
242 * po/POTFILES.in: Regenerate.
244 2012-07-31 Chao-Ying Fu <fu@mips.com>
245 Catherine Moore <clm@codesourcery.com>
246 Maciej W. Rozycki <macro@codesourcery.com>
248 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
249 (DSP_VOLA): Likewise.
250 (D32, D33): Likewise.
251 (micromips_opcodes): Add DSP ASE instructions.
252 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
253 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
255 2012-07-31 Jan Beulich <jbeulich@suse.com>
257 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
258 instruction group. Mark as requiring AVX2.
259 * i386-tbl.h: Re-generate.
261 2012-07-30 Nick Clifton <nickc@redhat.com>
263 * po/opcodes.pot: Updated template.
264 * po/es.po: Updated Spanish translation.
265 * po/fi.po: Updated Finnish translation.
267 2012-07-27 Mike Frysinger <vapier@gentoo.org>
269 * configure.in (BFD_VERSION): Run bfd/configure --version and
270 parse the output of that.
271 * configure: Regenerate.
273 2012-07-25 James Lemke <jwlemke@codesourcery.com>
275 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
277 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
278 Dr David Alan Gilbert <dave@treblig.org>
281 * arm-dis.c: Add necessary casts for printing integer values.
282 Use %s when printing string values.
283 * hppa-dis.c: Likewise.
284 * m68k-dis.c: Likewise.
285 * microblaze-dis.c: Likewise.
286 * mips-dis.c: Likewise.
287 * sparc-dis.c: Likewise.
289 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
292 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
293 (VEX_LEN_0FXOP_08_CD): Likewise.
294 (VEX_LEN_0FXOP_08_CE): Likewise.
295 (VEX_LEN_0FXOP_08_CF): Likewise.
296 (VEX_LEN_0FXOP_08_EC): Likewise.
297 (VEX_LEN_0FXOP_08_ED): Likewise.
298 (VEX_LEN_0FXOP_08_EE): Likewise.
299 (VEX_LEN_0FXOP_08_EF): Likewise.
300 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
301 vpcomub, vpcomuw, vpcomud, vpcomuq.
302 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
303 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
304 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
307 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
309 * i386-dis.c (PREFIX_0F38F6): New.
310 (prefix_table): Add adcx, adox instructions.
311 (three_byte_table): Use PREFIX_0F38F6.
312 (mod_table): Add rdseed instruction.
313 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
314 (cpu_flags): Likewise.
315 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
316 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
317 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
319 * i386-tbl.h: Regenerate.
320 * i386-init.h: Likewise.
322 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
324 * mips-dis.c: Remove gratuitous newline.
326 2012-07-05 Sean Keys <skeys@ipdatasys.com>
328 * xgate-dis.c: Removed an IF statement that will
329 always be false due to overlapping operand masks.
330 * xgate-opc.c: Corrected 'com' opcode entry and
333 2012-07-02 Roland McGrath <mcgrathr@google.com>
335 * i386-opc.tbl: Add RepPrefixOk to nop.
336 * i386-tbl.h: Regenerate.
338 2012-06-28 Nick Clifton <nickc@redhat.com>
340 * po/vi.po: Updated Vietnamese translation.
342 2012-06-22 Roland McGrath <mcgrathr@google.com>
344 * i386-opc.tbl: Add RepPrefixOk to ret.
345 * i386-tbl.h: Regenerate.
347 * i386-opc.h (RepPrefixOk): New enum constant.
348 (i386_opcode_modifier): New bitfield 'repprefixok'.
349 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
350 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
351 instructions that have IsString.
352 * i386-tbl.h: Regenerate.
354 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
356 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
357 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
358 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
359 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
360 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
361 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
362 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
363 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
364 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
366 2012-05-19 Alan Modra <amodra@gmail.com>
368 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
369 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
371 2012-05-18 Alan Modra <amodra@gmail.com>
373 * ia64-opc.c: Remove #include "ansidecl.h".
374 * z8kgen.c: Include sysdep.h first.
376 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
377 * bfin-dis.c: Likewise.
378 * i860-dis.c: Likewise.
379 * ia64-dis.c: Likewise.
380 * ia64-gen.c: Likewise.
381 * m68hc11-dis.c: Likewise.
382 * mmix-dis.c: Likewise.
383 * msp430-dis.c: Likewise.
384 * or32-dis.c: Likewise.
385 * rl78-dis.c: Likewise.
386 * rx-dis.c: Likewise.
387 * tic4x-dis.c: Likewise.
388 * tilegx-opc.c: Likewise.
389 * tilepro-opc.c: Likewise.
390 * rx-decode.c: Regenerate.
392 2012-05-17 James Lemke <jwlemke@codesourcery.com>
394 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
396 2012-05-17 James Lemke <jwlemke@codesourcery.com>
398 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
400 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
401 Nick Clifton <nickc@redhat.com>
404 * configure.in: Add check that sysdep.h has been included before
405 any system header files.
406 * configure: Regenerate.
407 * config.in: Regenerate.
408 * sysdep.h: Generate an error if included before config.h.
409 * alpha-opc.c: Include sysdep.h before any other header file.
410 * alpha-dis.c: Likewise.
411 * avr-dis.c: Likewise.
412 * cgen-opc.c: Likewise.
413 * cr16-dis.c: Likewise.
414 * cris-dis.c: Likewise.
415 * crx-dis.c: Likewise.
416 * d10v-dis.c: Likewise.
417 * d10v-opc.c: Likewise.
418 * d30v-dis.c: Likewise.
419 * d30v-opc.c: Likewise.
420 * h8500-dis.c: Likewise.
421 * i370-dis.c: Likewise.
422 * i370-opc.c: Likewise.
423 * m10200-dis.c: Likewise.
424 * m10300-dis.c: Likewise.
425 * micromips-opc.c: Likewise.
426 * mips-opc.c: Likewise.
427 * mips61-opc.c: Likewise.
428 * moxie-dis.c: Likewise.
429 * or32-opc.c: Likewise.
430 * pj-dis.c: Likewise.
431 * ppc-dis.c: Likewise.
432 * ppc-opc.c: Likewise.
433 * s390-dis.c: Likewise.
434 * sh-dis.c: Likewise.
435 * sh64-dis.c: Likewise.
436 * sparc-dis.c: Likewise.
437 * sparc-opc.c: Likewise.
438 * spu-dis.c: Likewise.
439 * tic30-dis.c: Likewise.
440 * tic54x-dis.c: Likewise.
441 * tic80-dis.c: Likewise.
442 * tic80-opc.c: Likewise.
443 * tilegx-dis.c: Likewise.
444 * tilepro-dis.c: Likewise.
445 * v850-dis.c: Likewise.
446 * v850-opc.c: Likewise.
447 * vax-dis.c: Likewise.
448 * w65-dis.c: Likewise.
449 * xgate-dis.c: Likewise.
450 * xtensa-dis.c: Likewise.
451 * rl78-decode.opc: Likewise.
452 * rl78-decode.c: Regenerate.
453 * rx-decode.opc: Likewise.
454 * rx-decode.c: Regenerate.
456 2012-05-17 Alan Modra <amodra@gmail.com>
458 * ppc_dis.c: Don't include elf/ppc.h.
460 2012-05-16 Meador Inge <meadori@codesourcery.com>
462 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
465 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
466 Stephane Carrez <stcarrez@nerim.fr>
468 * configure.in: Add S12X and XGATE co-processor support to m68hc11
470 * disassemble.c: Likewise.
471 * configure: Regenerate.
472 * m68hc11-dis.c: Make objdump output more consistent, use hex
473 instead of decimal and use 0x prefix for hex.
474 * m68hc11-opc.c: Add S12X and XGATE opcodes.
476 2012-05-14 James Lemke <jwlemke@codesourcery.com>
478 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
479 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
480 (vle_opcd_indices): New array.
481 (lookup_vle): New function.
482 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
483 (print_insn_powerpc): Likewise.
484 * ppc-opc.c: Likewise.
486 2012-05-14 Catherine Moore <clm@codesourcery.com>
487 Maciej W. Rozycki <macro@codesourcery.com>
488 Rhonda Wittels <rhonda@codesourcery.com>
489 Nathan Froyd <froydnj@codesourcery.com>
491 * ppc-opc.c (insert_arx, extract_arx): New functions.
492 (insert_ary, extract_ary): New functions.
493 (insert_li20, extract_li20): New functions.
494 (insert_rx, extract_rx): New functions.
495 (insert_ry, extract_ry): New functions.
496 (insert_sci8, extract_sci8): New functions.
497 (insert_sci8n, extract_sci8n): New functions.
498 (insert_sd4h, extract_sd4h): New functions.
499 (insert_sd4w, extract_sd4w): New functions.
500 (insert_vlesi, extract_vlesi): New functions.
501 (insert_vlensi, extract_vlensi): New functions.
502 (insert_vleui, extract_vleui): New functions.
503 (insert_vleil, extract_vleil): New functions.
504 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
505 (BI16, BI32, BO32, B8): New.
506 (B15, B24, CRD32, CRS): New.
507 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
508 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
509 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
510 (SH6_MASK): Use PPC_OPSHIFT_INV.
511 (SI8, UI5, OIMM5, UI7, BO16): New.
512 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
513 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
515 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
516 (OPVUP, OPVUP_MASK OPVUP): New
517 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
518 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
519 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
520 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
521 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
522 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
523 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
524 (SE_IM5, SE_IM5_MASK): New.
525 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
526 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
527 (BO32DNZ, BO32DZ): New.
528 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
530 (powerpc_opcodes): Add new VLE instructions. Update existing
531 instruction to include PPCVLE if supported.
532 * ppc-dis.c (ppc_opts): Add vle entry.
533 (get_powerpc_dialect): New function.
534 (powerpc_init_dialect): VLE support.
535 (print_insn_big_powerpc): Call get_powerpc_dialect.
536 (print_insn_little_powerpc): Likewise.
537 (operand_value_powerpc): Handle negative shift counts.
538 (print_insn_powerpc): Handle 2-byte instruction lengths.
540 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
543 * configure.in: Invoke ACX_HEADER_STRING.
544 * configure: Regenerate.
545 * config.in: Regenerate.
546 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
547 string.h and strings.h.
549 2012-05-11 Nick Clifton <nickc@redhat.com>
552 * arm-dis.c (print_insn): Fix detection of instruction mode in
553 files containing multiple executable sections.
555 2012-05-03 Sean Keys <skeys@ipdatasys.com>
557 * Makefile.in, configure: regenerate
558 * disassemble.c (disassembler): Recognize ARCH_XGATE.
559 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
561 * configure.in: Recognize xgate.
562 * xgate-dis.c, xgate-opc.c: New files for support of xgate
563 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
564 and opcode generation for xgate.
566 2012-04-30 DJ Delorie <dj@redhat.com>
568 * rx-decode.opc (MOV): Do not sign-extend immediates which are
569 already the maximum bit size.
570 * rx-decode.c: Regenerate.
572 2012-04-27 David S. Miller <davem@davemloft.net>
574 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
575 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
577 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
578 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
580 * sparc-opc.c (CBCOND): New define.
581 (CBCOND_XCC): Likewise.
582 (cbcond): New helper macro.
583 (sparc_opcodes): Add compare-and-branch instructions.
585 * sparc-dis.c (print_insn_sparc): Handle ')'.
586 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
588 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
589 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
591 2012-04-12 David S. Miller <davem@davemloft.net>
593 * sparc-dis.c (X_DISP10): Define.
594 (print_insn_sparc): Handle '='.
596 2012-04-01 Mike Frysinger <vapier@gentoo.org>
598 * bfin-dis.c (fmtconst): Replace decimal handling with a single
599 sprintf call and the '*' field width.
601 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
603 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
605 2012-03-16 Alan Modra <amodra@gmail.com>
607 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
608 (powerpc_opcd_indices): Bump array size.
609 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
610 corresponding to unused opcodes to following entry.
611 (lookup_powerpc): New function, extracted and optimised from..
612 (print_insn_powerpc): ..here.
614 2012-03-15 Alan Modra <amodra@gmail.com>
615 James Lemke <jwlemke@codesourcery.com>
617 * disassemble.c (disassemble_init_for_target): Handle ppc init.
618 * ppc-dis.c (private): New var.
619 (powerpc_init_dialect): Don't return calloc failure, instead use
621 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
622 (powerpc_opcd_indices): New array.
623 (disassemble_init_powerpc): New function.
624 (print_insn_big_powerpc): Don't init dialect here.
625 (print_insn_little_powerpc): Likewise.
626 (print_insn_powerpc): Start search using powerpc_opcd_indices.
628 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
630 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
631 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
632 (PPCVEC2, PPCTMR, E6500): New short names.
633 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
634 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
635 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
636 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
637 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
638 optional operands on sync instruction for E6500 target.
640 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
642 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
644 2012-02-27 Alan Modra <amodra@gmail.com>
646 * mt-dis.c: Regenerate.
648 2012-02-27 Alan Modra <amodra@gmail.com>
650 * v850-opc.c (extract_v8): Rearrange to make it obvious this
651 is the inverse of corresponding insert function.
652 (extract_d22, extract_u9, extract_r4): Likewise.
653 (extract_d9): Correct sign extension.
654 (extract_d16_15): Don't assume "long" is 32 bits, and don't
655 rely on implementation defined behaviour for shift right of
657 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
658 (extract_d23): Likewise, and correct mask.
660 2012-02-27 Alan Modra <amodra@gmail.com>
662 * crx-dis.c (print_arg): Mask constant to 32 bits.
663 * crx-opc.c (cst4_map): Use int array.
665 2012-02-27 Alan Modra <amodra@gmail.com>
667 * arc-dis.c (BITS): Don't use shifts to mask off bits.
668 (FIELDD): Sign extend with xor,sub.
670 2012-02-25 Walter Lee <walt@tilera.com>
672 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
673 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
674 TILEPRO_OPC_LW_TLS_SN.
676 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
678 * i386-opc.h (HLEPrefixNone): New.
679 (HLEPrefixLock): Likewise.
680 (HLEPrefixAny): Likewise.
681 (HLEPrefixRelease): Likewise.
683 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
685 * i386-dis.c (HLE_Fixup1): New.
686 (HLE_Fixup2): Likewise.
687 (HLE_Fixup3): Likewise.
694 (MOD_C6_REG_7): Likewise.
695 (MOD_C7_REG_7): Likewise.
696 (RM_C6_REG_7): Likewise.
697 (RM_C7_REG_7): Likewise.
698 (XACQUIRE_PREFIX): Likewise.
699 (XRELEASE_PREFIX): Likewise.
700 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
701 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
702 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
703 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
704 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
705 MOD_C6_REG_7 and MOD_C7_REG_7.
706 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
707 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
709 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
710 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
712 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
714 (cpu_flags): Add CpuHLE and CpuRTM.
715 (opcode_modifiers): Add HLEPrefixOk.
717 * i386-opc.h (CpuHLE): New.
719 (HLEPrefixOk): Likewise.
720 (i386_cpu_flags): Add cpuhle and cpurtm.
721 (i386_opcode_modifier): Add hleprefixok.
723 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
724 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
725 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
726 operand. Add xacquire, xrelease, xabort, xbegin, xend and
728 * i386-init.h: Regenerated.
729 * i386-tbl.h: Likewise.
731 2012-01-24 DJ Delorie <dj@redhat.com>
733 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
734 * rl78-decode.c: Regenerate.
736 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
739 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
741 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
743 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
744 register and move them after pmove with PSR/PCSR register.
746 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
748 * i386-dis.c (mod_table): Add vmfunc.
750 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
751 (cpu_flags): CpuVMFUNC.
753 * i386-opc.h (CpuVMFUNC): New.
754 (i386_cpu_flags): Add cpuvmfunc.
756 * i386-opc.tbl: Add vmfunc.
757 * i386-init.h: Regenerated.
758 * i386-tbl.h: Likewise.
760 For older changes see ChangeLog-2011
766 version-control: never