23e030435d7b9349bc9aebfbd6c57b130abea10c
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2006-04-26 Julian Brown <julian@codesourcery.com>
2
3 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
4 VMOV.
5
6 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
7 Julian Brown <julian@codesourcery.com>
8
9 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
10 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
11 Add unified load/store instruction names.
12 (neon_opcode_table): New.
13 (arm_opcodes): Expand meaning of %<bitfield>['`?].
14 (arm_decode_bitfield): New.
15 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
16 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
17 (print_insn_neon): New.
18 (print_insn_arm): Adjust print_insn_coprocessor call. Call
19 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
20 (print_insn_thumb32): Likewise.
21
22 2006-04-19 Alan Modra <amodra@bigpond.net.au>
23
24 * Makefile.am: Run "make dep-am".
25 * Makefile.in: Regenerate.
26
27 2006-04-19 Alan Modra <amodra@bigpond.net.au>
28
29 * avr-dis.c (avr_operand): Warning fix.
30
31 * configure: Regenerate.
32
33 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
34
35 * po/POTFILES.in: Regenerated.
36
37 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
38
39 PR binutils/2454
40 * avr-dis.c (avr_operand): Arrange for a comment to appear before
41 the symolic form of an address, so that the output of objdump -d
42 can be reassembled.
43
44 2006-04-10 DJ Delorie <dj@redhat.com>
45
46 * m32c-asm.c: Regenerate.
47
48 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
49
50 * Makefile.am: Add install-html target.
51 * Makefile.in: Regenerate.
52
53 2006-04-06 Nick Clifton <nickc@redhat.com>
54
55 * po/vi/po: Updated Vietnamese translation.
56
57 2006-03-31 Paul Koning <ni1d@arrl.net>
58
59 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
60
61 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
62
63 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
64 logic to identify halfword shifts.
65
66 2006-03-16 Paul Brook <paul@codesourcery.com>
67
68 * arm-dis.c (arm_opcodes): Rename swi to svc.
69 (thumb_opcodes): Ditto.
70
71 2006-03-13 DJ Delorie <dj@redhat.com>
72
73 * m32c-asm.c: Regenerate.
74 * m32c-desc.c: Likewise.
75 * m32c-desc.h: Likewise.
76 * m32c-dis.c: Likewise.
77 * m32c-ibld.c: Likewise.
78 * m32c-opc.c: Likewise.
79 * m32c-opc.h: Likewise.
80
81 2006-03-10 DJ Delorie <dj@redhat.com>
82
83 * m32c-desc.c: Regenerate with mul.l, mulu.l.
84 * m32c-opc.c: Likewise.
85 * m32c-opc.h: Likewise.
86
87
88 2006-03-09 Nick Clifton <nickc@redhat.com>
89
90 * po/sv.po: Updated Swedish translation.
91
92 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
93
94 PR binutils/2428
95 * i386-dis.c (REP_Fixup): New function.
96 (AL): Remove duplicate.
97 (Xbr): New.
98 (Xvr): Likewise.
99 (Ybr): Likewise.
100 (Yvr): Likewise.
101 (indirDXr): Likewise.
102 (ALr): Likewise.
103 (eAXr): Likewise.
104 (dis386): Updated entries of ins, outs, movs, lods and stos.
105
106 2006-03-05 Nick Clifton <nickc@redhat.com>
107
108 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
109 signed 32-bit value into an unsigned 32-bit field when the host is
110 a 64-bit machine.
111 * fr30-ibld.c: Regenerate.
112 * frv-ibld.c: Regenerate.
113 * ip2k-ibld.c: Regenerate.
114 * iq2000-asm.c: Regenerate.
115 * iq2000-ibld.c: Regenerate.
116 * m32c-ibld.c: Regenerate.
117 * m32r-ibld.c: Regenerate.
118 * openrisc-ibld.c: Regenerate.
119 * xc16x-ibld.c: Regenerate.
120 * xstormy16-ibld.c: Regenerate.
121
122 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
123
124 * xc16x-asm.c: Regenerate.
125 * xc16x-dis.c: Regenerate.
126
127 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
128
129 * po/Make-in: Add html target.
130
131 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
132
133 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
134 Intel Merom New Instructions.
135 (THREE_BYTE_0): Likewise.
136 (THREE_BYTE_1): Likewise.
137 (three_byte_table): Likewise.
138 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
139 THREE_BYTE_1 for entry 0x3a.
140 (twobyte_has_modrm): Updated.
141 (twobyte_uses_SSE_prefix): Likewise.
142 (print_insn): Handle 3-byte opcodes used by Intel Merom New
143 Instructions.
144
145 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
146
147 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
148 (v9_hpriv_reg_names): New table.
149 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
150 New cases '$' and '%' for read/write hyperprivileged register.
151 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
152 window handling and rdhpr/wrhpr instructions.
153
154 2006-02-24 DJ Delorie <dj@redhat.com>
155
156 * m32c-desc.c: Regenerate with linker relaxation attributes.
157 * m32c-desc.h: Likewise.
158 * m32c-dis.c: Likewise.
159 * m32c-opc.c: Likewise.
160
161 2006-02-24 Paul Brook <paul@codesourcery.com>
162
163 * arm-dis.c (arm_opcodes): Add V7 instructions.
164 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
165 (print_arm_address): New function.
166 (print_insn_arm): Use it. Add 'P' and 'U' cases.
167 (psr_name): New function.
168 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
169
170 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
171
172 * ia64-opc-i.c (bXc): New.
173 (mXc): Likewise.
174 (OpX2TaTbYaXcC): Likewise.
175 (TF). Likewise.
176 (TFCM). Likewise.
177 (ia64_opcodes_i): Add instructions for tf.
178
179 * ia64-opc.h (IMMU5b): New.
180
181 * ia64-asmtab.c: Regenerated.
182
183 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
184
185 * ia64-gen.c: Update copyright years.
186 * ia64-opc-b.c: Likewise.
187
188 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
189
190 * ia64-gen.c (lookup_regindex): Handle ".vm".
191 (print_dependency_table): Handle '\"'.
192
193 * ia64-ic.tbl: Updated from SDM 2.2.
194 * ia64-raw.tbl: Likewise.
195 * ia64-waw.tbl: Likewise.
196 * ia64-asmtab.c: Regenerated.
197
198 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
199
200 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
201 Anil Paranjape <anilp1@kpitcummins.com>
202 Shilin Shakti <shilins@kpitcummins.com>
203
204 * xc16x-desc.h: New file
205 * xc16x-desc.c: New file
206 * xc16x-opc.h: New file
207 * xc16x-opc.c: New file
208 * xc16x-ibld.c: New file
209 * xc16x-asm.c: New file
210 * xc16x-dis.c: New file
211 * Makefile.am: Entries for xc16x
212 * Makefile.in: Regenerate
213 * cofigure.in: Add xc16x target information.
214 * configure: Regenerate.
215 * disassemble.c: Add xc16x target information.
216
217 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
218
219 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
220 moves.
221
222 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
223
224 * i386-dis.c ('Z'): Add a new macro.
225 (dis386_twobyte): Use "movZ" for control register moves.
226
227 2006-02-10 Nick Clifton <nickc@redhat.com>
228
229 * iq2000-asm.c: Regenerate.
230
231 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
232
233 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
234
235 2006-01-26 David Ung <davidu@mips.com>
236
237 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
238 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
239 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
240 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
241 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
242
243 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
244
245 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
246 ld_d_r, pref_xd_cb): Use signed char to hold data to be
247 disassembled.
248 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
249 buffer overflows when disassembling instructions like
250 ld (ix+123),0x23
251 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
252 operand, if the offset is negative.
253
254 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
255
256 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
257 unsigned char to hold data to be disassembled.
258
259 2006-01-17 Andreas Schwab <schwab@suse.de>
260
261 PR binutils/1486
262 * disassemble.c (disassemble_init_for_target): Set
263 disassembler_needs_relocs for bfd_arch_arm.
264
265 2006-01-16 Paul Brook <paul@codesourcery.com>
266
267 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
268 f?add?, and f?sub? instructions.
269
270 2006-01-16 Nick Clifton <nickc@redhat.com>
271
272 * po/zh_CN.po: New Chinese (simplified) translation.
273 * configure.in (ALL_LINGUAS): Add "zh_CH".
274 * configure: Regenerate.
275
276 2006-01-05 Paul Brook <paul@codesourcery.com>
277
278 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
279
280 2006-01-06 DJ Delorie <dj@redhat.com>
281
282 * m32c-desc.c: Regenerate.
283 * m32c-opc.c: Regenerate.
284 * m32c-opc.h: Regenerate.
285
286 2006-01-03 DJ Delorie <dj@redhat.com>
287
288 * cgen-ibld.in (extract_normal): Avoid memory range errors.
289 * m32c-ibld.c: Regenerated.
290
291 For older changes see ChangeLog-2005
292 \f
293 Local Variables:
294 mode: change-log
295 left-margin: 8
296 fill-column: 74
297 version-control: never
298 End:
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