opcodes/ChangeLog

   1 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
   2
   3         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
   4
   5 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
   6
   7         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
   8         encode1, rflt, crc16, and crc32 instructions.
   9         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
  10         (arc_flag_classes): Add C_NPS_R.
  11         (insert_nps_bitop_size_2b): New function.
  12         (extract_nps_bitop_size_2b): Likewise.
  13         (insert_nps_bitop_uimm8): Likewise.
  14         (extract_nps_bitop_uimm8): Likewise.
  15         (arc_operands): Add new operand entries.
  16
  17 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
  18
  19         * arc-regs.h: Add a new subclass field.  Add double assist
  20         accumulator register values.
  21         * arc-tbl.h: Use DPA subclass to mark the double assist
  22         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
  23         * arc-opc.c (RSP): Define instead of SP.
  24         (arc_aux_regs): Add the subclass field.
  25
  26 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
  27
  28         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
  29
  30 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
  31
  32         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
  33         NPS_R_SRC1.
  34
  35 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
  36
  37         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
  38         issues.  No functional changes.
  39
  40 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
  41
  42         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
  43         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
  44         (RTT): Remove duplicate.
  45         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
  46         (PCT_CONFIG*): Remove.
  47         (D1L, D1H, D2H, D2L): Define.
  48
  49 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
  50
  51         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
  52
  53 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
  54
  55         * arc-tbl.h (invld07): Remove.
  56         * arc-ext-tbl.h: New file.
  57         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
  58         * arc-opc.c (arc_opcodes): Add ext-tbl include.
  59
  60 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
  61
  62         Fix -Wstack-usage warnings.
  63         * aarch64-dis.c (print_operands): Substitute size.
  64         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
  65
  66 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
  67
  68         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
  69         to get a proper diagnostic when an invalid ASR register is used.
  70
  71 2016-03-22  Nick Clifton  <nickc@redhat.com>
  72
  73         * configure: Regenerate.
  74
  75 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  76
  77         * arc-nps400-tbl.h: New file.
  78         * arc-opc.c: Add top level comment.
  79         (insert_nps_3bit_dst): New function.
  80         (extract_nps_3bit_dst): New function.
  81         (insert_nps_3bit_src2): New function.
  82         (extract_nps_3bit_src2): New function.
  83         (insert_nps_bitop_size): New function.
  84         (extract_nps_bitop_size): New function.
  85         (arc_flag_operands): Add nps400 entries.
  86         (arc_flag_classes): Add nps400 entries.
  87         (arc_operands): Add nps400 entries.
  88         (arc_opcodes): Add nps400 include.
  89
  90 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  91
  92         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
  93         the new class enum values.
  94
  95 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  96
  97         * arc-dis.c (print_insn_arc): Handle nps400.
  98
  99 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 100
 101         * arc-opc.c (BASE): Delete.
 102
 103 2016-03-18  Nick Clifton  <nickc@redhat.com>
 104
 105         PR target/19721
 106         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 107         of MOV insn that aliases an ORR insn.
 108
 109 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 110
 111         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 112
 113 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 114
 115         * mcore-opc.h: Add const qualifiers.
 116         * microblaze-opc.h (struct op_code_struct): Likewise.
 117         * sh-opc.h: Likewise.
 118         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 119         (tic4x_print_op): Likewise.
 120
 121 2016-03-02  Alan Modra  <amodra@gmail.com>
 122
 123         * or1k-desc.h: Regenerate.
 124         * fr30-ibld.c: Regenerate.
 125         * rl78-decode.c: Regenerate.
 126
 127 2016-03-01  Nick Clifton  <nickc@redhat.com>
 128
 129         PR target/19747
 130         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 131
 132 2016-02-24  Renlin Li  <renlin.li@arm.com>
 133
 134         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 135         (print_insn_coprocessor): Support fp16 instructions.
 136
 137 2016-02-24  Renlin Li  <renlin.li@arm.com>
 138
 139         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 140         vminnm, vrint(mpna).
 141
 142 2016-02-24  Renlin Li  <renlin.li@arm.com>
 143
 144         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 145         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 146
 147 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 148
 149         * i386-dis.c (print_insn): Parenthesize expression to prevent
 150         truncated addresses.
 151         (OP_J): Likewise.
 152
 153 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 154             Janek van Oirschot  <jvanoirs@synopsys.com>
 155
 156         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 157         variable.
 158
 159 2016-02-04  Nick Clifton  <nickc@redhat.com>
 160
 161         PR target/19561
 162         * msp430-dis.c (print_insn_msp430): Add a special case for
 163         decoding an RRC instruction with the ZC bit set in the extension
 164         word.
 165
 166 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 167
 168         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 169         * epiphany-ibld.c: Regenerate.
 170         * fr30-ibld.c: Regenerate.
 171         * frv-ibld.c: Regenerate.
 172         * ip2k-ibld.c: Regenerate.
 173         * iq2000-ibld.c: Regenerate.
 174         * lm32-ibld.c: Regenerate.
 175         * m32c-ibld.c: Regenerate.
 176         * m32r-ibld.c: Regenerate.
 177         * mep-ibld.c: Regenerate.
 178         * mt-ibld.c: Regenerate.
 179         * or1k-ibld.c: Regenerate.
 180         * xc16x-ibld.c: Regenerate.
 181         * xstormy16-ibld.c: Regenerate.
 182
 183 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 184
 185         * epiphany-dis.c: Regenerated from latest cpu files.
 186
 187 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 188
 189         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 190         test bit.
 191
 192 2016-01-25  Renlin Li  <renlin.li@arm.com>
 193
 194         * arm-dis.c (mapping_symbol_for_insn): New function.
 195         (find_ifthen_state): Call mapping_symbol_for_insn().
 196
 197 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 198
 199         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 200         of MSR UAO immediate operand.
 201
 202 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 203
 204         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 205         instruction support.
 206
 207 2016-01-17  Alan Modra  <amodra@gmail.com>
 208
 209         * configure: Regenerate.
 210
 211 2016-01-14  Nick Clifton  <nickc@redhat.com>
 212
 213         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 214         instructions that can support stack pointer operations.
 215         * rl78-decode.c: Regenerate.
 216         * rl78-dis.c: Fix display of stack pointer in MOVW based
 217         instructions.
 218
 219 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 220
 221         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 222         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 223         erxtatus_el1 and erxaddr_el1.
 224
 225 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 226
 227         * arm-dis.c (arm_opcodes): Add "esb".
 228         (thumb_opcodes): Likewise.
 229
 230 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 231
 232         * ppc-opc.c <xscmpnedp>: Delete.
 233         <xvcmpnedp>: Likewise.
 234         <xvcmpnedp.>: Likewise.
 235         <xvcmpnesp>: Likewise.
 236         <xvcmpnesp.>: Likewise.
 237
 238 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 239
 240         PR gas/13050
 241         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 242         addition to ISA_A.
 243
 244 2016-01-01  Alan Modra  <amodra@gmail.com>
 245
 246         Update year range in copyright notice of all files.
 247
 248 For older changes see ChangeLog-2015
 249 \f
 250 Copyright (C) 2016 Free Software Foundation, Inc.
 251
 252 Copying and distribution of this file, with or without modification,
 253 are permitted in any medium without royalty provided the copyright
 254 notice and this notice are preserved.
 255
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