opcodes/ChangeLog

   1 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
   2
   3         * po/Make-in (pdf, ps): New dummy targets.
   4
   5 2006-06-06  Paul Brook  <paul@codesourcery.com>
   6
   7         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
   8         instructions.
   9         (neon_opcodes): Add conditional execution specifiers.
  10         (thumb_opcodes): Ditto.
  11         (thumb32_opcodes): Ditto.
  12         (arm_conditional): Change 0xe to "al" and add "" to end.
  13         (ifthen_state, ifthen_next_state, ifthen_address): New.
  14         (IFTHEN_COND): Define.
  15         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
  16         (print_insn_arm): Change %c to use new values of arm_conditional.
  17         (print_insn_thumb16): Print thumb conditions.  Add %I.
  18         (print_insn_thumb32): Print thumb conditions.
  19         (find_ifthen_state): New function.
  20         (print_insn): Track IT block state.
  21
  22 2006-06-06  Ben Elliston  <bje@au.ibm.com>
  23             Anton Blanchard  <anton@samba.org>
  24             Peter Bergner  <bergner@vnet.ibm.com>
  25
  26         * ppc-dis.c (powerpc_dialect): Handle power6 option.
  27         (print_ppc_disassembler_options): Mention power6.
  28
  29 2006-06-06  Thiemo Seufer  <ths@mips.com>
  30             Chao-ying Fu  <fu@mips.com>
  31
  32         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
  33         * mips-opc.c: Add DSP64 instructions.
  34
  35 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
  36
  37         * m68hc11-dis.c (print_insn): Warning fix.
  38
  39 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
  40
  41         * po/Make-in (top_builddir): Define.
  42
  43 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
  44
  45         * Makefile.am: Run "make dep-am".
  46         * Makefile.in: Regenerate.
  47         * config.in: Regenerate.
  48
  49 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  50
  51         * Makefile.am (INCLUDES): Use @INCINTL@.
  52         * acinclude.m4: Include new gettext macros.
  53         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
  54         Remove local code for po/Makefile.
  55         * Makefile.in, aclocal.m4, configure: Regenerated.
  56
  57 2006-05-30  Nick Clifton  <nickc@redhat.com>
  58
  59         * po/es.po: Updated Spanish translation.
  60
  61 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
  62
  63         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
  64         and fmovem entries.  Put register list entries before immediate
  65         mask entries.  Use "l" rather than "L" in the fmovem entries.
  66         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
  67         out from INFO.
  68         (m68k_scan_mask): New function, split out from...
  69         (print_insn_m68k): ...here.  If no architecture has been set,
  70         first try printing an m680x0 instruction, then try a Coldfire one.
  71
  72 2006-05-24  Nick Clifton  <nickc@redhat.com>
  73
  74         * po/ga.po: Updated Irish translation.
  75
  76 2006-05-22  Nick Clifton  <nickc@redhat.com>
  77
  78         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
  79
  80 2006-05-22  Nick Clifton  <nickc@redhat.com>
  81
  82         * po/nl.po: Updated translation.
  83
  84 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
  85
  86         * avr-dis.c: Formatting fix.
  87
  88 2006-05-14  Thiemo Seufer  <ths@mips.com>
  89
  90         * mips16-opc.c (I1, I32, I64): New shortcut defines.
  91         (mips16_opcodes): Change membership of instructions to their
  92         lowest baseline ISA.
  93
  94 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
  95
  96         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
  97
  98 2006-05-05  Julian Brown  <julian@codesourcery.com>
  99
 100         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 101         vldm/vstm.
 102
 103 2006-05-05  Thiemo Seufer  <ths@mips.com>
 104             David Ung  <davidu@mips.com>
 105
 106         * mips-opc.c: Add macro for cache instruction.
 107
 108 2006-05-04  Thiemo Seufer  <ths@mips.com>
 109             Nigel Stephens  <nigel@mips.com>
 110             David Ung  <davidu@mips.com>
 111
 112         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 113         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 114         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 115         MIPS64R2.
 116         * mips-opc.c: fix random typos in comments.
 117         (INSN_SMARTMIPS): New defines.
 118         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 119         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 120         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 121         FP_S and FP_D flags to denote single and double register
 122         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 123         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 124         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 125         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 126         release 2 ISAs.
 127         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 128
 129 2006-05-03  Thiemo Seufer  <ths@mips.com>
 130
 131         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 132
 133 2006-05-02  Thiemo Seufer  <ths@mips.com>
 134             Nigel Stephens  <nigel@mips.com>
 135             David Ung  <davidu@mips.com>
 136
 137         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 138         (print_mips16_insn_arg): Force mips16 to odd addresses.
 139
 140 2006-04-30  Thiemo Seufer  <ths@mips.com>
 141             David Ung  <davidu@mips.com>
 142
 143         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 144         "udi0" to "udi15".
 145         * mips-dis.c (print_insn_args): Adds udi argument handling.
 146
 147 2006-04-28  James E Wilson  <wilson@specifix.com>
 148
 149         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 150         error message.
 151
 152 2006-04-28  Thiemo Seufer  <ths@mips.com>
 153             David Ung  <davidu@mips.com>
 154             Nigel Stephens  <nigel@mips.com>
 155
 156         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 157         names.
 158
 159 2006-04-28  Thiemo Seufer  <ths@mips.com>
 160             Nigel Stephens  <nigel@mips.com>
 161             David Ung  <davidu@mips.com>
 162
 163         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 164         (print_insn_mips):  Adjust print_insn_args call.
 165
 166 2006-04-28  Thiemo Seufer  <ths@mips.com>
 167             Nigel Stephens  <nigel@mips.com>
 168
 169         * mips-dis.c (print_insn_args): Print $fcc only for FP
 170         instructions, use $cc elsewise.
 171
 172 2006-04-28  Thiemo Seufer  <ths@mips.com>
 173             Nigel Stephens  <nigel@mips.com>
 174
 175         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 176         Map MIPS16 registers to O32 names.
 177         (print_mips16_insn_arg): Use mips16_reg_names.
 178
 179 2006-04-26  Julian Brown  <julian@codesourcery.com>
 180
 181         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 182         VMOV.
 183
 184 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 185             Julian Brown  <julian@codesourcery.com>
 186
 187         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 188         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 189         Add unified load/store instruction names.
 190         (neon_opcode_table): New.
 191         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 192         (arm_decode_bitfield): New.
 193         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 194         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 195         (print_insn_neon): New.
 196         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 197         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 198         (print_insn_thumb32): Likewise.
 199
 200 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 201
 202         * Makefile.am: Run "make dep-am".
 203         * Makefile.in: Regenerate.
 204
 205 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 206
 207         * avr-dis.c (avr_operand): Warning fix.
 208
 209         * configure: Regenerate.
 210
 211 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 212
 213         * po/POTFILES.in: Regenerated.
 214
 215 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 216
 217         PR binutils/2454
 218         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 219         the symolic form of an address, so that the output of objdump -d
 220         can be reassembled.
 221
 222 2006-04-10  DJ Delorie  <dj@redhat.com>
 223
 224         * m32c-asm.c: Regenerate.
 225
 226 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 227
 228         * Makefile.am: Add install-html target.
 229         * Makefile.in: Regenerate.
 230
 231 2006-04-06  Nick Clifton  <nickc@redhat.com>
 232
 233         * po/vi/po: Updated Vietnamese translation.
 234
 235 2006-03-31  Paul Koning  <ni1d@arrl.net>
 236
 237         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 238
 239 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 240
 241         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 242         logic to identify halfword shifts.
 243
 244 2006-03-16  Paul Brook  <paul@codesourcery.com>
 245
 246         * arm-dis.c (arm_opcodes): Rename swi to svc.
 247         (thumb_opcodes): Ditto.
 248
 249 2006-03-13  DJ Delorie  <dj@redhat.com>
 250
 251         * m32c-asm.c: Regenerate.
 252         * m32c-desc.c: Likewise.
 253         * m32c-desc.h: Likewise.
 254         * m32c-dis.c: Likewise.
 255         * m32c-ibld.c: Likewise.
 256         * m32c-opc.c: Likewise.
 257         * m32c-opc.h: Likewise.
 258
 259 2006-03-10  DJ Delorie  <dj@redhat.com>
 260
 261         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 262         * m32c-opc.c: Likewise.
 263         * m32c-opc.h: Likewise.
 264
 265
 266 2006-03-09  Nick Clifton  <nickc@redhat.com>
 267
 268         * po/sv.po: Updated Swedish translation.
 269
 270 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 271
 272         PR binutils/2428
 273         * i386-dis.c (REP_Fixup): New function.
 274         (AL): Remove duplicate.
 275         (Xbr): New.
 276         (Xvr): Likewise.
 277         (Ybr): Likewise.
 278         (Yvr): Likewise.
 279         (indirDXr): Likewise.
 280         (ALr): Likewise.
 281         (eAXr): Likewise.
 282         (dis386): Updated entries of ins, outs, movs, lods and stos.
 283
 284 2006-03-05  Nick Clifton  <nickc@redhat.com>
 285
 286         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 287         signed 32-bit value into an unsigned 32-bit field when the host is
 288         a 64-bit machine.
 289         * fr30-ibld.c: Regenerate.
 290         * frv-ibld.c: Regenerate.
 291         * ip2k-ibld.c: Regenerate.
 292         * iq2000-asm.c: Regenerate.
 293         * iq2000-ibld.c: Regenerate.
 294         * m32c-ibld.c: Regenerate.
 295         * m32r-ibld.c: Regenerate.
 296         * openrisc-ibld.c: Regenerate.
 297         * xc16x-ibld.c: Regenerate.
 298         * xstormy16-ibld.c: Regenerate.
 299
 300 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 301
 302         * xc16x-asm.c: Regenerate.
 303         * xc16x-dis.c: Regenerate.
 304
 305 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 306
 307         * po/Make-in: Add html target.
 308
 309 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 310
 311         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 312         Intel Merom New Instructions.
 313         (THREE_BYTE_0): Likewise.
 314         (THREE_BYTE_1): Likewise.
 315         (three_byte_table): Likewise.
 316         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 317         THREE_BYTE_1 for entry 0x3a.
 318         (twobyte_has_modrm): Updated.
 319         (twobyte_uses_SSE_prefix): Likewise.
 320         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 321         Instructions.
 322
 323 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 324
 325         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 326         (v9_hpriv_reg_names): New table.
 327         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 328         New cases '$' and '%' for read/write hyperprivileged register.
 329         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 330         window handling and rdhpr/wrhpr instructions.
 331
 332 2006-02-24  DJ Delorie  <dj@redhat.com>
 333
 334         * m32c-desc.c: Regenerate with linker relaxation attributes.
 335         * m32c-desc.h: Likewise.
 336         * m32c-dis.c: Likewise.
 337         * m32c-opc.c: Likewise.
 338
 339 2006-02-24  Paul Brook  <paul@codesourcery.com>
 340
 341         * arm-dis.c (arm_opcodes): Add V7 instructions.
 342         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 343         (print_arm_address): New function.
 344         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 345         (psr_name): New function.
 346         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 347
 348 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 349
 350         * ia64-opc-i.c (bXc): New.
 351         (mXc): Likewise.
 352         (OpX2TaTbYaXcC): Likewise.
 353         (TF). Likewise.
 354         (TFCM). Likewise.
 355         (ia64_opcodes_i): Add instructions for tf.
 356
 357         * ia64-opc.h (IMMU5b): New.
 358
 359         * ia64-asmtab.c: Regenerated.
 360
 361 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 362
 363         * ia64-gen.c: Update copyright years.
 364         * ia64-opc-b.c: Likewise.
 365
 366 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 367
 368         * ia64-gen.c (lookup_regindex): Handle ".vm".
 369         (print_dependency_table): Handle '\"'.
 370
 371         * ia64-ic.tbl: Updated from SDM 2.2.
 372         * ia64-raw.tbl: Likewise.
 373         * ia64-waw.tbl: Likewise.
 374         * ia64-asmtab.c: Regenerated.
 375
 376         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 377
 378 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 379             Anil Paranjape   <anilp1@kpitcummins.com>
 380             Shilin Shakti    <shilins@kpitcummins.com>
 381
 382         * xc16x-desc.h: New file
 383         * xc16x-desc.c: New file
 384         * xc16x-opc.h: New file
 385         * xc16x-opc.c: New file
 386         * xc16x-ibld.c: New file
 387         * xc16x-asm.c: New file
 388         * xc16x-dis.c: New file
 389         * Makefile.am: Entries for xc16x
 390         * Makefile.in: Regenerate
 391         * cofigure.in: Add xc16x target information.
 392         * configure: Regenerate.
 393         * disassemble.c: Add xc16x target information.
 394
 395 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 396
 397         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 398         moves.
 399
 400 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 401
 402         * i386-dis.c ('Z'): Add a new macro.
 403         (dis386_twobyte): Use "movZ" for control register moves.
 404
 405 2006-02-10  Nick Clifton  <nickc@redhat.com>
 406
 407         * iq2000-asm.c: Regenerate.
 408
 409 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 410
 411         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 412
 413 2006-01-26  David Ung  <davidu@mips.com>
 414
 415         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 416         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 417         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 418         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 419         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 420
 421 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 422
 423         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 424         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 425         disassembled.
 426         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 427         buffer overflows when disassembling instructions like
 428         ld (ix+123),0x23
 429         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 430         operand, if the offset is negative.
 431
 432 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 433
 434         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 435         unsigned char to hold data to be disassembled.
 436
 437 2006-01-17  Andreas Schwab  <schwab@suse.de>
 438
 439         PR binutils/1486
 440         * disassemble.c (disassemble_init_for_target): Set
 441         disassembler_needs_relocs for bfd_arch_arm.
 442
 443 2006-01-16  Paul Brook  <paul@codesourcery.com>
 444
 445         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 446         f?add?, and f?sub? instructions.
 447
 448 2006-01-16  Nick Clifton  <nickc@redhat.com>
 449
 450         * po/zh_CN.po: New Chinese (simplified) translation.
 451         * configure.in (ALL_LINGUAS): Add "zh_CH".
 452         * configure: Regenerate.
 453
 454 2006-01-05  Paul Brook  <paul@codesourcery.com>
 455
 456         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 457
 458 2006-01-06  DJ Delorie  <dj@redhat.com>
 459
 460         * m32c-desc.c: Regenerate.
 461         * m32c-opc.c: Regenerate.
 462         * m32c-opc.h: Regenerate.
 463
 464 2006-01-03  DJ Delorie  <dj@redhat.com>
 465
 466         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 467         * m32c-ibld.c: Regenerated.
 468
 469 For older changes see ChangeLog-2005
 470 \f
 471 Local Variables:
 472 mode: change-log
 473 left-margin: 8
 474 fill-column: 74
 475 version-control: never
 476 End: