opcodes/ChangeLog

   1 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c: Add 0F to VEX opcode enums.
   4
   5 2010-07-27  DJ Delorie  <dj@redhat.com>
   6
   7         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
   8         (rx_decode_opcode): Likewise.
   9         * rx-decode.c: Regenerate.
  10
  11 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  12             Ina Pandit  <ina.pandit@kpitcummins.com>
  13
  14         * v850-dis.c (v850_sreg_names): Updated structure for system
  15         registers.
  16         (float_cc_names): new structure for condition codes.
  17         (print_value): Update the function that prints value.
  18         (get_operand_value): New function to get the operand value.
  19         (disassemble): Updated to handle the disassembly of instructions.
  20         (print_insn_v850): Updated function to print instruction for different
  21         families.
  22         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
  23         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
  24         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
  25         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
  26         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
  27         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
  28         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
  29         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
  30         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
  31         (v850_operands): Update with the relocation name. Also update
  32         the instructions with specific set of processors.
  33
  34 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
  35
  36         * arm-dis.c (print_insn_arm): Add cases for printing more
  37         symbolic operands.
  38         (print_insn_thumb32): Likewise.
  39
  40 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  41
  42         * mips-dis.c (print_insn_mips): Correct branch instruction type
  43         determination.
  44
  45 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  46
  47         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
  48         type and delay slot determination.
  49         (print_insn_mips16): Extend branch instruction type and delay
  50         slot determination to cover all instructions.
  51         * mips16-opc.c (BR): Remove macro.
  52         (UBR, CBR): New macros.
  53         (mips16_opcodes): Update branch annotation for "b", "beqz",
  54         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
  55         and "jrc".
  56
  57 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  58
  59         AVX Programming Reference (June, 2010)
  60         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
  61         * i386-opc.tbl: Likewise.
  62         * i386-tbl.h: Regenerated.
  63
  64 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  65
  66         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
  67
  68 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
  69
  70         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
  71         ppc_cpu_t before inverting.
  72         (ppc_parse_cpu): Likewise.
  73         (print_insn_powerpc): Likewise.
  74
  75 2010-07-03  Alan Modra  <amodra@gmail.com>
  76
  77         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
  78         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
  79         (PPC64, MFDEC2): Update.
  80         (NON32, NO371): Define.
  81         (powerpc_opcode): Update to not use old opcode flags, and avoid
  82         -m601 duplicates.
  83
  84 2010-07-03  DJ Delorie  <dj@delorie.com>
  85
  86         * m32c-ibld.c: Regenerate.
  87
  88 2010-07-03  Alan Modra  <amodra@gmail.com>
  89
  90         * ppc-opc.c (PWR2COM): Define.
  91         (PPCPWR2): Add PPC_OPCODE_COMMON.
  92         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
  93         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
  94         "rac" from -mcom.
  95
  96 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         AVX Programming Reference (June, 2010)
  99         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 100         (PREFIX_0FAE_REG_1): Likewise.
 101         (PREFIX_0FAE_REG_2): Likewise.
 102         (PREFIX_0FAE_REG_3): Likewise.
 103         (PREFIX_VEX_3813): Likewise.
 104         (PREFIX_VEX_3A1D): Likewise.
 105         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 106         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 107         PREFIX_VEX_3A1D.
 108         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 109         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 110         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 111
 112         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 113         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 114         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 115
 116         * i386-opc.h (CpuXsaveopt): New.
 117         (CpuFSGSBase): Likewise.
 118         (CpuRdRnd): Likewise.
 119         (CpuF16C): Likewise.
 120         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 121         cpuf16c.
 122
 123         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 124         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 125         * i386-init.h: Regenerated.
 126         * i386-tbl.h: Likewise.
 127
 128 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 129
 130         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 131         and mtocrf on EFS.
 132
 133 2010-06-29  Alan Modra  <amodra@gmail.com>
 134
 135         * maxq-dis.c: Delete file.
 136         * Makefile.am: Remove references to maxq.
 137         * configure.in: Likewise.
 138         * disassemble.c: Likewise.
 139         * Makefile.in: Regenerate.
 140         * configure: Regenerate.
 141         * po/POTFILES.in: Regenerate.
 142
 143 2010-06-29  Alan Modra  <amodra@gmail.com>
 144
 145         * mep-dis.c: Regenerate.
 146
 147 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 148
 149         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 150
 151 2010-06-27  Alan Modra  <amodra@gmail.com>
 152
 153         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 154         (decodeInstr): Likewise.
 155         * dlx-dis.c (print_insn_dlx): Likewise.
 156         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 157         * maxq-dis.c (check_move, print_insn): Likewise.
 158         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 159         * msp430-dis.c (msp430_branchinstr): Likewise.
 160         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 161         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 162         * sparc-dis.c (print_insn_sparc): Likewise.
 163         * fr30-asm.c: Regenerate.
 164         * frv-asm.c: Regenerate.
 165         * ip2k-asm.c: Regenerate.
 166         * iq2000-asm.c: Regenerate.
 167         * lm32-asm.c: Regenerate.
 168         * m32c-asm.c: Regenerate.
 169         * m32r-asm.c: Regenerate.
 170         * mep-asm.c: Regenerate.
 171         * mt-asm.c: Regenerate.
 172         * openrisc-asm.c: Regenerate.
 173         * xc16x-asm.c: Regenerate.
 174         * xstormy16-asm.c: Regenerate.
 175
 176 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 177
 178         PR gas/11673
 179         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 180
 181 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 182
 183         PR binutils/11676
 184         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 185
 186 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 187
 188         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 189         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 190         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 191         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 192         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 193         Treat lwsync as msync on e500.
 194
 195 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 196
 197         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 198
 199 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 200
 201         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 202         constants is the same on 32-bit and 64-bit hosts.
 203
 204 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 205
 206         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 207         .short directives so that they can be reassembled.
 208
 209 2010-05-26  Catherine Moore <clm@codesourcery.com>
 210             David Ung  <davidu@mips.com>
 211
 212         * mips-opc.c: Change membership to I1 for instructions ssnop and
 213         ehb.
 214
 215 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 216
 217         * i386-dis.c (sib): New.
 218         (get_sib): Likewise.
 219         (print_insn): Call get_sib.
 220         OP_E_memory): Use sib.
 221
 222 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 223
 224         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 225         * mips-opc.c (I16): Remove.
 226         (mips_builtin_op): Reclassify jalx.
 227
 228 2010-05-19  Alan Modra  <amodra@gmail.com>
 229
 230         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 231         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 232
 233 2010-05-13  Alan Modra  <amodra@gmail.com>
 234
 235         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 236
 237 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 238
 239         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 240         format.
 241         (print_insn_thumb16): Add support for new %W format.
 242
 243 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 244
 245         * Makefile.in: Regenerate with automake 1.11.1.
 246         * aclocal.m4: Ditto.
 247
 248 2010-05-05  Nick Clifton  <nickc@redhat.com>
 249
 250         * po/es.po: Updated Spanish translation.
 251
 252 2010-04-22  Nick Clifton  <nickc@redhat.com>
 253
 254         * po/opcodes.pot: Updated by the Translation project.
 255         * po/vi.po: Updated Vietnamese translation.
 256
 257 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 258
 259         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 260         bits in opcode.
 261
 262 2010-04-09  Nick Clifton  <nickc@redhat.com>
 263
 264         * i386-dis.c (print_insn): Remove unused variable op.
 265         (OP_sI): Remove unused variable mask.
 266
 267 2010-04-07  Alan Modra  <amodra@gmail.com>
 268
 269         * configure: Regenerate.
 270
 271 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 272
 273         * ppc-opc.c (RBOPT): New define.
 274         ("dccci"): Enable for PPCA2.  Make operands optional.
 275         ("iccci"): Likewise.  Do not deprecate for PPC476.
 276
 277 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 278
 279         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 280
 281 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 282
 283         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 284         * Makefile.in: Regenerate.
 285         * configure.in (bfd_tic6x_arch): New.
 286         * configure: Regenerate.
 287         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 288         (disassembler): Handle TI C6X.
 289         * tic6x-dis.c: New.
 290
 291 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 292
 293         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 294
 295 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 296
 297         * dis-buf.c (buffer_read_memory): Give error for reading just
 298         before the start of memory.
 299
 300 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 301             Quentin Neill <quentin.neill@amd.com>
 302
 303         * i386-dis.c (OP_LWP_I): Removed.
 304         (reg_table): Do not use OP_LWP_I, use Iq.
 305         (OP_LWPCB_E): Remove use of names16.
 306         (OP_LWP_E): Same.
 307         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 308         should not set the Vex.length bit.
 309         * i386-tbl.h: Regenerated.
 310
 311 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 312
 313         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 314
 315 2010-02-24  Nick Clifton  <nickc@redhat.com>
 316
 317         PR binutils/6773
 318         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 319         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 320         (thumb32_opcodes): Likewise.
 321
 322 2010-02-15  Nick Clifton  <nickc@redhat.com>
 323
 324         * po/vi.po: Updated Vietnamese translation.
 325
 326 2010-02-12  Doug Evans  <dje@sebabeach.org>
 327
 328         * lm32-opinst.c: Regenerate.
 329
 330 2010-02-11  Doug Evans  <dje@sebabeach.org>
 331
 332         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 333         (print_address): Delete CGEN_PRINT_ADDRESS.
 334         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 335         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 336         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 337         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 338
 339         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 340         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 341         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 342         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 343         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 344         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 345         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 346         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 347         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 348         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 349         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 350         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 351
 352 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 353
 354         * i386-dis.c: Update copyright.
 355         * i386-gen.c: Likewise.
 356         * i386-opc.h: Likewise.
 357         * i386-opc.tbl: Likewise.
 358
 359 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 360             Sebastian Pop  <sebastian.pop@amd.com>
 361
 362         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 363         function to handle 5th imm8 operand.
 364         (PREFIX_VEX_3A48): Added.
 365         (PREFIX_VEX_3A49): Added.
 366         (VEX_W_3A48_P_2): Added.
 367         (VEX_W_3A49_P_2): Added.
 368         (prefix table): Added entries for PREFIX_VEX_3A48
 369         and PREFIX_VEX_3A49.
 370         (vex table): Added entries for VEX_W_3A48_P_2 and
 371         and VEX_W_3A49_P_2.
 372         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 373         for Vec_Imm4 operands.
 374         * i386-opc.h (enum): Added Vec_Imm4.
 375         (i386_operand_type): Added vec_imm4.
 376         * i386-opc.tbl: Add entries for vpermilp[ds].
 377         * i386-init.h: Regenerated.
 378         * i386-tbl.h: Regenerated.
 379
 380 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 381
 382         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 383         and "pwr7".  Move "a2" into alphabetical order.
 384
 385 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 386
 387         * ppc-dis.c (ppc_opts): Add titan entry.
 388         * ppc-opc.c (TITAN, MULHW): Define.
 389         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 390
 391 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 392
 393         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 394         to CPU_BDVER1_FLAGS
 395         * i386-init.h: Regenerated.
 396
 397 2010-02-03  Anthony Green  <green@moxielogic.com>
 398
 399         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 400         0x0f, and make 0x00 an illegal instruction.
 401
 402 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 403
 404         * opcodes/arm-dis.c (struct arm_private_data): New.
 405         (print_insn_coprocessor, print_insn_arm): Update to use struct
 406         arm_private_data.
 407         (is_mapping_symbol, get_map_sym_type): New functions.
 408         (get_sym_code_type): Check the symbol's section.  Do not check
 409         mapping symbols.
 410         (print_insn): Default to disassembling ARM mode code.  Check
 411         for mapping symbols separately from other symbols.  Use
 412         struct arm_private_data.
 413
 414 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 415
 416         * i386-dis.c (EXVexWdqScalar): New.
 417         (vex_scalar_w_dq_mode): Likewise.
 418         (prefix_table): Update entries for PREFIX_VEX_3899,
 419         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 420         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 421         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 422         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 423         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 424         (OP_EX): Likewise.
 425
 426 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 427
 428         * i386-dis.c (XMScalar): New.
 429         (EXdScalar): Likewise.
 430         (EXqScalar): Likewise.
 431         (EXqScalarS): Likewise.
 432         (VexScalar): Likewise.
 433         (EXdVexScalarS): Likewise.
 434         (EXqVexScalarS): Likewise.
 435         (XMVexScalar): Likewise.
 436         (scalar_mode): Likewise.
 437         (d_scalar_mode): Likewise.
 438         (d_scalar_swap_mode): Likewise.
 439         (q_scalar_mode): Likewise.
 440         (q_scalar_swap_mode): Likewise.
 441         (vex_scalar_mode): Likewise.
 442         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 443         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 444         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 445         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 446         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 447         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 448         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 449         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 450         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 451         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 452         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 453         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 454         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 455         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 456         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 457         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 458         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 459         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 460         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 461         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 462         q_scalar_mode, q_scalar_swap_mode.
 463         (OP_XMM): Handle scalar_mode.
 464         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 465         and q_scalar_swap_mode.
 466         (OP_VEX): Handle vex_scalar_mode.
 467
 468 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 469
 470         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 471
 472 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 473
 474         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 475
 476 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 477
 478         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 479
 480 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 481
 482         * i386-dis.c (Bad_Opcode): New.
 483         (bad_opcode): Likewise.
 484         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 485         (dis386_twobyte): Likewise.
 486         (reg_table): Likewise.
 487         (prefix_table): Likewise.
 488         (x86_64_table): Likewise.
 489         (vex_len_table): Likewise.
 490         (vex_w_table): Likewise.
 491         (mod_table): Likewise.
 492         (rm_table): Likewise.
 493         (float_reg): Likewise.
 494         (reg_table): Remove trailing "(bad)" entries.
 495         (prefix_table): Likewise.
 496         (x86_64_table): Likewise.
 497         (vex_len_table): Likewise.
 498         (vex_w_table): Likewise.
 499         (mod_table): Likewise.
 500         (rm_table): Likewise.
 501         (get_valid_dis386): Handle bytemode 0.
 502
 503 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 504
 505         * i386-opc.h (VEXScalar): New.
 506
 507         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 508         instructions.
 509         * i386-tbl.h: Regenerated.
 510
 511 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 512
 513         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 514
 515         * i386-opc.tbl: Add xsave64 and xrstor64.
 516         * i386-tbl.h: Regenerated.
 517
 518 2010-01-20  Nick Clifton  <nickc@redhat.com>
 519
 520         PR 11170
 521         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 522         based post-indexed addressing.
 523
 524 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 525
 526         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 527         * i386-tbl.h: Regenerated.
 528
 529 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 530
 531         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 532         comments.
 533
 534 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 535
 536         * i386-dis.c (names_mm): New.
 537         (intel_names_mm): Likewise.
 538         (att_names_mm): Likewise.
 539         (names_xmm): Likewise.
 540         (intel_names_xmm): Likewise.
 541         (att_names_xmm): Likewise.
 542         (names_ymm): Likewise.
 543         (intel_names_ymm): Likewise.
 544         (att_names_ymm): Likewise.
 545         (print_insn): Set names_mm, names_xmm and names_ymm.
 546         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 547         (OP_XMM): Likewise.
 548         (OP_EM): Likewise.
 549         (OP_EMC): Likewise.
 550         (OP_MXC): Likewise.
 551         (OP_EX): Likewise.
 552         (XMM_Fixup): Likewise.
 553         (OP_VEX): Likewise.
 554         (OP_EX_VexReg): Likewise.
 555         (OP_Vex_2src): Likewise.
 556         (OP_Vex_2src_1): Likewise.
 557         (OP_Vex_2src_2): Likewise.
 558         (OP_REG_VexI4): Likewise.
 559
 560 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 561
 562         * i386-dis.c (print_insn): Update comments.
 563
 564 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 565
 566         * i386-dis.c (rex_original): Removed.
 567         (ckprefix): Remove rex_original.
 568         (print_insn): Update comments.
 569
 570 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 571
 572         * Makefile.in: Regenerate.
 573         * configure: Regenerate.
 574
 575 2010-01-07  Doug Evans  <dje@sebabeach.org>
 576
 577         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 578         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 579         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 580         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 581         * xstormy16-ibld.c: Regenerate.
 582
 583 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 584
 585         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 586         * i386-init.h: Regenerated.
 587
 588 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 589
 590         * arm-dis.c (print_insn): Fixed search for next symbol and data
 591         dumping condition, and the initial mapping symbol state.
 592
 593 2010-01-05  Doug Evans  <dje@sebabeach.org>
 594
 595         * cgen-ibld.in: #include "cgen/basic-modes.h".
 596         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 597         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 598         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 599         * xstormy16-ibld.c: Regenerate.
 600
 601 2010-01-04  Nick Clifton  <nickc@redhat.com>
 602
 603         PR 11123
 604         * arm-dis.c (print_insn_coprocessor): Initialise value.
 605
 606 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 607
 608         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 609
 610 2010-01-02  Doug Evans  <dje@sebabeach.org>
 611
 612         * cgen-asm.in: Update copyright year.
 613         * cgen-dis.in: Update copyright year.
 614         * cgen-ibld.in: Update copyright year.
 615         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 616         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 617         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 618         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 619         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 620         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 621         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 622         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 623         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 624         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 625         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 626         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 627         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 628         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 629         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 630         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 631         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 632         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 633         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 634         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 635         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 636
 637 For older changes see ChangeLog-2009
 638 \f
 639 Local Variables:
 640 mode: change-log
 641 left-margin: 8
 642 fill-column: 74
 643 version-control: never
 644 End: