opcodes/ChangeLog

   1 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
   2
   3         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
   4         rather than add it.
   5
   6 2004-09-30  Paul Brook  <paul@codesourcery.com>
   7
   8         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
   9         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
  10
  11 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
  12
  13         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
  14         (CONFIG_STATUS_DEPENDENCIES): New.
  15         (Makefile): Removed.
  16         (config.status): Likewise.
  17         * Makefile.in: Regenerated.
  18
  19 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
  20
  21         * Makefile.am: Run "make dep-am".
  22         * Makefile.in: Regenerate.
  23         * aclocal.m4: Regenerate.
  24         * configure: Regenerate.
  25         * po/POTFILES.in: Regenerate.
  26         * po/opcodes.pot: Regenerate.
  27
  28 2004-09-11  Andreas Schwab  <schwab@suse.de>
  29
  30         * configure: Rebuild.
  31
  32 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
  33
  34         * ppc-opc.c (L): Make this field not optional.
  35
  36 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
  37
  38         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
  39         Fix parameter to 'm[t|f]csr' insns.
  40
  41 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
  42
  43         * configure.in: Autoupdate to autoconf 2.59.
  44         * aclocal.m4: Rebuild with aclocal 1.4p6.
  45         * configure: Rebuild with autoconf 2.59.
  46         * Makefile.in: Rebuild with automake 1.4p6 (picking up
  47         bfd changes for autoconf 2.59 on the way).
  48         * config.in: Rebuild with autoheader 2.59.
  49
  50 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
  51
  52         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
  53
  54 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
  55
  56         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
  57         (GRPPADLCK2): New define.
  58         (twobyte_has_modrm): True for 0xA6.
  59         (grps): GRPPADLCK2 for opcode 0xA6.
  60
  61 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
  62
  63         Introduce SH2a support.
  64         * sh-opc.h (arch_sh2a_base): Renumber.
  65         (arch_sh2a_nofpu_base): Remove.
  66         (arch_sh_base_mask): Adjust.
  67         (arch_opann_mask): New.
  68         (arch_sh2a, arch_sh2a_nofpu): Adjust.
  69         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
  70         (sh_table): Adjust whitespace.
  71         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
  72         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
  73         instruction list throughout.
  74         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
  75         of arch_sh2a in instruction list throughout.
  76         (arch_sh2e_up): Accomodate above changes.
  77         (arch_sh2_up): Ditto.
  78         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
  79         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
  80         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
  81         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
  82         * sh-opc.h (arch_sh2a_nofpu): New.
  83         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
  84         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
  85         instruction.
  86         2004-01-20  DJ Delorie  <dj@redhat.com>
  87         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
  88         2003-12-29  DJ Delorie  <dj@redhat.com>
  89         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
  90         sh_opcode_info, sh_table): Add sh2a support.
  91         (arch_op32): New, to tag 32-bit opcodes.
  92         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
  93         2003-12-02  Michael Snyder  <msnyder@redhat.com>
  94         * sh-opc.h (arch_sh2a): Add.
  95         * sh-dis.c (arch_sh2a): Handle.
  96         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
  97
  98 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
  99
 100         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 101
 102 2004-07-22  Nick Clifton  <nickc@redhat.com>
 103
 104         PR/280
 105         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 106         insns - this is done by objdump itself.
 107         * h8500-dis.c (print_insn_h8500): Likewise.
 108
 109 2004-07-21  Jan Beulich <jbeulich@novell.com>
 110
 111         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 112         regardless of address size prefix in effect.
 113         (ptr_reg): Size or address registers does not depend on rex64, but
 114         on the presence of an address size override.
 115         (OP_MMX): Use rex.x only for xmm registers.
 116         (OP_EM): Use rex.z only for xmm registers.
 117
 118 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 119
 120         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 121         move/branch operations to the bottom so that VR5400 multimedia
 122         instructions take precedence in disassembly.
 123
 124 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 125
 126         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 127         ISA-specific "break" encoding.
 128
 129 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 130
 131         * arm-opc.h: Fix typo in comment.
 132
 133 2004-07-11  Andreas Schwab  <schwab@suse.de>
 134
 135         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 136
 137 2004-07-09  Andreas Schwab  <schwab@suse.de>
 138
 139         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 140
 141 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 142
 143         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 144         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 145         (crx-dis.lo): New target.
 146         (crx-opc.lo): Likewise.
 147         * Makefile.in: Regenerate.
 148         * configure.in: Handle bfd_crx_arch.
 149         * configure: Regenerate.
 150         * crx-dis.c: New file.
 151         * crx-opc.c: New file.
 152         * disassemble.c (ARCH_crx): Define.
 153         (disassembler): Handle ARCH_crx.
 154
 155 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 156
 157         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 158         * ia64-asmtab.c: Regnerate.
 159
 160 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 161
 162         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 163         (extract_fxm): Don't test dialect.
 164         (XFXFXM_MASK): Include the power4 bit.
 165         (XFXM): Add p4 param.
 166         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 167
 168 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 169
 170         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 171         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 172
 173 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 174
 175         * ppc-opc.c (BH, XLBH_MASK): Define.
 176         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 177
 178 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 179
 180         * i386-dis.c (x_mode): Comment.
 181         (two_source_ops): File scope.
 182         (float_mem): Correct fisttpll and fistpll.
 183         (float_mem_mode): New table.
 184         (dofloat): Use it.
 185         (OP_E): Correct intel mode PTR output.
 186         (ptr_reg): Use open_char and close_char.
 187         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 188         operands.  Set two_source_ops.
 189
 190 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 191
 192         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 193         instead of _raw_size.
 194
 195 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 196
 197         * ia64-gen.c (in_iclass): Handle more postinc st
 198         and ld variants.
 199         * ia64-asmtab.c: Rebuilt.
 200
 201 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 202
 203         * s390-opc.txt: Correct architecture mask for some opcodes.
 204         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 205         in the esa mode as well.
 206
 207 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 208
 209         * sh-dis.c (target_arch): Make unsigned.
 210         (print_insn_sh): Replace (most of) switch with a call to
 211         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 212         * sh-opc.h: Redefine architecture flags values.
 213         Add sh3-nommu architecture.
 214         Reorganise <arch>_up macros so they make more visual sense.
 215         (SH_MERGE_ARCH_SET): Define new macro.
 216         (SH_VALID_BASE_ARCH_SET): Likewise.
 217         (SH_VALID_MMU_ARCH_SET): Likewise.
 218         (SH_VALID_CO_ARCH_SET): Likewise.
 219         (SH_VALID_ARCH_SET): Likewise.
 220         (SH_MERGE_ARCH_SET_VALID): Likewise.
 221         (SH_ARCH_SET_HAS_FPU): Likewise.
 222         (SH_ARCH_SET_HAS_DSP): Likewise.
 223         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 224         (sh_get_arch_from_bfd_mach): Add prototype.
 225         (sh_get_arch_up_from_bfd_mach): Likewise.
 226         (sh_get_bfd_mach_from_arch_set): Likewise.
 227         (sh_merge_bfd_arc): Likewise.
 228
 229 2004-05-24  Peter Barada  <peter@the-baradas.com>
 230
 231         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 232         into new match_insn_m68k function.  Loop over canidate
 233         matches and select first that completely matches.
 234         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 235         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 236         to verify addressing for MAC/EMAC.
 237         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 238         reigster halves since 'fpu' and 'spl' look misleading.
 239         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 240         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 241         first, tighten up match masks.
 242         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 243         'size' from special case code in print_insn_m68k to
 244         determine decode size of insns.
 245
 246 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 247
 248         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 249         well as when -mpower4.
 250
 251 2004-05-13  Nick Clifton  <nickc@redhat.com>
 252
 253         * po/fr.po: Updated French translation.
 254
 255 2004-05-05  Peter Barada  <peter@the-baradas.com>
 256
 257         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 258         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 259         * m68k-op.c: Switch from ColdFire chips to core variants.
 260
 261 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 262
 263         PR 147.
 264         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 265
 266 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 267
 268         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 269         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 270
 271 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 272
 273         * sh-dis.c (print_insn_sh): Print the value in constant pool
 274         as a symbol if it looks like a symbol.
 275
 276 2004-04-22  Peter Barada <peter@the-baradas.com>
 277
 278         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 279         appropriate ColdFire architectures.
 280         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 281         mask addressing.
 282         Add EMAC instructions, fix MAC instructions. Remove
 283         macmw/macml/msacmw/msacml instructions since mask addressing now
 284         supported.
 285
 286 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 287
 288         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 289         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 290         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 291         macro.  Adjust all users.
 292
 293 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 294
 295         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 296         separately.
 297
 298 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 299
 300         * m32r-asm.c: Regenerate.
 301
 302 2004-03-29  Stan Shebs  <shebs@apple.com>
 303
 304         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 305         used.
 306
 307 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 308
 309         * aclocal.m4: Regenerate.
 310         * config.in: Regenerate.
 311         * configure: Regenerate.
 312         * po/POTFILES.in: Regenerate.
 313         * po/opcodes.pot: Regenerate.
 314
 315 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 316
 317         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 318         PPC_OPERANDS_GPR_0.
 319         * ppc-opc.c (RA0): Define.
 320         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 321         (RAOPT): Rename from RAO.  Update all uses.
 322         (powerpc_opcodes): Use RA0 as appropriate.
 323
 324 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 325
 326         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 327
 328 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 329
 330         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 331
 332 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 333
 334         * i386-dis.c (GRPPLOCK): Delete.
 335         (grps): Delete GRPPLOCK entry.
 336
 337 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 338
 339         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 340         (M, Mp): Use OP_M.
 341         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 342         (GRPPADLCK): Define.
 343         (dis386): Use NOP_Fixup on "nop".
 344         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 345         (twobyte_has_modrm): Set for 0xa7.
 346         (padlock_table): Delete.  Move to..
 347         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 348         and clflush.
 349         (print_insn): Revert PADLOCK_SPECIAL code.
 350         (OP_E): Delete sfence, lfence, mfence checks.
 351
 352 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 353
 354         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 355         (INVLPG_Fixup): New function.
 356         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 357
 358 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 359
 360         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 361         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 362         (padlock_table): New struct with PadLock instructions.
 363         (print_insn): Handle PADLOCK_SPECIAL.
 364
 365 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 366
 367         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 368         (OP_E): Twiddle clflush to sfence here.
 369
 370 2004-03-08  Nick Clifton  <nickc@redhat.com>
 371
 372         * po/de.po: Updated German translation.
 373
 374 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 375
 376         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 377         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 378         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 379         accordingly.
 380
 381 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 382
 383         * frv-asm.c: Regenerate.
 384         * frv-desc.c: Regenerate.
 385         * frv-desc.h: Regenerate.
 386         * frv-dis.c: Regenerate.
 387         * frv-ibld.c: Regenerate.
 388         * frv-opc.c: Regenerate.
 389         * frv-opc.h: Regenerate.
 390
 391 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 392
 393         * frv-desc.c, frv-opc.c: Regenerate.
 394
 395 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 396
 397         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 398
 399 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 400
 401         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 402         Also correct mistake in the comment.
 403
 404 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 405
 406         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 407         ensure that double registers have even numbers.
 408         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 409         that reserved instruction 0xfffd does not decode the same
 410         as 0xfdfd (ftrv).
 411         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 412         REG_N refers to a double register.
 413         Add REG_N_B01 nibble type and use it instead of REG_NM
 414         in ftrv.
 415         Adjust the bit patterns in a few comments.
 416
 417 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 418
 419         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 420
 421 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 422
 423         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 424
 425 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 426
 427         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 428
 429 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 430
 431         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 432         mtivor32, mtivor33, mtivor34.
 433
 434 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 435
 436         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 437
 438 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 439
 440         * arm-opc.h Maverick accumulator register opcode fixes.
 441
 442 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 443
 444         * m32r-dis.c: Regenerate.
 445
 446 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 447
 448         * sh-opc.h (sh_table): "fsrra", not "fssra".
 449
 450 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 451
 452         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 453         contraints.
 454
 455 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 456
 457         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 458
 459 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 460
 461         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 462         1.  Don't print scale factor on AT&T mode when index missing.
 463
 464 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 465
 466         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 467         when loaded into XR registers.
 468
 469 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 470
 471         * frv-desc.h: Regenerate.
 472         * frv-desc.c: Regenerate.
 473         * frv-opc.c: Regenerate.
 474
 475 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 476
 477         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 478
 479 2004-01-09  Paul Brook  <paul@codesourcery.com>
 480
 481         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 482         specific opcodes.
 483
 484 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 485
 486         * Makefile.am (libopcodes_la_DEPENDENCIES)
 487         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 488         comment about the problem.
 489         * Makefile.in: Regenerate.
 490
 491 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 492
 493         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 494         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 495         cut&paste errors in shifting/truncating numerical operands.
 496         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 497         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 498         (parse_uslo16): Likewise.
 499         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 500         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 501         (parse_s12): Likewise.
 502         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 503         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 504         (parse_uslo16): Likewise.
 505         (parse_uhi16): Parse gothi and gotfuncdeschi.
 506         (parse_d12): Parse got12 and gotfuncdesc12.
 507         (parse_s12): Likewise.
 508
 509 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 510
 511         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 512         instruction which looks similar to an 'rla' instruction.
 513
 514 For older changes see ChangeLog-0203
 515 \f
 516 Local Variables:
 517 mode: change-log
 518 left-margin: 8
 519 fill-column: 74
 520 version-control: never
 521 End: