Use sigsetjmp/siglongjmp in opcodes
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR binutils/16886
4 * config.in: Regenerated.
5 * configure: Likewise.
6 * configure.in: Check if sigsetjmp is available.
7 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
8 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
9 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
10 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
11 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
12 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
13 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
14 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
15 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
16 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
17 (OPCODES_SIGSETJMP): Likewise.
18 (OPCODES_SIGLONGJMP): Likewise.
19 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
20 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
21 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
22 * xtensa-dis.c (dis_private): Replace jmp_buf with
23 OPCODES_SIGJMP_BUF.
24 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
25 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
26 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
27 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
28 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
29
30 2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
31
32 PR binutils/16891
33 * i386-dis.c (print_insn): Handle prefixes before fwait.
34
35 2014-04-26 Alan Modra <amodra@gmail.com>
36
37 * po/POTFILES.in: Regenerate.
38
39 2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
40
41 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
42 to allow the MIPS XPA ASE.
43 (parse_mips_dis_option): Process the -Mxpa option.
44 * mips-opc.c (XPA): New define.
45 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
46 locations of the ctc0 and cfc0 instructions.
47
48 2014-04-22 Christian Svensson <blue@cmd.nu>
49
50 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
51 * configure.in: Likewise.
52 * disassemble.c: Likewise.
53 * or1k-asm.c: New file.
54 * or1k-desc.c: New file.
55 * or1k-desc.h: New file.
56 * or1k-dis.c: New file.
57 * or1k-ibld.c: New file.
58 * or1k-opc.c: New file.
59 * or1k-opc.h: New file.
60 * or1k-opinst.c: New file.
61 * Makefile.in: Regenerate.
62 * configure: Regenerate.
63 * openrisc-asm.c: Delete.
64 * openrisc-desc.c: Delete.
65 * openrisc-desc.h: Delete.
66 * openrisc-dis.c: Delete.
67 * openrisc-ibld.c: Delete.
68 * openrisc-opc.c: Delete.
69 * openrisc-opc.h: Delete.
70 * or32-dis.c: Delete.
71 * or32-opc.c: Delete.
72
73 2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
74
75 * i386-dis.c (rm_table): Add encls, enclu.
76 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
77 (cpu_flags): Add CpuSE1.
78 * i386-opc.h (enum): Add CpuSE1.
79 (i386_cpu_flags): Add cpuse1.
80 * i386-opc.tbl: Add encls, enclu.
81 * i386-init.h: Regenerated.
82 * i386-tbl.h: Likewise.
83
84 2014-04-02 Anthony Green <green@moxielogic.com>
85
86 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
87 instructions, sex.b and sex.s.
88
89 2014-03-26 Jiong Wang <jiong.wang@arm.com>
90
91 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
92 instructions.
93
94 2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
95
96 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
97 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
98 vscatterqps.
99 * i386-tbl.h: Regenerate.
100
101 2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
102
103 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
104 %hstick_enable added.
105
106 2014-03-19 Nick Clifton <nickc@redhat.com>
107
108 * rx-decode.opc (bwl): Allow for bogus instructions with a size
109 field of 3.
110 (sbwl, ubwl, SCALE): Likewise.
111 * rx-decode.c: Regenerate.
112
113 2014-03-12 Alan Modra <amodra@gmail.com>
114
115 * Makefile.in: Regenerate.
116
117 2014-03-05 Alan Modra <amodra@gmail.com>
118
119 Update copyright years.
120
121 2014-03-04 Heiher <r@hev.cc>
122
123 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
124
125 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
126
127 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
128 so that they come after the Loongson extensions.
129
130 2014-03-03 Alan Modra <amodra@gmail.com>
131
132 * i386-gen.c (process_copyright): Emit copyright notice on one line.
133
134 2014-02-28 Alan Modra <amodra@gmail.com>
135
136 * msp430-decode.c: Regenerate.
137
138 2014-02-27 Jiong Wang <jiong.wang@arm.com>
139
140 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
141 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
142
143 2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
144
145 * aarch64-opc.c (print_register_offset_address): Call
146 get_int_reg_name to prepare the register name.
147
148 2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
149
150 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
151 * i386-tbl.h: Regenerate.
152
153 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
154
155 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
156 (cpu_flags): Add CpuPREFETCHWT1.
157 * i386-init.h: Regenerate.
158 * i386-opc.h (CpuPREFETCHWT1): New.
159 (i386_cpu_flags): Add cpuprefetchwt1.
160 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
161 * i386-tbl.h: Regenerate.
162
163 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
164
165 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
166 to CpuAVX512F.
167 * i386-tbl.h: Regenerate.
168
169 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
170
171 * i386-gen.c (output_cpu_flags): Don't output trailing space.
172 (output_opcode_modifier): Likewise.
173 (output_operand_type): Likewise.
174 * i386-init.h: Regenerated.
175 * i386-tbl.h: Likewise.
176
177 2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
178
179 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
180 MOD_0FC7_REG_5.
181 (PREFIX enum): Add PREFIX_0FAE_REG_7.
182 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
183 (prefix_table): Add clflusopt.
184 (mod_table): Add xrstors, xsavec, xsaves.
185 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
186 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
187 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
188 * i386-init.h: Regenerate.
189 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
190 xsaves64, xsavec, xsavec64.
191 * i386-tbl.h: Regenerate.
192
193 2014-02-10 Alan Modra <amodra@gmail.com>
194
195 * po/POTFILES.in: Regenerate.
196 * po/opcodes.pot: Regenerate.
197
198 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
199 Jan Beulich <jbeulich@suse.com>
200
201 PR binutils/16490
202 * i386-dis.c (OP_E_memory): Fix shift computation for
203 vex_vsib_q_w_dq_mode.
204
205 2014-01-09 Bradley Nelson <bradnelson@google.com>
206 Roland McGrath <mcgrathr@google.com>
207
208 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
209 last_rex_prefix is -1.
210
211 2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
212
213 * i386-gen.c (process_copyright): Update copyright year to 2014.
214
215 2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
216
217 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
218
219 For older changes see ChangeLog-2013
220 \f
221 Copyright (C) 2014 Free Software Foundation, Inc.
222
223 Copying and distribution of this file, with or without modification,
224 are permitted in any medium without royalty provided the copyright
225 notice and this notice are preserved.
226
227 Local Variables:
228 mode: change-log
229 left-margin: 8
230 fill-column: 74
231 version-control: never
232 End:
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