opcodes/ChangeLog

   1 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         AVX Programming Reference (August, 2008)
   4         * i386-dis.c (PREFIX_VEX_38DB): New.
   5         (PREFIX_VEX_38DC): Likewise.
   6         (PREFIX_VEX_38DD): Likewise.
   7         (PREFIX_VEX_38DE): Likewise.
   8         (PREFIX_VEX_38DF): Likewise.
   9         (PREFIX_VEX_3ADF): Likewise.
  10         (VEX_LEN_38DB_P_2): Likewise.
  11         (VEX_LEN_38DC_P_2): Likewise.
  12         (VEX_LEN_38DD_P_2): Likewise.
  13         (VEX_LEN_38DE_P_2): Likewise.
  14         (VEX_LEN_38DF_P_2): Likewise.
  15         (VEX_LEN_3ADF_P_2): Likewise.
  16         (PREFIX_VEX_3A04): Updated.
  17         (VEX_LEN_3A06_P_2): Likewise.
  18         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
  19         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
  20         (x86_64_table): Likewise.
  21         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
  22         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
  23         VEX_LEN_3ADF_P_2.
  24
  25         * i386-opc.tbl: Add AES + AVX instructions.
  26         * i386-init.h: Regenerated.
  27         * i386-tbl.h: Likewise.
  28
  29 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  30
  31         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
  32         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
  33
  34 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
  35
  36         PR 6526
  37         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
  38         * Makefile.in: Regenerate.
  39         * aclocal.m4: Regenerate.
  40         * config.in: Regenerate.
  41         * configure: Regenerate.
  42
  43 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  44
  45         PR 6825
  46         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
  47
  48 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
  49
  50         * i386-opc.tbl: Add syscall and sysret for Cpu64.
  51
  52         * i386-tbl.h: Regenerated.
  53
  54 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
  55
  56         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  57         * Makefile.in: Regenerate.
  58         * po/POTFILES.in: Regenerate.
  59
  60 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
  61
  62         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  63         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  64         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  65         * ppc-opc.c (insert_xt6): New static function.
  66         (extract_xt6): Likewise.
  67         (insert_xa6): Likewise.
  68         (extract_xa6: Likewise.
  69         (insert_xb6): Likewise.
  70         (extract_xb6): Likewise.
  71         (insert_xb6s): Likewise.
  72         (extract_xb6s): Likewise.
  73         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  74         XX3DM_MASK, PPCVSX): New.
  75         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
  76         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
  77
  78 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
  79
  80         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
  81         * Makefile.in: Regenerate.
  82
  83 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
  84
  85         * i386-reg.tbl: Use Dw2Inval on AVX registers.
  86         * i386-tbl.h: Regenerated.
  87
  88 2008-07-30  Michael J. Eager  <eager@eagercon.com>
  89
  90         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
  91         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
  92         (insert_sprg, PPC405): Use PPC_OPCODE_405.
  93         (powerpc_opcodes): Add Xilinx APU related opcodes.
  94
  95 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
  96
  97         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
  98
  99 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 100
 101         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 102
 103 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 104
 105         * mips-opc.c (CP): New macro.
 106         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 107         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 108         dmtc2 Octeon instructions.
 109
 110 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 111
 112         * dis-init.c (init_disassemble_info): Init endian_code field.
 113         * arm-dis.c (print_insn): Disassemble code according to
 114         setting of endian_code.
 115         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 116
 117 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 118
 119         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 120         for ELF symbols.
 121
 122 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 123
 124         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 125         (print_ppc_disassembler_options): Likewise.
 126         * ppc-opc.c (PPC464): Define.
 127         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 128
 129 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 130
 131         * configure: Regenerate.
 132
 133 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 134
 135         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 136         ppc_cpu_t typedef.
 137         (struct dis_private): New.
 138         (POWERPC_DIALECT): New define.
 139         (powerpc_dialect): Renamed to...
 140         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 141         struct dis_private.
 142         (print_insn_big_powerpc): Update for using structure in
 143         info->private_data.
 144         (print_insn_little_powerpc): Likewise.
 145         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 146         (skip_optional_operands): Likewise.
 147         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 148         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 149         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 150         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 151         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 152         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 153         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 154         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 155         param to be of type ppc_cpu_t.  Update prototype.
 156
 157 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 158
 159         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 160         +s, +S.
 161         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 162         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 163         syncw, syncws, vm3mulu, vm0 and vmulu.
 164
 165         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 166         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 167         seqi, sne and snei.
 168
 169 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 170
 171         * i386-opc.tbl: Add vmovd with 64bit operand.
 172         * i386-tbl.h: Regenerated.
 173
 174 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 175
 176         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 177
 178 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 179
 180         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 181         * i386-tbl.h: Regenerated.
 182
 183 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 184
 185         PR gas/6517
 186         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 187         into 32bit and 64bit.  Remove Reg64|Qword and add
 188         IgnoreSize|No_qSuf on 32bit version.
 189         * i386-tbl.h: Regenerated.
 190
 191 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 192
 193         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 194         * i386-tbl.h: Regenerated.
 195
 196 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 197
 198         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 199
 200 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 201
 202         * Makefile.am: Run "make dep-am".
 203         * Makefile.in: Regenerate.
 204
 205 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 206
 207         * i386-dis.c (MOVBE_Fixup): New.
 208         (Mo): Likewise.
 209         (PREFIX_0F3880): Likewise.
 210         (PREFIX_0F3881): Likewise.
 211         (PREFIX_0F38F0): Updated.
 212         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 213         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 214         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 215
 216         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 217         CPU_EPT_FLAGS.
 218         (cpu_flags): Add CpuMovbe and CpuEPT.
 219
 220         * i386-opc.h (CpuMovbe): New.
 221         (CpuEPT): Likewise.
 222         (CpuLM): Updated.
 223         (i386_cpu_flags): Add cpumovbe and cpuept.
 224
 225         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 226         * i386-init.h: Regenerated.
 227         * i386-tbl.h: Likewise.
 228
 229 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 230
 231         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 232         the two drem and the two dremu macros.
 233
 234 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 235
 236         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 237         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 238         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 239         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 240
 241 2008-04-25  David S. Miller  <davem@davemloft.net>
 242
 243         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 244         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 245
 246 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 247
 248         * aclocal.m4: Regenerate.
 249         * configure: Regenerate.
 250
 251 2008-04-23  David S. Miller  <davem@davemloft.net>
 252
 253         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 254         extended values.
 255         (prefetch_table): Add missing values.
 256
 257 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 258
 259         * i386-gen.c (opcode_modifiers): Add NoAVX.
 260
 261         * i386-opc.h (NoAVX): New.
 262         (OldGcc): Updated.
 263         (i386_opcode_modifier): Add noavx.
 264
 265         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 266         instructions which don't have AVX equivalent.
 267         * i386-tbl.h: Regenerated.
 268
 269 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 270
 271         * i386-dis.c (OP_VEX_FMA): New.
 272         (OP_EX_VexImmW): Likewise.
 273         (VexFMA): Likewise.
 274         (Vex128FMA): Likewise.
 275         (EXVexImmW): Likewise.
 276         (get_vex_imm8): Likewise.
 277         (OP_EX_VexReg): Likewise.
 278         (vex_i4_done): Renamed to ...
 279         (vex_w_done): This.
 280         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 281         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 282         FMA instructions.
 283         (print_insn): Updated.
 284         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 285         (OP_REG_VexI4): Check invalid high registers.
 286
 287 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 288             Michael Meissner  <michael.meissner@amd.com>
 289
 290         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 291         * i386-tbl.h: Regenerate from i386-opc.tbl.
 292
 293 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 294
 295         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 296         accept Power E500MC instructions.
 297         (print_ppc_disassembler_options): Document -Me500mc.
 298         * ppc-opc.c (DUIS, DUI, T): New.
 299         (XRT, XRTRA): Likewise.
 300         (E500MC): Likewise.
 301         (powerpc_opcodes): Add new Power E500MC instructions.
 302
 303 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 304
 305         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 306         (print_s390_disassembler_options): New function.
 307         * disassemble.c (disassembler_usage): Invoke
 308         print_s390_disassembler_options.
 309
 310 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 311
 312         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 313         of local variables used for mnemonic parsing: prefix, suffix and
 314         number.
 315
 316 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 317
 318         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 319         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 320         (s390_crb_extensions): New extensions table.
 321         (insertExpandedMnemonic): Handle '$' tag.
 322         * s390-opc.txt: Remove conditional jump variants which can now
 323         be expanded automatically.
 324         Replace '*' tag with '$' in the compare and branch instructions.
 325
 326 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 327
 328         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 329         (PREFIX_VEX_3AXX): Likewis.
 330
 331 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 332
 333         * i386-opc.tbl: Remove 4 extra blank lines.
 334
 335 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 336
 337         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 338         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 339         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 340         * i386-opc.tbl: Likewise.
 341
 342         * i386-opc.h (CpuCLMUL): Renamed to ...
 343         (CpuPCLMUL): This.
 344         (CpuFMA): Updated.
 345         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 346
 347         * i386-init.h: Regenerated.
 348
 349 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 350
 351         * i386-dis.c (OP_E_register): New.
 352         (OP_E_memory): Likewise.
 353         (OP_VEX): Likewise.
 354         (OP_EX_Vex): Likewise.
 355         (OP_EX_VexW): Likewise.
 356         (OP_XMM_Vex): Likewise.
 357         (OP_XMM_VexW): Likewise.
 358         (OP_REG_VexI4): Likewise.
 359         (PCLMUL_Fixup): Likewise.
 360         (VEXI4_Fixup): Likewise.
 361         (VZERO_Fixup): Likewise.
 362         (VCMP_Fixup): Likewise.
 363         (VPERMIL2_Fixup): Likewise.
 364         (rex_original): Likewise.
 365         (rex_ignored): Likewise.
 366         (Mxmm): Likewise.
 367         (XMM): Likewise.
 368         (EXxmm): Likewise.
 369         (EXxmmq): Likewise.
 370         (EXymmq): Likewise.
 371         (Vex): Likewise.
 372         (Vex128): Likewise.
 373         (Vex256): Likewise.
 374         (VexI4): Likewise.
 375         (EXdVex): Likewise.
 376         (EXqVex): Likewise.
 377         (EXVexW): Likewise.
 378         (EXdVexW): Likewise.
 379         (EXqVexW): Likewise.
 380         (XMVex): Likewise.
 381         (XMVexW): Likewise.
 382         (XMVexI4): Likewise.
 383         (PCLMUL): Likewise.
 384         (VZERO): Likewise.
 385         (VCMP): Likewise.
 386         (VPERMIL2): Likewise.
 387         (xmm_mode): Likewise.
 388         (xmmq_mode): Likewise.
 389         (ymmq_mode): Likewise.
 390         (vex_mode): Likewise.
 391         (vex128_mode): Likewise.
 392         (vex256_mode): Likewise.
 393         (USE_VEX_C4_TABLE): Likewise.
 394         (USE_VEX_C5_TABLE): Likewise.
 395         (USE_VEX_LEN_TABLE): Likewise.
 396         (VEX_C4_TABLE): Likewise.
 397         (VEX_C5_TABLE): Likewise.
 398         (VEX_LEN_TABLE): Likewise.
 399         (REG_VEX_XX): Likewise.
 400         (MOD_VEX_XXX): Likewise.
 401         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 402         (PREFIX_0F3A44): Likewise.
 403         (PREFIX_0F3ADF): Likewise.
 404         (PREFIX_VEX_XXX): Likewise.
 405         (VEX_OF): Likewise.
 406         (VEX_OF38): Likewise.
 407         (VEX_OF3A): Likewise.
 408         (VEX_LEN_XXX): Likewise.
 409         (vex): Likewise.
 410         (need_vex): Likewise.
 411         (need_vex_reg): Likewise.
 412         (vex_i4_done): Likewise.
 413         (vex_table): Likewise.
 414         (vex_len_table): Likewise.
 415         (OP_REG_VexI4): Likewise.
 416         (vex_cmp_op): Likewise.
 417         (pclmul_op): Likewise.
 418         (vpermil2_op): Likewise.
 419         (m_mode): Updated.
 420         (es_reg): Likewise.
 421         (PREFIX_0F38F0): Likewise.
 422         (PREFIX_0F3A60): Likewise.
 423         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 424         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 425         and PREFIX_VEX_XXX entries.
 426         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 427         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 428         PREFIX_0F3ADF.
 429         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 430         Add MOD_VEX_XXX entries.
 431         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 432         REX byte in rex_original.
 433         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 434         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 435         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 436         calling get_valid_dis386.  Use rex_original and rex_ignored when
 437         printing out REX.
 438         (putop): Handle "XY".
 439         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 440         ymmq_mode.
 441         (OP_E_extended): Updated to use OP_E_register and
 442         OP_E_memory.
 443         (OP_XMM): Handle VEX.
 444         (OP_EX): Likewise.
 445         (XMM_Fixup): Likewise.
 446         (CMP_Fixup): Use ARRAY_SIZE.
 447
 448         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 449         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 450         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 451         OPERAND_TYPE_VEX_IMM4.
 452         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 453         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 454         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 455         VexImmExt and SSE2AVX.
 456         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 457
 458         * i386-opc.h (CpuAVX): New.
 459         (CpuAES): Likewise.
 460         (CpuCLMUL): Likewise.
 461         (CpuFMA): Likewise.
 462         (Vex): Likewise.
 463         (Vex256): Likewise.
 464         (VexNDS): Likewise.
 465         (VexNDD): Likewise.
 466         (VexW0): Likewise.
 467         (VexW1): Likewise.
 468         (Vex0F): Likewise.
 469         (Vex0F38): Likewise.
 470         (Vex0F3A): Likewise.
 471         (Vex3Sources): Likewise.
 472         (VexImmExt): Likewise.
 473         (SSE2AVX): Likewise.
 474         (RegYMM): Likewise.
 475         (Ymmword): Likewise.
 476         (Vex_Imm4): Likewise.
 477         (Implicit1stXmm0): Likewise.
 478         (CpuXsave): Updated.
 479         (CpuLM): Likewise.
 480         (ByteOkIntel): Likewise.
 481         (OldGcc): Likewise.
 482         (Control): Likewise.
 483         (Unspecified): Likewise.
 484         (OTMax): Likewise.
 485         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 486         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 487         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 488         vex3sources, veximmext and sse2avx.
 489         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 490
 491         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 492
 493         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 494
 495         * i386-init.h: Regenerated.
 496         * i386-tbl.h: Likewise.
 497
 498 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 499
 500         From  Robin Getz  <robin.getz@analog.com>
 501         * bfin-dis.c (bu32): Typedef.
 502         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 503         (constant_formats[]): Add uimm32 and huimm16.
 504         (fmtconst_val): New.
 505         (uimm32): Define.
 506         (huimm32): Define.
 507         (imm16_val): Define.
 508         (luimm16_val): Define.
 509         (struct saved_state): Define.
 510         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 511         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 512         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 513         (get_allreg): New.
 514         (decode_LDIMMhalf_0): Print out the whole register value.
 515
 516         From Jie Zhang  <jie.zhang@analog.com>
 517         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 518         multiply and multiply-accumulate to data register instruction.
 519
 520         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 521         c_imm32, c_huimm32e): Define.
 522         (constant_formats): Add flags for printing decimal, leading spaces, and
 523         exact symbols.
 524         (comment, parallel): Add global flags in all disassembly.
 525         (fmtconst): Take advantage of new flags, and print default in hex.
 526         (fmtconst_val): Likewise.
 527         (decode_macfunc): Be consistant with spaces, tabs, comments,
 528         capitalization in disassembly, fix minor coding style issues.
 529         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 530         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 531         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 532         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 533         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 534         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 535         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 536         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 537         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 538         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 539         _print_insn_bfin, print_insn_bfin): Likewise.
 540
 541 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 542
 543         * aclocal.m4: Regenerate.
 544         * configure: Likewise.
 545         * Makefile.in: Likewise.
 546
 547 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 548
 549         * Makefile.am: Run "make dep-am".
 550         * Makefile.in: Regenerate.
 551         * configure: Regenerate.
 552
 553 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 554
 555         * ppc-opc.c (powerpc_opcodes): Order and format.
 556
 557 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 558
 559         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 560         * i386-tbl.h: Regenerated.
 561
 562 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 563
 564         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 565         x86-64.
 566         * i386-tbl.h: Regenerated.
 567
 568 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 569
 570         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 571         and Fword for far indirect jmp. Allow Reg16 and Word for near
 572         indirect jmp on x86-64. Disallow Fword for lcall.
 573         * i386-tbl.h: Re-generate.
 574
 575 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 576
 577         * cr16-opc.c  (cr16_num_optab): Defined
 578
 579 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 580
 581         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 582         * i386-init.h: Regenerated.
 583
 584 2008-02-14  Nick Clifton  <nickc@redhat.com>
 585
 586         PR binutils/5524
 587         * configure.in (SHARED_LIBADD): Select the correct host specific
 588         file extension for shared libraries.
 589         * configure: Regenerate.
 590
 591 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 592
 593         * i386-opc.h (RegFlat): New.
 594         * i386-reg.tbl (flat): Add.
 595         * i386-tbl.h: Re-generate.
 596
 597 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 598
 599         * i386-dis.c (a_mode): New.
 600         (cond_jump_mode): Adjust.
 601         (Ma): Change to a_mode.
 602         (intel_operand_size): Handle a_mode.
 603         * i386-opc.tbl: Allow Dword and Qword for bound.
 604         * i386-tbl.h: Re-generate.
 605
 606 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 607
 608         * i386-gen.c (process_i386_registers): Process new fields.
 609         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 610         unsigned char. Add dw2_regnum and Dw2Inval.
 611         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 612         register names.
 613         * i386-tbl.h: Re-generate.
 614
 615 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 616
 617         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 618         * i386-init.h: Updated.
 619
 620 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 621
 622         * i386-gen.c (cpu_flags): Add CpuXsave.
 623
 624         * i386-opc.h (CpuXsave): New.
 625         (CpuLM): Updated.
 626         (i386_cpu_flags): Add cpuxsave.
 627
 628         * i386-dis.c (MOD_0FAE_REG_4): New.
 629         (RM_0F01_REG_2): Likewise.
 630         (MOD_0FAE_REG_5): Updated.
 631         (RM_0F01_REG_3): Likewise.
 632         (reg_table): Use MOD_0FAE_REG_4.
 633         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 634         for xrstor.
 635         (rm_table): Add RM_0F01_REG_2.
 636
 637         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 638         * i386-init.h: Regenerated.
 639         * i386-tbl.h: Likewise.
 640
 641 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 642
 643         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 644         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 645         * i386-tbl.h: Re-generate.
 646
 647 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 648
 649         PR 5715
 650         * configure: Regenerated.
 651
 652 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 653
 654         * mips-dis.c: Update copyright.
 655         (mips_arch_choices): Add Octeon.
 656         * mips-opc.c: Update copyright.
 657         (IOCT): New macro.
 658         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 659
 660 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 661
 662         * ppc-opc.c: Support optional L form mtmsr.
 663
 664 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 665
 666         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 667
 668 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 669
 670         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 671         * i386-init.h: Regenerated.
 672
 673 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 674
 675         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 676         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 677
 678 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 679
 680         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 681         (cpu_flags): Likewise.
 682
 683         * i386-opc.h (CpuMMX2): Removed.
 684         (CpuSSE): Updated.
 685
 686         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 687         * i386-init.h: Regenerated.
 688         * i386-tbl.h: Likewise.
 689
 690 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 691
 692         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 693         CPU_SMX_FLAGS.
 694         * i386-init.h: Regenerated.
 695
 696 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 697
 698         * i386-opc.tbl: Use Qword on movddup.
 699         * i386-tbl.h: Regenerated.
 700
 701 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 702
 703         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 704         * i386-tbl.h: Regenerated.
 705
 706 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 707
 708         * i386-dis.c (Mx): New.
 709         (PREFIX_0FC3): Likewise.
 710         (PREFIX_0FC7_REG_6): Updated.
 711         (dis386_twobyte): Use PREFIX_0FC3.
 712         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 713         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 714         movntss.
 715
 716 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 717
 718         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 719         (operand_types): Add Mem.
 720
 721         * i386-opc.h (IntelSyntax): New.
 722         * i386-opc.h (Mem): New.
 723         (Byte): Updated.
 724         (Opcode_Modifier_Max): Updated.
 725         (i386_opcode_modifier): Add intelsyntax.
 726         (i386_operand_type): Add mem.
 727
 728         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 729         instructions.
 730
 731         * i386-reg.tbl: Add size for accumulator.
 732
 733         * i386-init.h: Regenerated.
 734         * i386-tbl.h: Likewise.
 735
 736 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 737
 738         * i386-opc.h (Byte): Fix a typo.
 739
 740 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 741
 742         PR gas/5534
 743         * i386-gen.c (operand_type_init): Add Dword to
 744         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 745         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 746         Qword and Xmmword.
 747         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 748         Xmmword, Unspecified and Anysize.
 749         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 750         an alias of Xmmword.
 751
 752         * i386-opc.h (CheckSize): Removed.
 753         (Byte): Updated.
 754         (Word): Likewise.
 755         (Dword): Likewise.
 756         (Qword): Likewise.
 757         (Xmmword): Likewise.
 758         (FWait): Updated.
 759         (OTMax): Likewise.
 760         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 761         qword and xmmword.
 762         (Fword): New.
 763         (TBYTE): Likewise.
 764         (Unspecified): Likewise.
 765         (Anysize): Likewise.
 766         (i386_operand_type): Add byte, word, dword, fword, qword,
 767         tbyte xmmword, unspecified and anysize.
 768
 769         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 770         Tbyte, Xmmword, Unspecified and Anysize.
 771
 772         * i386-reg.tbl: Add size for accumulator.
 773
 774         * i386-init.h: Regenerated.
 775         * i386-tbl.h: Likewise.
 776
 777 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 778
 779         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 780         (REG_0F18): Updated.
 781         (reg_table): Updated.
 782         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 783         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 784
 785 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 786
 787         * i386-gen.c (set_bitfield): Use fail () on error.
 788
 789 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 790
 791         * i386-gen.c (lineno): New.
 792         (filename): Likewise.
 793         (set_bitfield): Report filename and line numer on error.
 794         (process_i386_opcodes): Set filename and update lineno.
 795         (process_i386_registers): Likewise.
 796
 797 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 798
 799         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 800         ATTSyntax.
 801
 802         * i386-opc.h (IntelMnemonic): Renamed to ..
 803         (ATTSyntax): This
 804         (Opcode_Modifier_Max): Updated.
 805         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 806         and intelsyntax.
 807
 808         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 809         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 810         * i386-tbl.h: Regenerated.
 811
 812 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 813
 814         * i386-gen.c: Update copyright to 2008.
 815         * i386-opc.h: Likewise.
 816         * i386-opc.tbl: Likewise.
 817
 818         * i386-init.h: Regenerated.
 819         * i386-tbl.h: Likewise.
 820
 821 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 822
 823         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 824         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 825         * i386-tbl.h: Regenerated.
 826
 827 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 828
 829         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 830         CpuSSE4_2_Or_ABM.
 831         (cpu_flags): Likewise.
 832
 833         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 834         (CpuSSE4_2_Or_ABM): Likewise.
 835         (CpuLM): Updated.
 836         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 837
 838         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 839         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 840         and CpuPadLock, respectively.
 841         * i386-init.h: Regenerated.
 842         * i386-tbl.h: Likewise.
 843
 844 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 845
 846         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 847
 848         * i386-opc.h (No_xSuf): Removed.
 849         (CheckSize): Updated.
 850
 851         * i386-tbl.h: Regenerated.
 852
 853 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 854
 855         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 856         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 857         CPU_SSE5_FLAGS.
 858         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 859
 860         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 861         (CpuLM): Updated.
 862         (i386_cpu_flags): Add cpusse4_2_or_abm.
 863
 864         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 865         CpuABM|CpuSSE4_2 on popcnt.
 866         * i386-init.h: Regenerated.
 867         * i386-tbl.h: Likewise.
 868
 869 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 870
 871         * i386-opc.h: Update comments.
 872
 873 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 874
 875         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 876         * i386-opc.h: Likewise.
 877         * i386-opc.tbl: Likewise.
 878
 879 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 880
 881         PR gas/5534
 882         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 883         Byte, Word, Dword, QWord and Xmmword.
 884
 885         * i386-opc.h (No_xSuf): New.
 886         (CheckSize): Likewise.
 887         (Byte): Likewise.
 888         (Word): Likewise.
 889         (Dword): Likewise.
 890         (QWord): Likewise.
 891         (Xmmword): Likewise.
 892         (FWait): Updated.
 893         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 894         Dword, QWord and Xmmword.
 895
 896         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 897         used.
 898         * i386-tbl.h: Regenerated.
 899
 900 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 901
 902         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 903         From Miod Vallat.
 904
 905 For older changes see ChangeLog-2007
 906 \f
 907 Local Variables:
 908 mode: change-log
 909 left-margin: 8
 910 fill-column: 74
 911 version-control: never
 912 End: