opcodes/ChangeLog

   1 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
   4
   5         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
   6         * i386-tbl.h: Regenerated.
   7
   8 2010-07-29  DJ Delorie  <dj@redhat.com>
   9
  10         * rx-decode.opc (SRR): New.
  11         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  12         r0,r0) and NOP3 (max r0,r0) special cases.
  13         * rx-decode.c: Regenerate.
  14
  15 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  16
  17         * i386-dis.c: Add 0F to VEX opcode enums.
  18
  19 2010-07-27  DJ Delorie  <dj@redhat.com>
  20
  21         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  22         (rx_decode_opcode): Likewise.
  23         * rx-decode.c: Regenerate.
  24
  25 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  26             Ina Pandit  <ina.pandit@kpitcummins.com>
  27
  28         * v850-dis.c (v850_sreg_names): Updated structure for system
  29         registers.
  30         (float_cc_names): new structure for condition codes.
  31         (print_value): Update the function that prints value.
  32         (get_operand_value): New function to get the operand value.
  33         (disassemble): Updated to handle the disassembly of instructions.
  34         (print_insn_v850): Updated function to print instruction for different
  35         families.
  36         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
  37         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
  38         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
  39         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
  40         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
  41         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
  42         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
  43         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
  44         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
  45         (v850_operands): Update with the relocation name. Also update
  46         the instructions with specific set of processors.
  47
  48 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
  49
  50         * arm-dis.c (print_insn_arm): Add cases for printing more
  51         symbolic operands.
  52         (print_insn_thumb32): Likewise.
  53
  54 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  55
  56         * mips-dis.c (print_insn_mips): Correct branch instruction type
  57         determination.
  58
  59 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  60
  61         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
  62         type and delay slot determination.
  63         (print_insn_mips16): Extend branch instruction type and delay
  64         slot determination to cover all instructions.
  65         * mips16-opc.c (BR): Remove macro.
  66         (UBR, CBR): New macros.
  67         (mips16_opcodes): Update branch annotation for "b", "beqz",
  68         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
  69         and "jrc".
  70
  71 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  72
  73         AVX Programming Reference (June, 2010)
  74         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
  75         * i386-opc.tbl: Likewise.
  76         * i386-tbl.h: Regenerated.
  77
  78 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  79
  80         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
  81
  82 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
  83
  84         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
  85         ppc_cpu_t before inverting.
  86         (ppc_parse_cpu): Likewise.
  87         (print_insn_powerpc): Likewise.
  88
  89 2010-07-03  Alan Modra  <amodra@gmail.com>
  90
  91         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
  92         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
  93         (PPC64, MFDEC2): Update.
  94         (NON32, NO371): Define.
  95         (powerpc_opcode): Update to not use old opcode flags, and avoid
  96         -m601 duplicates.
  97
  98 2010-07-03  DJ Delorie  <dj@delorie.com>
  99
 100         * m32c-ibld.c: Regenerate.
 101
 102 2010-07-03  Alan Modra  <amodra@gmail.com>
 103
 104         * ppc-opc.c (PWR2COM): Define.
 105         (PPCPWR2): Add PPC_OPCODE_COMMON.
 106         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 107         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 108         "rac" from -mcom.
 109
 110 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 111
 112         AVX Programming Reference (June, 2010)
 113         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 114         (PREFIX_0FAE_REG_1): Likewise.
 115         (PREFIX_0FAE_REG_2): Likewise.
 116         (PREFIX_0FAE_REG_3): Likewise.
 117         (PREFIX_VEX_3813): Likewise.
 118         (PREFIX_VEX_3A1D): Likewise.
 119         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 120         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 121         PREFIX_VEX_3A1D.
 122         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 123         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 124         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 125
 126         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 127         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 128         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 129
 130         * i386-opc.h (CpuXsaveopt): New.
 131         (CpuFSGSBase): Likewise.
 132         (CpuRdRnd): Likewise.
 133         (CpuF16C): Likewise.
 134         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 135         cpuf16c.
 136
 137         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 138         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 139         * i386-init.h: Regenerated.
 140         * i386-tbl.h: Likewise.
 141
 142 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 143
 144         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 145         and mtocrf on EFS.
 146
 147 2010-06-29  Alan Modra  <amodra@gmail.com>
 148
 149         * maxq-dis.c: Delete file.
 150         * Makefile.am: Remove references to maxq.
 151         * configure.in: Likewise.
 152         * disassemble.c: Likewise.
 153         * Makefile.in: Regenerate.
 154         * configure: Regenerate.
 155         * po/POTFILES.in: Regenerate.
 156
 157 2010-06-29  Alan Modra  <amodra@gmail.com>
 158
 159         * mep-dis.c: Regenerate.
 160
 161 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 162
 163         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 164
 165 2010-06-27  Alan Modra  <amodra@gmail.com>
 166
 167         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 168         (decodeInstr): Likewise.
 169         * dlx-dis.c (print_insn_dlx): Likewise.
 170         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 171         * maxq-dis.c (check_move, print_insn): Likewise.
 172         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 173         * msp430-dis.c (msp430_branchinstr): Likewise.
 174         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 175         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 176         * sparc-dis.c (print_insn_sparc): Likewise.
 177         * fr30-asm.c: Regenerate.
 178         * frv-asm.c: Regenerate.
 179         * ip2k-asm.c: Regenerate.
 180         * iq2000-asm.c: Regenerate.
 181         * lm32-asm.c: Regenerate.
 182         * m32c-asm.c: Regenerate.
 183         * m32r-asm.c: Regenerate.
 184         * mep-asm.c: Regenerate.
 185         * mt-asm.c: Regenerate.
 186         * openrisc-asm.c: Regenerate.
 187         * xc16x-asm.c: Regenerate.
 188         * xstormy16-asm.c: Regenerate.
 189
 190 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 191
 192         PR gas/11673
 193         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 194
 195 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 196
 197         PR binutils/11676
 198         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 199
 200 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 201
 202         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 203         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 204         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 205         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 206         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 207         Treat lwsync as msync on e500.
 208
 209 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 210
 211         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 212
 213 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 214
 215         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 216         constants is the same on 32-bit and 64-bit hosts.
 217
 218 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 219
 220         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 221         .short directives so that they can be reassembled.
 222
 223 2010-05-26  Catherine Moore <clm@codesourcery.com>
 224             David Ung  <davidu@mips.com>
 225
 226         * mips-opc.c: Change membership to I1 for instructions ssnop and
 227         ehb.
 228
 229 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 230
 231         * i386-dis.c (sib): New.
 232         (get_sib): Likewise.
 233         (print_insn): Call get_sib.
 234         OP_E_memory): Use sib.
 235
 236 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 237
 238         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 239         * mips-opc.c (I16): Remove.
 240         (mips_builtin_op): Reclassify jalx.
 241
 242 2010-05-19  Alan Modra  <amodra@gmail.com>
 243
 244         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 245         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 246
 247 2010-05-13  Alan Modra  <amodra@gmail.com>
 248
 249         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 250
 251 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 252
 253         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 254         format.
 255         (print_insn_thumb16): Add support for new %W format.
 256
 257 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 258
 259         * Makefile.in: Regenerate with automake 1.11.1.
 260         * aclocal.m4: Ditto.
 261
 262 2010-05-05  Nick Clifton  <nickc@redhat.com>
 263
 264         * po/es.po: Updated Spanish translation.
 265
 266 2010-04-22  Nick Clifton  <nickc@redhat.com>
 267
 268         * po/opcodes.pot: Updated by the Translation project.
 269         * po/vi.po: Updated Vietnamese translation.
 270
 271 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 272
 273         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 274         bits in opcode.
 275
 276 2010-04-09  Nick Clifton  <nickc@redhat.com>
 277
 278         * i386-dis.c (print_insn): Remove unused variable op.
 279         (OP_sI): Remove unused variable mask.
 280
 281 2010-04-07  Alan Modra  <amodra@gmail.com>
 282
 283         * configure: Regenerate.
 284
 285 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 286
 287         * ppc-opc.c (RBOPT): New define.
 288         ("dccci"): Enable for PPCA2.  Make operands optional.
 289         ("iccci"): Likewise.  Do not deprecate for PPC476.
 290
 291 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 292
 293         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 294
 295 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 296
 297         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 298         * Makefile.in: Regenerate.
 299         * configure.in (bfd_tic6x_arch): New.
 300         * configure: Regenerate.
 301         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 302         (disassembler): Handle TI C6X.
 303         * tic6x-dis.c: New.
 304
 305 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 306
 307         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 308
 309 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 310
 311         * dis-buf.c (buffer_read_memory): Give error for reading just
 312         before the start of memory.
 313
 314 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 315             Quentin Neill <quentin.neill@amd.com>
 316
 317         * i386-dis.c (OP_LWP_I): Removed.
 318         (reg_table): Do not use OP_LWP_I, use Iq.
 319         (OP_LWPCB_E): Remove use of names16.
 320         (OP_LWP_E): Same.
 321         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 322         should not set the Vex.length bit.
 323         * i386-tbl.h: Regenerated.
 324
 325 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 326
 327         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 328
 329 2010-02-24  Nick Clifton  <nickc@redhat.com>
 330
 331         PR binutils/6773
 332         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 333         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 334         (thumb32_opcodes): Likewise.
 335
 336 2010-02-15  Nick Clifton  <nickc@redhat.com>
 337
 338         * po/vi.po: Updated Vietnamese translation.
 339
 340 2010-02-12  Doug Evans  <dje@sebabeach.org>
 341
 342         * lm32-opinst.c: Regenerate.
 343
 344 2010-02-11  Doug Evans  <dje@sebabeach.org>
 345
 346         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 347         (print_address): Delete CGEN_PRINT_ADDRESS.
 348         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 349         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 350         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 351         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 352
 353         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 354         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 355         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 356         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 357         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 358         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 359         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 360         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 361         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 362         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 363         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 364         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 365
 366 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 367
 368         * i386-dis.c: Update copyright.
 369         * i386-gen.c: Likewise.
 370         * i386-opc.h: Likewise.
 371         * i386-opc.tbl: Likewise.
 372
 373 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 374             Sebastian Pop  <sebastian.pop@amd.com>
 375
 376         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 377         function to handle 5th imm8 operand.
 378         (PREFIX_VEX_3A48): Added.
 379         (PREFIX_VEX_3A49): Added.
 380         (VEX_W_3A48_P_2): Added.
 381         (VEX_W_3A49_P_2): Added.
 382         (prefix table): Added entries for PREFIX_VEX_3A48
 383         and PREFIX_VEX_3A49.
 384         (vex table): Added entries for VEX_W_3A48_P_2 and
 385         and VEX_W_3A49_P_2.
 386         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 387         for Vec_Imm4 operands.
 388         * i386-opc.h (enum): Added Vec_Imm4.
 389         (i386_operand_type): Added vec_imm4.
 390         * i386-opc.tbl: Add entries for vpermilp[ds].
 391         * i386-init.h: Regenerated.
 392         * i386-tbl.h: Regenerated.
 393
 394 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 395
 396         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 397         and "pwr7".  Move "a2" into alphabetical order.
 398
 399 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 400
 401         * ppc-dis.c (ppc_opts): Add titan entry.
 402         * ppc-opc.c (TITAN, MULHW): Define.
 403         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 404
 405 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 406
 407         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 408         to CPU_BDVER1_FLAGS
 409         * i386-init.h: Regenerated.
 410
 411 2010-02-03  Anthony Green  <green@moxielogic.com>
 412
 413         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 414         0x0f, and make 0x00 an illegal instruction.
 415
 416 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 417
 418         * opcodes/arm-dis.c (struct arm_private_data): New.
 419         (print_insn_coprocessor, print_insn_arm): Update to use struct
 420         arm_private_data.
 421         (is_mapping_symbol, get_map_sym_type): New functions.
 422         (get_sym_code_type): Check the symbol's section.  Do not check
 423         mapping symbols.
 424         (print_insn): Default to disassembling ARM mode code.  Check
 425         for mapping symbols separately from other symbols.  Use
 426         struct arm_private_data.
 427
 428 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 429
 430         * i386-dis.c (EXVexWdqScalar): New.
 431         (vex_scalar_w_dq_mode): Likewise.
 432         (prefix_table): Update entries for PREFIX_VEX_3899,
 433         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 434         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 435         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 436         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 437         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 438         (OP_EX): Likewise.
 439
 440 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 441
 442         * i386-dis.c (XMScalar): New.
 443         (EXdScalar): Likewise.
 444         (EXqScalar): Likewise.
 445         (EXqScalarS): Likewise.
 446         (VexScalar): Likewise.
 447         (EXdVexScalarS): Likewise.
 448         (EXqVexScalarS): Likewise.
 449         (XMVexScalar): Likewise.
 450         (scalar_mode): Likewise.
 451         (d_scalar_mode): Likewise.
 452         (d_scalar_swap_mode): Likewise.
 453         (q_scalar_mode): Likewise.
 454         (q_scalar_swap_mode): Likewise.
 455         (vex_scalar_mode): Likewise.
 456         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 457         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 458         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 459         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 460         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 461         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 462         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 463         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 464         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 465         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 466         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 467         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 468         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 469         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 470         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 471         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 472         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 473         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 474         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 475         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 476         q_scalar_mode, q_scalar_swap_mode.
 477         (OP_XMM): Handle scalar_mode.
 478         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 479         and q_scalar_swap_mode.
 480         (OP_VEX): Handle vex_scalar_mode.
 481
 482 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 483
 484         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 485
 486 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 487
 488         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 489
 490 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 491
 492         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 493
 494 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 495
 496         * i386-dis.c (Bad_Opcode): New.
 497         (bad_opcode): Likewise.
 498         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 499         (dis386_twobyte): Likewise.
 500         (reg_table): Likewise.
 501         (prefix_table): Likewise.
 502         (x86_64_table): Likewise.
 503         (vex_len_table): Likewise.
 504         (vex_w_table): Likewise.
 505         (mod_table): Likewise.
 506         (rm_table): Likewise.
 507         (float_reg): Likewise.
 508         (reg_table): Remove trailing "(bad)" entries.
 509         (prefix_table): Likewise.
 510         (x86_64_table): Likewise.
 511         (vex_len_table): Likewise.
 512         (vex_w_table): Likewise.
 513         (mod_table): Likewise.
 514         (rm_table): Likewise.
 515         (get_valid_dis386): Handle bytemode 0.
 516
 517 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 518
 519         * i386-opc.h (VEXScalar): New.
 520
 521         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 522         instructions.
 523         * i386-tbl.h: Regenerated.
 524
 525 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 526
 527         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 528
 529         * i386-opc.tbl: Add xsave64 and xrstor64.
 530         * i386-tbl.h: Regenerated.
 531
 532 2010-01-20  Nick Clifton  <nickc@redhat.com>
 533
 534         PR 11170
 535         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 536         based post-indexed addressing.
 537
 538 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 539
 540         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 541         * i386-tbl.h: Regenerated.
 542
 543 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 544
 545         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 546         comments.
 547
 548 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 549
 550         * i386-dis.c (names_mm): New.
 551         (intel_names_mm): Likewise.
 552         (att_names_mm): Likewise.
 553         (names_xmm): Likewise.
 554         (intel_names_xmm): Likewise.
 555         (att_names_xmm): Likewise.
 556         (names_ymm): Likewise.
 557         (intel_names_ymm): Likewise.
 558         (att_names_ymm): Likewise.
 559         (print_insn): Set names_mm, names_xmm and names_ymm.
 560         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 561         (OP_XMM): Likewise.
 562         (OP_EM): Likewise.
 563         (OP_EMC): Likewise.
 564         (OP_MXC): Likewise.
 565         (OP_EX): Likewise.
 566         (XMM_Fixup): Likewise.
 567         (OP_VEX): Likewise.
 568         (OP_EX_VexReg): Likewise.
 569         (OP_Vex_2src): Likewise.
 570         (OP_Vex_2src_1): Likewise.
 571         (OP_Vex_2src_2): Likewise.
 572         (OP_REG_VexI4): Likewise.
 573
 574 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 575
 576         * i386-dis.c (print_insn): Update comments.
 577
 578 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 579
 580         * i386-dis.c (rex_original): Removed.
 581         (ckprefix): Remove rex_original.
 582         (print_insn): Update comments.
 583
 584 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 585
 586         * Makefile.in: Regenerate.
 587         * configure: Regenerate.
 588
 589 2010-01-07  Doug Evans  <dje@sebabeach.org>
 590
 591         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 592         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 593         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 594         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 595         * xstormy16-ibld.c: Regenerate.
 596
 597 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 598
 599         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 600         * i386-init.h: Regenerated.
 601
 602 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 603
 604         * arm-dis.c (print_insn): Fixed search for next symbol and data
 605         dumping condition, and the initial mapping symbol state.
 606
 607 2010-01-05  Doug Evans  <dje@sebabeach.org>
 608
 609         * cgen-ibld.in: #include "cgen/basic-modes.h".
 610         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 611         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 612         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 613         * xstormy16-ibld.c: Regenerate.
 614
 615 2010-01-04  Nick Clifton  <nickc@redhat.com>
 616
 617         PR 11123
 618         * arm-dis.c (print_insn_coprocessor): Initialise value.
 619
 620 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 621
 622         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 623
 624 2010-01-02  Doug Evans  <dje@sebabeach.org>
 625
 626         * cgen-asm.in: Update copyright year.
 627         * cgen-dis.in: Update copyright year.
 628         * cgen-ibld.in: Update copyright year.
 629         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 630         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 631         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 632         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 633         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 634         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 635         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 636         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 637         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 638         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 639         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 640         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 641         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 642         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 643         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 644         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 645         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 646         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 647         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 648         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 649         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 650
 651 For older changes see ChangeLog-2009
 652 \f
 653 Local Variables:
 654 mode: change-log
 655 left-margin: 8
 656 fill-column: 74
 657 version-control: never
 658 End: