daily update
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
2
3 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
4 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
5 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
6 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
7 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
8
9 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
10
11 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
12 rather than add it.
13
14 2004-09-30 Paul Brook <paul@codesourcery.com>
15
16 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
17 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
18
19 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
20
21 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
22 (CONFIG_STATUS_DEPENDENCIES): New.
23 (Makefile): Removed.
24 (config.status): Likewise.
25 * Makefile.in: Regenerated.
26
27 2004-09-17 Alan Modra <amodra@bigpond.net.au>
28
29 * Makefile.am: Run "make dep-am".
30 * Makefile.in: Regenerate.
31 * aclocal.m4: Regenerate.
32 * configure: Regenerate.
33 * po/POTFILES.in: Regenerate.
34 * po/opcodes.pot: Regenerate.
35
36 2004-09-11 Andreas Schwab <schwab@suse.de>
37
38 * configure: Rebuild.
39
40 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
41
42 * ppc-opc.c (L): Make this field not optional.
43
44 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
45
46 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
47 Fix parameter to 'm[t|f]csr' insns.
48
49 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
50
51 * configure.in: Autoupdate to autoconf 2.59.
52 * aclocal.m4: Rebuild with aclocal 1.4p6.
53 * configure: Rebuild with autoconf 2.59.
54 * Makefile.in: Rebuild with automake 1.4p6 (picking up
55 bfd changes for autoconf 2.59 on the way).
56 * config.in: Rebuild with autoheader 2.59.
57
58 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
59
60 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
61
62 2004-07-30 Michal Ludvig <mludvig@suse.cz>
63
64 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
65 (GRPPADLCK2): New define.
66 (twobyte_has_modrm): True for 0xA6.
67 (grps): GRPPADLCK2 for opcode 0xA6.
68
69 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
70
71 Introduce SH2a support.
72 * sh-opc.h (arch_sh2a_base): Renumber.
73 (arch_sh2a_nofpu_base): Remove.
74 (arch_sh_base_mask): Adjust.
75 (arch_opann_mask): New.
76 (arch_sh2a, arch_sh2a_nofpu): Adjust.
77 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
78 (sh_table): Adjust whitespace.
79 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
80 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
81 instruction list throughout.
82 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
83 of arch_sh2a in instruction list throughout.
84 (arch_sh2e_up): Accomodate above changes.
85 (arch_sh2_up): Ditto.
86 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
87 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
88 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
89 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
90 * sh-opc.h (arch_sh2a_nofpu): New.
91 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
92 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
93 instruction.
94 2004-01-20 DJ Delorie <dj@redhat.com>
95 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
96 2003-12-29 DJ Delorie <dj@redhat.com>
97 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
98 sh_opcode_info, sh_table): Add sh2a support.
99 (arch_op32): New, to tag 32-bit opcodes.
100 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
101 2003-12-02 Michael Snyder <msnyder@redhat.com>
102 * sh-opc.h (arch_sh2a): Add.
103 * sh-dis.c (arch_sh2a): Handle.
104 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
105
106 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
107
108 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
109
110 2004-07-22 Nick Clifton <nickc@redhat.com>
111
112 PR/280
113 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
114 insns - this is done by objdump itself.
115 * h8500-dis.c (print_insn_h8500): Likewise.
116
117 2004-07-21 Jan Beulich <jbeulich@novell.com>
118
119 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
120 regardless of address size prefix in effect.
121 (ptr_reg): Size or address registers does not depend on rex64, but
122 on the presence of an address size override.
123 (OP_MMX): Use rex.x only for xmm registers.
124 (OP_EM): Use rex.z only for xmm registers.
125
126 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
127
128 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
129 move/branch operations to the bottom so that VR5400 multimedia
130 instructions take precedence in disassembly.
131
132 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
133
134 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
135 ISA-specific "break" encoding.
136
137 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
138
139 * arm-opc.h: Fix typo in comment.
140
141 2004-07-11 Andreas Schwab <schwab@suse.de>
142
143 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
144
145 2004-07-09 Andreas Schwab <schwab@suse.de>
146
147 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
148
149 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
150
151 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
152 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
153 (crx-dis.lo): New target.
154 (crx-opc.lo): Likewise.
155 * Makefile.in: Regenerate.
156 * configure.in: Handle bfd_crx_arch.
157 * configure: Regenerate.
158 * crx-dis.c: New file.
159 * crx-opc.c: New file.
160 * disassemble.c (ARCH_crx): Define.
161 (disassembler): Handle ARCH_crx.
162
163 2004-06-29 James E Wilson <wilson@specifixinc.com>
164
165 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
166 * ia64-asmtab.c: Regnerate.
167
168 2004-06-28 Alan Modra <amodra@bigpond.net.au>
169
170 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
171 (extract_fxm): Don't test dialect.
172 (XFXFXM_MASK): Include the power4 bit.
173 (XFXM): Add p4 param.
174 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
175
176 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
177
178 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
179 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
180
181 2004-06-26 Alan Modra <amodra@bigpond.net.au>
182
183 * ppc-opc.c (BH, XLBH_MASK): Define.
184 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
185
186 2004-06-24 Alan Modra <amodra@bigpond.net.au>
187
188 * i386-dis.c (x_mode): Comment.
189 (two_source_ops): File scope.
190 (float_mem): Correct fisttpll and fistpll.
191 (float_mem_mode): New table.
192 (dofloat): Use it.
193 (OP_E): Correct intel mode PTR output.
194 (ptr_reg): Use open_char and close_char.
195 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
196 operands. Set two_source_ops.
197
198 2004-06-15 Alan Modra <amodra@bigpond.net.au>
199
200 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
201 instead of _raw_size.
202
203 2004-06-08 Jakub Jelinek <jakub@redhat.com>
204
205 * ia64-gen.c (in_iclass): Handle more postinc st
206 and ld variants.
207 * ia64-asmtab.c: Rebuilt.
208
209 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
210
211 * s390-opc.txt: Correct architecture mask for some opcodes.
212 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
213 in the esa mode as well.
214
215 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
216
217 * sh-dis.c (target_arch): Make unsigned.
218 (print_insn_sh): Replace (most of) switch with a call to
219 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
220 * sh-opc.h: Redefine architecture flags values.
221 Add sh3-nommu architecture.
222 Reorganise <arch>_up macros so they make more visual sense.
223 (SH_MERGE_ARCH_SET): Define new macro.
224 (SH_VALID_BASE_ARCH_SET): Likewise.
225 (SH_VALID_MMU_ARCH_SET): Likewise.
226 (SH_VALID_CO_ARCH_SET): Likewise.
227 (SH_VALID_ARCH_SET): Likewise.
228 (SH_MERGE_ARCH_SET_VALID): Likewise.
229 (SH_ARCH_SET_HAS_FPU): Likewise.
230 (SH_ARCH_SET_HAS_DSP): Likewise.
231 (SH_ARCH_UNKNOWN_ARCH): Likewise.
232 (sh_get_arch_from_bfd_mach): Add prototype.
233 (sh_get_arch_up_from_bfd_mach): Likewise.
234 (sh_get_bfd_mach_from_arch_set): Likewise.
235 (sh_merge_bfd_arc): Likewise.
236
237 2004-05-24 Peter Barada <peter@the-baradas.com>
238
239 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
240 into new match_insn_m68k function. Loop over canidate
241 matches and select first that completely matches.
242 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
243 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
244 to verify addressing for MAC/EMAC.
245 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
246 reigster halves since 'fpu' and 'spl' look misleading.
247 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
248 * m68k-opc.c: Rearragne mac/emac cases to use longest for
249 first, tighten up match masks.
250 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
251 'size' from special case code in print_insn_m68k to
252 determine decode size of insns.
253
254 2004-05-19 Alan Modra <amodra@bigpond.net.au>
255
256 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
257 well as when -mpower4.
258
259 2004-05-13 Nick Clifton <nickc@redhat.com>
260
261 * po/fr.po: Updated French translation.
262
263 2004-05-05 Peter Barada <peter@the-baradas.com>
264
265 * m68k-dis.c(print_insn_m68k): Add new chips, use core
266 variants in arch_mask. Only set m68881/68851 for 68k chips.
267 * m68k-op.c: Switch from ColdFire chips to core variants.
268
269 2004-05-05 Alan Modra <amodra@bigpond.net.au>
270
271 PR 147.
272 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
273
274 2004-04-29 Ben Elliston <bje@au.ibm.com>
275
276 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
277 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
278
279 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
280
281 * sh-dis.c (print_insn_sh): Print the value in constant pool
282 as a symbol if it looks like a symbol.
283
284 2004-04-22 Peter Barada <peter@the-baradas.com>
285
286 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
287 appropriate ColdFire architectures.
288 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
289 mask addressing.
290 Add EMAC instructions, fix MAC instructions. Remove
291 macmw/macml/msacmw/msacml instructions since mask addressing now
292 supported.
293
294 2004-04-20 Jakub Jelinek <jakub@redhat.com>
295
296 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
297 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
298 suffix. Use fmov*x macros, create all 3 fpsize variants in one
299 macro. Adjust all users.
300
301 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
302
303 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
304 separately.
305
306 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
307
308 * m32r-asm.c: Regenerate.
309
310 2004-03-29 Stan Shebs <shebs@apple.com>
311
312 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
313 used.
314
315 2004-03-19 Alan Modra <amodra@bigpond.net.au>
316
317 * aclocal.m4: Regenerate.
318 * config.in: Regenerate.
319 * configure: Regenerate.
320 * po/POTFILES.in: Regenerate.
321 * po/opcodes.pot: Regenerate.
322
323 2004-03-16 Alan Modra <amodra@bigpond.net.au>
324
325 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
326 PPC_OPERANDS_GPR_0.
327 * ppc-opc.c (RA0): Define.
328 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
329 (RAOPT): Rename from RAO. Update all uses.
330 (powerpc_opcodes): Use RA0 as appropriate.
331
332 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
333
334 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
335
336 2004-03-15 Alan Modra <amodra@bigpond.net.au>
337
338 * sparc-dis.c (print_insn_sparc): Update getword prototype.
339
340 2004-03-12 Michal Ludvig <mludvig@suse.cz>
341
342 * i386-dis.c (GRPPLOCK): Delete.
343 (grps): Delete GRPPLOCK entry.
344
345 2004-03-12 Alan Modra <amodra@bigpond.net.au>
346
347 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
348 (M, Mp): Use OP_M.
349 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
350 (GRPPADLCK): Define.
351 (dis386): Use NOP_Fixup on "nop".
352 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
353 (twobyte_has_modrm): Set for 0xa7.
354 (padlock_table): Delete. Move to..
355 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
356 and clflush.
357 (print_insn): Revert PADLOCK_SPECIAL code.
358 (OP_E): Delete sfence, lfence, mfence checks.
359
360 2004-03-12 Jakub Jelinek <jakub@redhat.com>
361
362 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
363 (INVLPG_Fixup): New function.
364 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
365
366 2004-03-12 Michal Ludvig <mludvig@suse.cz>
367
368 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
369 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
370 (padlock_table): New struct with PadLock instructions.
371 (print_insn): Handle PADLOCK_SPECIAL.
372
373 2004-03-12 Alan Modra <amodra@bigpond.net.au>
374
375 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
376 (OP_E): Twiddle clflush to sfence here.
377
378 2004-03-08 Nick Clifton <nickc@redhat.com>
379
380 * po/de.po: Updated German translation.
381
382 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
383
384 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
385 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
386 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
387 accordingly.
388
389 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
390
391 * frv-asm.c: Regenerate.
392 * frv-desc.c: Regenerate.
393 * frv-desc.h: Regenerate.
394 * frv-dis.c: Regenerate.
395 * frv-ibld.c: Regenerate.
396 * frv-opc.c: Regenerate.
397 * frv-opc.h: Regenerate.
398
399 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
400
401 * frv-desc.c, frv-opc.c: Regenerate.
402
403 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
404
405 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
406
407 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
408
409 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
410 Also correct mistake in the comment.
411
412 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
413
414 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
415 ensure that double registers have even numbers.
416 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
417 that reserved instruction 0xfffd does not decode the same
418 as 0xfdfd (ftrv).
419 * sh-opc.h: Add REG_N_D nibble type and use it whereever
420 REG_N refers to a double register.
421 Add REG_N_B01 nibble type and use it instead of REG_NM
422 in ftrv.
423 Adjust the bit patterns in a few comments.
424
425 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
426
427 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
428
429 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
430
431 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
432
433 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
434
435 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
436
437 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
438
439 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
440 mtivor32, mtivor33, mtivor34.
441
442 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
443
444 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
445
446 2004-02-10 Petko Manolov <petkan@nucleusys.com>
447
448 * arm-opc.h Maverick accumulator register opcode fixes.
449
450 2004-02-13 Ben Elliston <bje@wasabisystems.com>
451
452 * m32r-dis.c: Regenerate.
453
454 2004-01-27 Michael Snyder <msnyder@redhat.com>
455
456 * sh-opc.h (sh_table): "fsrra", not "fssra".
457
458 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
459
460 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
461 contraints.
462
463 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
464
465 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
466
467 2004-01-19 Alan Modra <amodra@bigpond.net.au>
468
469 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
470 1. Don't print scale factor on AT&T mode when index missing.
471
472 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
473
474 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
475 when loaded into XR registers.
476
477 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
478
479 * frv-desc.h: Regenerate.
480 * frv-desc.c: Regenerate.
481 * frv-opc.c: Regenerate.
482
483 2004-01-13 Michael Snyder <msnyder@redhat.com>
484
485 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
486
487 2004-01-09 Paul Brook <paul@codesourcery.com>
488
489 * arm-opc.h (arm_opcodes): Move generic mcrr after known
490 specific opcodes.
491
492 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
493
494 * Makefile.am (libopcodes_la_DEPENDENCIES)
495 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
496 comment about the problem.
497 * Makefile.in: Regenerate.
498
499 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
500
501 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
502 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
503 cut&paste errors in shifting/truncating numerical operands.
504 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
505 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
506 (parse_uslo16): Likewise.
507 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
508 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
509 (parse_s12): Likewise.
510 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
511 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
512 (parse_uslo16): Likewise.
513 (parse_uhi16): Parse gothi and gotfuncdeschi.
514 (parse_d12): Parse got12 and gotfuncdesc12.
515 (parse_s12): Likewise.
516
517 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
518
519 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
520 instruction which looks similar to an 'rla' instruction.
521
522 For older changes see ChangeLog-0203
523 \f
524 Local Variables:
525 mode: change-log
526 left-margin: 8
527 fill-column: 74
528 version-control: never
529 End:
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