opcodes/ChangeLog

   1 2020-01-30  Jan Beulich  <jbeulich@suse.com>
   2
   3         * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
   4         forms.
   5         (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
   6         DefaultSize.
   7         * i386-tbl.h: Re-generate.
   8
   9 2020-01-30  Alan Modra  <amodra@gmail.com>
  10
  11         * tic4x-dis.c (tic4x_dp): Make unsigned.
  12
  13 2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
  14             Jan Beulich  <jbeulich@suse.com>
  15
  16         PR binutils/25445
  17         * i386-dis.c (MOVSXD_Fixup): New function.
  18         (movsxd_mode): New enum.
  19         (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
  20         (intel_operand_size): Handle movsxd_mode.
  21         (OP_E_register): Likewise.
  22         (OP_G): Likewise.
  23         * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
  24         register on movsxd.  Add movsxd with 16-bit destination register
  25         for AMD64 and Intel64 ISAs.
  26         * i386-tbl.h: Regenerated.
  27
  28 2020-01-27  Tamar Christina  <tamar.christina@arm.com>
  29
  30         PR 25403
  31         * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
  32         * aarch64-asm-2.c: Regenerate
  33         * aarch64-dis-2.c: Likewise.
  34         * aarch64-opc-2.c: Likewise.
  35
  36 2020-01-21  Jan Beulich  <jbeulich@suse.com>
  37
  38         * i386-opc.tbl (sysret): Drop DefaultSize.
  39         * i386-tbl.h: Re-generate.
  40
  41 2020-01-21  Jan Beulich  <jbeulich@suse.com>
  42
  43         * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
  44         Dword.
  45         (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
  46         * i386-tbl.h: Re-generate.
  47
  48 2020-01-20  Nick Clifton  <nickc@redhat.com>
  49
  50         * po/de.po: Updated German translation.
  51         * po/pt_BR.po: Updated Brazilian Portuguese translation.
  52         * po/uk.po: Updated Ukranian translation.
  53
  54 2020-01-20  Alan Modra  <amodra@gmail.com>
  55
  56         * hppa-dis.c (fput_const): Remove useless cast.
  57
  58 2020-01-20  Alan Modra  <amodra@gmail.com>
  59
  60         * arm-dis.c (print_insn_arm): Wrap 'T' value.
  61
  62 2020-01-18  Nick Clifton  <nickc@redhat.com>
  63
  64         * configure: Regenerate.
  65         * po/opcodes.pot: Regenerate.
  66
  67 2020-01-18  Nick Clifton  <nickc@redhat.com>
  68
  69         Binutils 2.34 branch created.
  70
  71 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
  72
  73         * opintl.h: Fix spelling error (seperate).
  74
  75 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
  76
  77         * i386-opc.tbl: Add {vex} pseudo prefix.
  78         * i386-tbl.h: Regenerated.
  79
  80 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  81
  82         PR 25376
  83         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
  84         (neon_opcodes): Likewise.
  85         (select_arm_features): Make sure we enable MVE bits when selecting
  86         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
  87         any architecture.
  88
  89 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  90
  91         * i386-opc.tbl: Drop stale comment from XOP section.
  92
  93 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  94
  95         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
  96         (extractps): Add VexWIG to SSE2AVX forms.
  97         * i386-tbl.h: Re-generate.
  98
  99 2020-01-16  Jan Beulich  <jbeulich@suse.com>
 100
 101         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
 102         Size64 from and use VexW1 on SSE2AVX forms.
 103         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
 104         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
 105         * i386-tbl.h: Re-generate.
 106
 107 2020-01-15  Alan Modra  <amodra@gmail.com>
 108
 109         * tic4x-dis.c (tic4x_version): Make unsigned long.
 110         (optab, optab_special, registernames): New file scope vars.
 111         (tic4x_print_register): Set up registernames rather than
 112         malloc'd registertable.
 113         (tic4x_disassemble): Delete optable and optable_special.  Use
 114         optab and optab_special instead.  Throw away old optab,
 115         optab_special and registernames when info->mach changes.
 116
 117 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
 118
 119         PR 25377
 120         * z80-dis.c (suffix): Use .db instruction to generate double
 121         prefix.
 122
 123 2020-01-14  Alan Modra  <amodra@gmail.com>
 124
 125         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
 126         values to unsigned before shifting.
 127
 128 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
 129
 130         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
 131         flow instructions.
 132         (print_insn_thumb16, print_insn_thumb32): Likewise.
 133         (print_insn): Initialize the insn info.
 134         * i386-dis.c (print_insn): Initialize the insn info fields, and
 135         detect jumps.
 136
 137 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 138
 139         * arc-opc.c (C_NE): Make it required.
 140
 141 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
 142
 143         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
 144         reserved register name.
 145
 146 2020-01-13  Alan Modra  <amodra@gmail.com>
 147
 148         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
 149         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
 150
 151 2020-01-13  Alan Modra  <amodra@gmail.com>
 152
 153         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
 154         result of wasm_read_leb128 in a uint64_t and check that bits
 155         are not lost when copying to other locals.  Use uint32_t for
 156         most locals.  Use PRId64 when printing int64_t.
 157
 158 2020-01-13  Alan Modra  <amodra@gmail.com>
 159
 160         * score-dis.c: Formatting.
 161         * score7-dis.c: Formatting.
 162
 163 2020-01-13  Alan Modra  <amodra@gmail.com>
 164
 165         * score-dis.c (print_insn_score48): Use unsigned variables for
 166         unsigned values.  Don't left shift negative values.
 167         (print_insn_score32): Likewise.
 168         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 169
 170 2020-01-13  Alan Modra  <amodra@gmail.com>
 171
 172         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 173
 174 2020-01-13  Alan Modra  <amodra@gmail.com>
 175
 176         * fr30-ibld.c: Regenerate.
 177
 178 2020-01-13  Alan Modra  <amodra@gmail.com>
 179
 180         * xgate-dis.c (print_insn): Don't left shift signed value.
 181         (ripBits): Formatting, use 1u.
 182
 183 2020-01-10  Alan Modra  <amodra@gmail.com>
 184
 185         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 186         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 187
 188 2020-01-10  Alan Modra  <amodra@gmail.com>
 189
 190         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 191         and XRREG value earlier to avoid a shift with negative exponent.
 192         * m10200-dis.c (disassemble): Similarly.
 193
 194 2020-01-09  Nick Clifton  <nickc@redhat.com>
 195
 196         PR 25224
 197         * z80-dis.c (ld_ii_ii): Use correct cast.
 198
 199 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 200
 201         PR 25224
 202         * z80-dis.c (ld_ii_ii): Use character constant when checking
 203         opcode byte value.
 204
 205 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 206
 207         * i386-dis.c (SEP_Fixup): New.
 208         (SEP): Define.
 209         (dis386_twobyte): Use it for sysenter/sysexit.
 210         (enum x86_64_isa): Change amd64 enumerator to value 1.
 211         (OP_J): Compare isa64 against intel64 instead of amd64.
 212         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 213         forms.
 214         * i386-tbl.h: Re-generate.
 215
 216 2020-01-08  Alan Modra  <amodra@gmail.com>
 217
 218         * z8k-dis.c: Include libiberty.h
 219         (instr_data_s): Make max_fetched unsigned.
 220         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 221         Don't exceed byte_info bounds.
 222         (output_instr): Make num_bytes unsigned.
 223         (unpack_instr): Likewise for nibl_count and loop.
 224         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 225         idx unsigned.
 226         * z8k-opc.h: Regenerate.
 227
 228 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 229
 230         * arc-tbl.h (llock): Use 'LLOCK' as class.
 231         (llockd): Likewise.
 232         (scond): Use 'SCOND' as class.
 233         (scondd): Likewise.
 234         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 235         (scondd): Likewise.
 236
 237 2020-01-06  Alan Modra  <amodra@gmail.com>
 238
 239         * m32c-ibld.c: Regenerate.
 240
 241 2020-01-06  Alan Modra  <amodra@gmail.com>
 242
 243         PR 25344
 244         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 245         Peek at next byte to prevent recursion on repeated prefix bytes.
 246         Ensure uninitialised "mybuf" is not accessed.
 247         (print_insn_z80): Don't zero n_fetch and n_used here,..
 248         (print_insn_z80_buf): ..do it here instead.
 249
 250 2020-01-04  Alan Modra  <amodra@gmail.com>
 251
 252         * m32r-ibld.c: Regenerate.
 253
 254 2020-01-04  Alan Modra  <amodra@gmail.com>
 255
 256         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 257
 258 2020-01-04  Alan Modra  <amodra@gmail.com>
 259
 260         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 261
 262 2020-01-04  Alan Modra  <amodra@gmail.com>
 263
 264         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 265
 266 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 267
 268         * aarch64-tbl.h (aarch64_opcode_table): Use
 269         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 270
 271 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 272
 273         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 274         forms of SUDOT and USDOT.
 275
 276 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 277
 278         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 279         uzip{1,2}.
 280         * opcodes/aarch64-dis-2.c: Re-generate.
 281
 282 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 283
 284         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 285         FMMLA encoding.
 286         * opcodes/aarch64-dis-2.c: Re-generate.
 287
 288 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 289
 290         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 291
 292 2020-01-01  Alan Modra  <amodra@gmail.com>
 293
 294         Update year range in copyright notice of all files.
 295
 296 For older changes see ChangeLog-2019
 297 \f
 298 Copyright (C) 2020 Free Software Foundation, Inc.
 299
 300 Copying and distribution of this file, with or without modification,
 301 are permitted in any medium without royalty provided the copyright
 302 notice and this notice are preserved.
 303
 304 Local Variables:
 305 mode: change-log
 306 left-margin: 8
 307 fill-column: 74
 308 version-control: never
 309 End: