opcodes/ChangeLog

   1 2010-09-22  Robin Getz  <robin.getz@analog.com>
   2
   3         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
   4         register values greater than 8.
   5         (IS_RESERVEDREG, allreg, mostreg): New helpers.
   6         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
   7         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
   8         (decode_CC2dreg_0): Check valid CC register number.
   9
  10 2010-09-22  Robin Getz  <robin.getz@analog.com>
  11
  12         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
  13
  14 2010-09-22  Robin Getz  <robin.getz@analog.com>
  15
  16         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
  17         (reg_names): Likewise.
  18         (decode_statbits): Likewise; while reformatting to make manageable.
  19
  20 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  21
  22         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  23         (decode_pseudoOChar_0): New function.
  24         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  25
  26 2010-09-22  Robin Getz  <robin.getz@analog.com>
  27
  28         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  29         LSHIFT instead of SHIFT.
  30
  31 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * bfin-dis.c (constant_formats): Constify the whole structure.
  34         (fmtconst): Add const to return value.
  35         (reg_names): Mark const.
  36         (decode_multfunc): Mark s0/s1 as const.
  37         (decode_macfunc): Mark a/sop as const.
  38
  39 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  40
  41         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  42
  43 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  44
  45         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  46         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  47
  48 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  49
  50         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  51         dlx_insn_type array.
  52
  53 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  54
  55         PR binutils/11960
  56         * i386-dis.c (sIv): New.
  57         (dis386): Replace Iq with sIv on "pushT".
  58         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  59         (x86_64_table): Replace {T|}/{P|} with P.
  60         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  61         (OP_sI): Update v_mode.  Remove w_mode.
  62
  63 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  64
  65         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  66         on E500 and E500MC.
  67
  68 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  69
  70         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  71         prefetchw.
  72
  73 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  74
  75         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  76         to processor flags for PENTIUMPRO processors and later.
  77         * i386-opc.h (enum): Add CpuNop.
  78         (i386_cpu_flags): Add cpunop bit.
  79         * i386-opc.tbl: Change nop cpu_flags.
  80         * i386-init.h: Regenerated.
  81         * i386-tbl.h: Likewise.
  82
  83 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  84
  85         * i386-opc.h (enum): Fix typos in comments.
  86
  87 2010-08-06  Alan Modra  <amodra@gmail.com>
  88
  89         * disassemble.c: Formatting.
  90         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  91
  92 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  93
  94         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  95         * i386-tbl.h: Regenerated.
  96
  97 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  98
  99         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 100
 101         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 102         * i386-tbl.h: Regenerated.
 103
 104 2010-07-29  DJ Delorie  <dj@redhat.com>
 105
 106         * rx-decode.opc (SRR): New.
 107         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 108         r0,r0) and NOP3 (max r0,r0) special cases.
 109         * rx-decode.c: Regenerate.
 110
 111 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 112
 113         * i386-dis.c: Add 0F to VEX opcode enums.
 114
 115 2010-07-27  DJ Delorie  <dj@redhat.com>
 116
 117         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 118         (rx_decode_opcode): Likewise.
 119         * rx-decode.c: Regenerate.
 120
 121 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 122             Ina Pandit  <ina.pandit@kpitcummins.com>
 123
 124         * v850-dis.c (v850_sreg_names): Updated structure for system
 125         registers.
 126         (float_cc_names): new structure for condition codes.
 127         (print_value): Update the function that prints value.
 128         (get_operand_value): New function to get the operand value.
 129         (disassemble): Updated to handle the disassembly of instructions.
 130         (print_insn_v850): Updated function to print instruction for different
 131         families.
 132         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 133         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 134         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 135         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 136         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 137         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 138         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 139         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 140         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 141         (v850_operands): Update with the relocation name. Also update
 142         the instructions with specific set of processors.
 143
 144 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 145
 146         * arm-dis.c (print_insn_arm): Add cases for printing more
 147         symbolic operands.
 148         (print_insn_thumb32): Likewise.
 149
 150 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 151
 152         * mips-dis.c (print_insn_mips): Correct branch instruction type
 153         determination.
 154
 155 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 156
 157         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 158         type and delay slot determination.
 159         (print_insn_mips16): Extend branch instruction type and delay
 160         slot determination to cover all instructions.
 161         * mips16-opc.c (BR): Remove macro.
 162         (UBR, CBR): New macros.
 163         (mips16_opcodes): Update branch annotation for "b", "beqz",
 164         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 165         and "jrc".
 166
 167 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 168
 169         AVX Programming Reference (June, 2010)
 170         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 171         * i386-opc.tbl: Likewise.
 172         * i386-tbl.h: Regenerated.
 173
 174 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 175
 176         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 177
 178 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 179
 180         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 181         ppc_cpu_t before inverting.
 182         (ppc_parse_cpu): Likewise.
 183         (print_insn_powerpc): Likewise.
 184
 185 2010-07-03  Alan Modra  <amodra@gmail.com>
 186
 187         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 188         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 189         (PPC64, MFDEC2): Update.
 190         (NON32, NO371): Define.
 191         (powerpc_opcode): Update to not use old opcode flags, and avoid
 192         -m601 duplicates.
 193
 194 2010-07-03  DJ Delorie  <dj@delorie.com>
 195
 196         * m32c-ibld.c: Regenerate.
 197
 198 2010-07-03  Alan Modra  <amodra@gmail.com>
 199
 200         * ppc-opc.c (PWR2COM): Define.
 201         (PPCPWR2): Add PPC_OPCODE_COMMON.
 202         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 203         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 204         "rac" from -mcom.
 205
 206 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 207
 208         AVX Programming Reference (June, 2010)
 209         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 210         (PREFIX_0FAE_REG_1): Likewise.
 211         (PREFIX_0FAE_REG_2): Likewise.
 212         (PREFIX_0FAE_REG_3): Likewise.
 213         (PREFIX_VEX_3813): Likewise.
 214         (PREFIX_VEX_3A1D): Likewise.
 215         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 216         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 217         PREFIX_VEX_3A1D.
 218         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 219         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 220         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 221
 222         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 223         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 224         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 225
 226         * i386-opc.h (CpuXsaveopt): New.
 227         (CpuFSGSBase): Likewise.
 228         (CpuRdRnd): Likewise.
 229         (CpuF16C): Likewise.
 230         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 231         cpuf16c.
 232
 233         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 234         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 235         * i386-init.h: Regenerated.
 236         * i386-tbl.h: Likewise.
 237
 238 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 239
 240         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 241         and mtocrf on EFS.
 242
 243 2010-06-29  Alan Modra  <amodra@gmail.com>
 244
 245         * maxq-dis.c: Delete file.
 246         * Makefile.am: Remove references to maxq.
 247         * configure.in: Likewise.
 248         * disassemble.c: Likewise.
 249         * Makefile.in: Regenerate.
 250         * configure: Regenerate.
 251         * po/POTFILES.in: Regenerate.
 252
 253 2010-06-29  Alan Modra  <amodra@gmail.com>
 254
 255         * mep-dis.c: Regenerate.
 256
 257 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 258
 259         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 260
 261 2010-06-27  Alan Modra  <amodra@gmail.com>
 262
 263         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 264         (decodeInstr): Likewise.
 265         * dlx-dis.c (print_insn_dlx): Likewise.
 266         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 267         * maxq-dis.c (check_move, print_insn): Likewise.
 268         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 269         * msp430-dis.c (msp430_branchinstr): Likewise.
 270         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 271         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 272         * sparc-dis.c (print_insn_sparc): Likewise.
 273         * fr30-asm.c: Regenerate.
 274         * frv-asm.c: Regenerate.
 275         * ip2k-asm.c: Regenerate.
 276         * iq2000-asm.c: Regenerate.
 277         * lm32-asm.c: Regenerate.
 278         * m32c-asm.c: Regenerate.
 279         * m32r-asm.c: Regenerate.
 280         * mep-asm.c: Regenerate.
 281         * mt-asm.c: Regenerate.
 282         * openrisc-asm.c: Regenerate.
 283         * xc16x-asm.c: Regenerate.
 284         * xstormy16-asm.c: Regenerate.
 285
 286 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 287
 288         PR gas/11673
 289         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 290
 291 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 292
 293         PR binutils/11676
 294         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 295
 296 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 297
 298         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 299         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 300         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 301         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 302         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 303         Treat lwsync as msync on e500.
 304
 305 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 306
 307         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 308
 309 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 310
 311         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 312         constants is the same on 32-bit and 64-bit hosts.
 313
 314 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 315
 316         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 317         .short directives so that they can be reassembled.
 318
 319 2010-05-26  Catherine Moore <clm@codesourcery.com>
 320             David Ung  <davidu@mips.com>
 321
 322         * mips-opc.c: Change membership to I1 for instructions ssnop and
 323         ehb.
 324
 325 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 326
 327         * i386-dis.c (sib): New.
 328         (get_sib): Likewise.
 329         (print_insn): Call get_sib.
 330         OP_E_memory): Use sib.
 331
 332 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 333
 334         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 335         * mips-opc.c (I16): Remove.
 336         (mips_builtin_op): Reclassify jalx.
 337
 338 2010-05-19  Alan Modra  <amodra@gmail.com>
 339
 340         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 341         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 342
 343 2010-05-13  Alan Modra  <amodra@gmail.com>
 344
 345         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 346
 347 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 348
 349         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 350         format.
 351         (print_insn_thumb16): Add support for new %W format.
 352
 353 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 354
 355         * Makefile.in: Regenerate with automake 1.11.1.
 356         * aclocal.m4: Ditto.
 357
 358 2010-05-05  Nick Clifton  <nickc@redhat.com>
 359
 360         * po/es.po: Updated Spanish translation.
 361
 362 2010-04-22  Nick Clifton  <nickc@redhat.com>
 363
 364         * po/opcodes.pot: Updated by the Translation project.
 365         * po/vi.po: Updated Vietnamese translation.
 366
 367 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 368
 369         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 370         bits in opcode.
 371
 372 2010-04-09  Nick Clifton  <nickc@redhat.com>
 373
 374         * i386-dis.c (print_insn): Remove unused variable op.
 375         (OP_sI): Remove unused variable mask.
 376
 377 2010-04-07  Alan Modra  <amodra@gmail.com>
 378
 379         * configure: Regenerate.
 380
 381 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 382
 383         * ppc-opc.c (RBOPT): New define.
 384         ("dccci"): Enable for PPCA2.  Make operands optional.
 385         ("iccci"): Likewise.  Do not deprecate for PPC476.
 386
 387 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 388
 389         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 390
 391 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 392
 393         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 394         * Makefile.in: Regenerate.
 395         * configure.in (bfd_tic6x_arch): New.
 396         * configure: Regenerate.
 397         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 398         (disassembler): Handle TI C6X.
 399         * tic6x-dis.c: New.
 400
 401 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 402
 403         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 404
 405 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 406
 407         * dis-buf.c (buffer_read_memory): Give error for reading just
 408         before the start of memory.
 409
 410 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 411             Quentin Neill <quentin.neill@amd.com>
 412
 413         * i386-dis.c (OP_LWP_I): Removed.
 414         (reg_table): Do not use OP_LWP_I, use Iq.
 415         (OP_LWPCB_E): Remove use of names16.
 416         (OP_LWP_E): Same.
 417         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 418         should not set the Vex.length bit.
 419         * i386-tbl.h: Regenerated.
 420
 421 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 422
 423         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 424
 425 2010-02-24  Nick Clifton  <nickc@redhat.com>
 426
 427         PR binutils/6773
 428         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 429         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 430         (thumb32_opcodes): Likewise.
 431
 432 2010-02-15  Nick Clifton  <nickc@redhat.com>
 433
 434         * po/vi.po: Updated Vietnamese translation.
 435
 436 2010-02-12  Doug Evans  <dje@sebabeach.org>
 437
 438         * lm32-opinst.c: Regenerate.
 439
 440 2010-02-11  Doug Evans  <dje@sebabeach.org>
 441
 442         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 443         (print_address): Delete CGEN_PRINT_ADDRESS.
 444         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 445         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 446         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 447         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 448
 449         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 450         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 451         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 452         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 453         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 454         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 455         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 456         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 457         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 458         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 459         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 460         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 461
 462 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 463
 464         * i386-dis.c: Update copyright.
 465         * i386-gen.c: Likewise.
 466         * i386-opc.h: Likewise.
 467         * i386-opc.tbl: Likewise.
 468
 469 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 470             Sebastian Pop  <sebastian.pop@amd.com>
 471
 472         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 473         function to handle 5th imm8 operand.
 474         (PREFIX_VEX_3A48): Added.
 475         (PREFIX_VEX_3A49): Added.
 476         (VEX_W_3A48_P_2): Added.
 477         (VEX_W_3A49_P_2): Added.
 478         (prefix table): Added entries for PREFIX_VEX_3A48
 479         and PREFIX_VEX_3A49.
 480         (vex table): Added entries for VEX_W_3A48_P_2 and
 481         and VEX_W_3A49_P_2.
 482         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 483         for Vec_Imm4 operands.
 484         * i386-opc.h (enum): Added Vec_Imm4.
 485         (i386_operand_type): Added vec_imm4.
 486         * i386-opc.tbl: Add entries for vpermilp[ds].
 487         * i386-init.h: Regenerated.
 488         * i386-tbl.h: Regenerated.
 489
 490 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 491
 492         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 493         and "pwr7".  Move "a2" into alphabetical order.
 494
 495 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 496
 497         * ppc-dis.c (ppc_opts): Add titan entry.
 498         * ppc-opc.c (TITAN, MULHW): Define.
 499         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 500
 501 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 502
 503         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 504         to CPU_BDVER1_FLAGS
 505         * i386-init.h: Regenerated.
 506
 507 2010-02-03  Anthony Green  <green@moxielogic.com>
 508
 509         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 510         0x0f, and make 0x00 an illegal instruction.
 511
 512 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 513
 514         * opcodes/arm-dis.c (struct arm_private_data): New.
 515         (print_insn_coprocessor, print_insn_arm): Update to use struct
 516         arm_private_data.
 517         (is_mapping_symbol, get_map_sym_type): New functions.
 518         (get_sym_code_type): Check the symbol's section.  Do not check
 519         mapping symbols.
 520         (print_insn): Default to disassembling ARM mode code.  Check
 521         for mapping symbols separately from other symbols.  Use
 522         struct arm_private_data.
 523
 524 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 525
 526         * i386-dis.c (EXVexWdqScalar): New.
 527         (vex_scalar_w_dq_mode): Likewise.
 528         (prefix_table): Update entries for PREFIX_VEX_3899,
 529         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 530         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 531         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 532         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 533         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 534         (OP_EX): Likewise.
 535
 536 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 537
 538         * i386-dis.c (XMScalar): New.
 539         (EXdScalar): Likewise.
 540         (EXqScalar): Likewise.
 541         (EXqScalarS): Likewise.
 542         (VexScalar): Likewise.
 543         (EXdVexScalarS): Likewise.
 544         (EXqVexScalarS): Likewise.
 545         (XMVexScalar): Likewise.
 546         (scalar_mode): Likewise.
 547         (d_scalar_mode): Likewise.
 548         (d_scalar_swap_mode): Likewise.
 549         (q_scalar_mode): Likewise.
 550         (q_scalar_swap_mode): Likewise.
 551         (vex_scalar_mode): Likewise.
 552         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 553         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 554         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 555         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 556         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 557         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 558         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 559         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 560         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 561         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 562         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 563         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 564         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 565         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 566         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 567         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 568         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 569         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 570         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 571         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 572         q_scalar_mode, q_scalar_swap_mode.
 573         (OP_XMM): Handle scalar_mode.
 574         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 575         and q_scalar_swap_mode.
 576         (OP_VEX): Handle vex_scalar_mode.
 577
 578 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 579
 580         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 581
 582 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 583
 584         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 585
 586 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 587
 588         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 589
 590 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 591
 592         * i386-dis.c (Bad_Opcode): New.
 593         (bad_opcode): Likewise.
 594         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 595         (dis386_twobyte): Likewise.
 596         (reg_table): Likewise.
 597         (prefix_table): Likewise.
 598         (x86_64_table): Likewise.
 599         (vex_len_table): Likewise.
 600         (vex_w_table): Likewise.
 601         (mod_table): Likewise.
 602         (rm_table): Likewise.
 603         (float_reg): Likewise.
 604         (reg_table): Remove trailing "(bad)" entries.
 605         (prefix_table): Likewise.
 606         (x86_64_table): Likewise.
 607         (vex_len_table): Likewise.
 608         (vex_w_table): Likewise.
 609         (mod_table): Likewise.
 610         (rm_table): Likewise.
 611         (get_valid_dis386): Handle bytemode 0.
 612
 613 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 614
 615         * i386-opc.h (VEXScalar): New.
 616
 617         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 618         instructions.
 619         * i386-tbl.h: Regenerated.
 620
 621 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 622
 623         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 624
 625         * i386-opc.tbl: Add xsave64 and xrstor64.
 626         * i386-tbl.h: Regenerated.
 627
 628 2010-01-20  Nick Clifton  <nickc@redhat.com>
 629
 630         PR 11170
 631         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 632         based post-indexed addressing.
 633
 634 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 635
 636         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 637         * i386-tbl.h: Regenerated.
 638
 639 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 640
 641         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 642         comments.
 643
 644 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 645
 646         * i386-dis.c (names_mm): New.
 647         (intel_names_mm): Likewise.
 648         (att_names_mm): Likewise.
 649         (names_xmm): Likewise.
 650         (intel_names_xmm): Likewise.
 651         (att_names_xmm): Likewise.
 652         (names_ymm): Likewise.
 653         (intel_names_ymm): Likewise.
 654         (att_names_ymm): Likewise.
 655         (print_insn): Set names_mm, names_xmm and names_ymm.
 656         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 657         (OP_XMM): Likewise.
 658         (OP_EM): Likewise.
 659         (OP_EMC): Likewise.
 660         (OP_MXC): Likewise.
 661         (OP_EX): Likewise.
 662         (XMM_Fixup): Likewise.
 663         (OP_VEX): Likewise.
 664         (OP_EX_VexReg): Likewise.
 665         (OP_Vex_2src): Likewise.
 666         (OP_Vex_2src_1): Likewise.
 667         (OP_Vex_2src_2): Likewise.
 668         (OP_REG_VexI4): Likewise.
 669
 670 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 671
 672         * i386-dis.c (print_insn): Update comments.
 673
 674 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 675
 676         * i386-dis.c (rex_original): Removed.
 677         (ckprefix): Remove rex_original.
 678         (print_insn): Update comments.
 679
 680 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 681
 682         * Makefile.in: Regenerate.
 683         * configure: Regenerate.
 684
 685 2010-01-07  Doug Evans  <dje@sebabeach.org>
 686
 687         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 688         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 689         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 690         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 691         * xstormy16-ibld.c: Regenerate.
 692
 693 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 694
 695         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 696         * i386-init.h: Regenerated.
 697
 698 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 699
 700         * arm-dis.c (print_insn): Fixed search for next symbol and data
 701         dumping condition, and the initial mapping symbol state.
 702
 703 2010-01-05  Doug Evans  <dje@sebabeach.org>
 704
 705         * cgen-ibld.in: #include "cgen/basic-modes.h".
 706         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 707         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 708         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 709         * xstormy16-ibld.c: Regenerate.
 710
 711 2010-01-04  Nick Clifton  <nickc@redhat.com>
 712
 713         PR 11123
 714         * arm-dis.c (print_insn_coprocessor): Initialise value.
 715
 716 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 717
 718         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 719
 720 2010-01-02  Doug Evans  <dje@sebabeach.org>
 721
 722         * cgen-asm.in: Update copyright year.
 723         * cgen-dis.in: Update copyright year.
 724         * cgen-ibld.in: Update copyright year.
 725         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 726         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 727         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 728         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 729         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 730         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 731         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 732         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 733         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 734         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 735         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 736         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 737         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 738         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 739         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 740         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 741         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 742         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 743         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 744         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 745         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 746
 747 For older changes see ChangeLog-2009
 748 \f
 749 Local Variables:
 750 mode: change-log
 751 left-margin: 8
 752 fill-column: 74
 753 version-control: never
 754 End: