opcodes/ChangeLog

   1 2008-10-10  Nick Clifton  <nickc@redhat.com>
   2
   3         PR 6937
   4         * configure.in (SHARED_LIBADD): Add libiberty.a.
   5         (SHARED_DEPENDENCIES): Add libiberty.a.
   6
   7 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
   8
   9         * i386-gen.c: Include "hashtab.h".
  10         (next_field): Take a new argument, last.  Check last.
  11         (process_i386_cpu_flag): Updated.
  12         (process_i386_opcode_modifier): Likewise.
  13         (process_i386_operand_type): Likewise.
  14         (process_i386_registers): Likewise.
  15         (output_i386_opcode): New.
  16         (opcode_hash_entry): Likewise.
  17         (opcode_hash_table): Likewise.
  18         (opcode_hash_hash): Likewise.
  19         (opcode_hash_eq): Likewise.
  20         (process_i386_opcodes): Use opcode hash table and opcode array.
  21
  22 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  23
  24         * s390-opc.txt (stdy, stey): Fix description
  25
  26 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
  27
  28         * Makefile.am: Run "make dep-am".
  29         * Makefile.in: Regenerate.
  30
  31 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         * aclocal.m4: Regenerated.
  34         * configure: Likewise.
  35         * Makefile.in: Likewise.
  36
  37 2008-09-29  Nick Clifton  <nickc@redhat.com>
  38
  39         * po/vi.po: Updated Vietnamese translation.
  40         * po/fr.po: Updated French translation.
  41
  42 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
  43
  44         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
  45         (cfxr, cfdr, cfer, clclu): Add esa flag.
  46         (sqd): Instruction added.
  47         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
  48         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
  49
  50 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
  51
  52         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
  53         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
  54
  55 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
  56
  57         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
  58         * i386-tbl.h: Regenerated.
  59
  60 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  61
  62         * i386-dis.c (dis386): Adjust far return mnemonics.
  63         * i386-opc.tbl: Add retf.
  64         * i386-tbl.h: Re-generate.
  65
  66 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  67
  68         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
  69
  70 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
  71
  72         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
  73         * ia64-gen.c (lookup_specifier): Likewise.
  74
  75         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
  76         * ia64-raw.tbl: Likewise.
  77         * ia64-waw.tbl: Likewise.
  78         * ia64-asmtab.c: Regenerated.
  79
  80 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
  81
  82         * i386-opc.tbl: Correct fidivr operand size.
  83
  84         * i386-tbl.h: Regenerated.
  85
  86 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
  87
  88         * configure.in: Update a number of obsolete autoconf macros.
  89         * aclocal.m4: Regenerate.
  90
  91 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
  92
  93         AVX Programming Reference (August, 2008)
  94         * i386-dis.c (PREFIX_VEX_38DB): New.
  95         (PREFIX_VEX_38DC): Likewise.
  96         (PREFIX_VEX_38DD): Likewise.
  97         (PREFIX_VEX_38DE): Likewise.
  98         (PREFIX_VEX_38DF): Likewise.
  99         (PREFIX_VEX_3ADF): Likewise.
 100         (VEX_LEN_38DB_P_2): Likewise.
 101         (VEX_LEN_38DC_P_2): Likewise.
 102         (VEX_LEN_38DD_P_2): Likewise.
 103         (VEX_LEN_38DE_P_2): Likewise.
 104         (VEX_LEN_38DF_P_2): Likewise.
 105         (VEX_LEN_3ADF_P_2): Likewise.
 106         (PREFIX_VEX_3A04): Updated.
 107         (VEX_LEN_3A06_P_2): Likewise.
 108         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 109         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 110         (x86_64_table): Likewise.
 111         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 112         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 113         VEX_LEN_3ADF_P_2.
 114
 115         * i386-opc.tbl: Add AES + AVX instructions.
 116         * i386-init.h: Regenerated.
 117         * i386-tbl.h: Likewise.
 118
 119 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 120
 121         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 122         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 123
 124 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 125
 126         PR 6526
 127         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 128         * Makefile.in: Regenerate.
 129         * aclocal.m4: Regenerate.
 130         * config.in: Regenerate.
 131         * configure: Regenerate.
 132
 133 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 134
 135         PR 6825
 136         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 137
 138 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 139
 140         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 141
 142         * i386-tbl.h: Regenerated.
 143
 144 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 145
 146         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 147         * Makefile.in: Regenerate.
 148         * po/POTFILES.in: Regenerate.
 149
 150 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 151
 152         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 153         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 154         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 155         * ppc-opc.c (insert_xt6): New static function.
 156         (extract_xt6): Likewise.
 157         (insert_xa6): Likewise.
 158         (extract_xa6: Likewise.
 159         (insert_xb6): Likewise.
 160         (extract_xb6): Likewise.
 161         (insert_xb6s): Likewise.
 162         (extract_xb6s): Likewise.
 163         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 164         XX3DM_MASK, PPCVSX): New.
 165         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 166         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 167
 168 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 169
 170         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 171         * Makefile.in: Regenerate.
 172
 173 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 174
 175         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 176         * i386-tbl.h: Regenerated.
 177
 178 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 179
 180         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 181         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 182         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 183         (powerpc_opcodes): Add Xilinx APU related opcodes.
 184
 185 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 186
 187         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 188
 189 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 190
 191         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 192
 193 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 194
 195         * mips-opc.c (CP): New macro.
 196         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 197         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 198         dmtc2 Octeon instructions.
 199
 200 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 201
 202         * dis-init.c (init_disassemble_info): Init endian_code field.
 203         * arm-dis.c (print_insn): Disassemble code according to
 204         setting of endian_code.
 205         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 206
 207 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 208
 209         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 210         for ELF symbols.
 211
 212 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 213
 214         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 215         (print_ppc_disassembler_options): Likewise.
 216         * ppc-opc.c (PPC464): Define.
 217         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 218
 219 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 220
 221         * configure: Regenerate.
 222
 223 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 224
 225         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 226         ppc_cpu_t typedef.
 227         (struct dis_private): New.
 228         (POWERPC_DIALECT): New define.
 229         (powerpc_dialect): Renamed to...
 230         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 231         struct dis_private.
 232         (print_insn_big_powerpc): Update for using structure in
 233         info->private_data.
 234         (print_insn_little_powerpc): Likewise.
 235         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 236         (skip_optional_operands): Likewise.
 237         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 238         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 239         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 240         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 241         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 242         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 243         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 244         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 245         param to be of type ppc_cpu_t.  Update prototype.
 246
 247 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 248
 249         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 250         +s, +S.
 251         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 252         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 253         syncw, syncws, vm3mulu, vm0 and vmulu.
 254
 255         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 256         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 257         seqi, sne and snei.
 258
 259 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 260
 261         * i386-opc.tbl: Add vmovd with 64bit operand.
 262         * i386-tbl.h: Regenerated.
 263
 264 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 265
 266         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 267
 268 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 269
 270         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 271         * i386-tbl.h: Regenerated.
 272
 273 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 274
 275         PR gas/6517
 276         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 277         into 32bit and 64bit.  Remove Reg64|Qword and add
 278         IgnoreSize|No_qSuf on 32bit version.
 279         * i386-tbl.h: Regenerated.
 280
 281 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 282
 283         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 284         * i386-tbl.h: Regenerated.
 285
 286 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 287
 288         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 289
 290 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 291
 292         * Makefile.am: Run "make dep-am".
 293         * Makefile.in: Regenerate.
 294
 295 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 296
 297         * i386-dis.c (MOVBE_Fixup): New.
 298         (Mo): Likewise.
 299         (PREFIX_0F3880): Likewise.
 300         (PREFIX_0F3881): Likewise.
 301         (PREFIX_0F38F0): Updated.
 302         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 303         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 304         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 305
 306         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 307         CPU_EPT_FLAGS.
 308         (cpu_flags): Add CpuMovbe and CpuEPT.
 309
 310         * i386-opc.h (CpuMovbe): New.
 311         (CpuEPT): Likewise.
 312         (CpuLM): Updated.
 313         (i386_cpu_flags): Add cpumovbe and cpuept.
 314
 315         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 316         * i386-init.h: Regenerated.
 317         * i386-tbl.h: Likewise.
 318
 319 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 320
 321         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 322         the two drem and the two dremu macros.
 323
 324 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 325
 326         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 327         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 328         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 329         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 330
 331 2008-04-25  David S. Miller  <davem@davemloft.net>
 332
 333         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 334         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 335
 336 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 337
 338         * aclocal.m4: Regenerate.
 339         * configure: Regenerate.
 340
 341 2008-04-23  David S. Miller  <davem@davemloft.net>
 342
 343         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 344         extended values.
 345         (prefetch_table): Add missing values.
 346
 347 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 348
 349         * i386-gen.c (opcode_modifiers): Add NoAVX.
 350
 351         * i386-opc.h (NoAVX): New.
 352         (OldGcc): Updated.
 353         (i386_opcode_modifier): Add noavx.
 354
 355         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 356         instructions which don't have AVX equivalent.
 357         * i386-tbl.h: Regenerated.
 358
 359 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 360
 361         * i386-dis.c (OP_VEX_FMA): New.
 362         (OP_EX_VexImmW): Likewise.
 363         (VexFMA): Likewise.
 364         (Vex128FMA): Likewise.
 365         (EXVexImmW): Likewise.
 366         (get_vex_imm8): Likewise.
 367         (OP_EX_VexReg): Likewise.
 368         (vex_i4_done): Renamed to ...
 369         (vex_w_done): This.
 370         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 371         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 372         FMA instructions.
 373         (print_insn): Updated.
 374         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 375         (OP_REG_VexI4): Check invalid high registers.
 376
 377 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 378             Michael Meissner  <michael.meissner@amd.com>
 379
 380         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 381         * i386-tbl.h: Regenerate from i386-opc.tbl.
 382
 383 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 384
 385         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 386         accept Power E500MC instructions.
 387         (print_ppc_disassembler_options): Document -Me500mc.
 388         * ppc-opc.c (DUIS, DUI, T): New.
 389         (XRT, XRTRA): Likewise.
 390         (E500MC): Likewise.
 391         (powerpc_opcodes): Add new Power E500MC instructions.
 392
 393 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 394
 395         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 396         (print_s390_disassembler_options): New function.
 397         * disassemble.c (disassembler_usage): Invoke
 398         print_s390_disassembler_options.
 399
 400 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 401
 402         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 403         of local variables used for mnemonic parsing: prefix, suffix and
 404         number.
 405
 406 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 407
 408         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 409         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 410         (s390_crb_extensions): New extensions table.
 411         (insertExpandedMnemonic): Handle '$' tag.
 412         * s390-opc.txt: Remove conditional jump variants which can now
 413         be expanded automatically.
 414         Replace '*' tag with '$' in the compare and branch instructions.
 415
 416 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 417
 418         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 419         (PREFIX_VEX_3AXX): Likewis.
 420
 421 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 422
 423         * i386-opc.tbl: Remove 4 extra blank lines.
 424
 425 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 426
 427         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 428         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 429         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 430         * i386-opc.tbl: Likewise.
 431
 432         * i386-opc.h (CpuCLMUL): Renamed to ...
 433         (CpuPCLMUL): This.
 434         (CpuFMA): Updated.
 435         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 436
 437         * i386-init.h: Regenerated.
 438
 439 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 440
 441         * i386-dis.c (OP_E_register): New.
 442         (OP_E_memory): Likewise.
 443         (OP_VEX): Likewise.
 444         (OP_EX_Vex): Likewise.
 445         (OP_EX_VexW): Likewise.
 446         (OP_XMM_Vex): Likewise.
 447         (OP_XMM_VexW): Likewise.
 448         (OP_REG_VexI4): Likewise.
 449         (PCLMUL_Fixup): Likewise.
 450         (VEXI4_Fixup): Likewise.
 451         (VZERO_Fixup): Likewise.
 452         (VCMP_Fixup): Likewise.
 453         (VPERMIL2_Fixup): Likewise.
 454         (rex_original): Likewise.
 455         (rex_ignored): Likewise.
 456         (Mxmm): Likewise.
 457         (XMM): Likewise.
 458         (EXxmm): Likewise.
 459         (EXxmmq): Likewise.
 460         (EXymmq): Likewise.
 461         (Vex): Likewise.
 462         (Vex128): Likewise.
 463         (Vex256): Likewise.
 464         (VexI4): Likewise.
 465         (EXdVex): Likewise.
 466         (EXqVex): Likewise.
 467         (EXVexW): Likewise.
 468         (EXdVexW): Likewise.
 469         (EXqVexW): Likewise.
 470         (XMVex): Likewise.
 471         (XMVexW): Likewise.
 472         (XMVexI4): Likewise.
 473         (PCLMUL): Likewise.
 474         (VZERO): Likewise.
 475         (VCMP): Likewise.
 476         (VPERMIL2): Likewise.
 477         (xmm_mode): Likewise.
 478         (xmmq_mode): Likewise.
 479         (ymmq_mode): Likewise.
 480         (vex_mode): Likewise.
 481         (vex128_mode): Likewise.
 482         (vex256_mode): Likewise.
 483         (USE_VEX_C4_TABLE): Likewise.
 484         (USE_VEX_C5_TABLE): Likewise.
 485         (USE_VEX_LEN_TABLE): Likewise.
 486         (VEX_C4_TABLE): Likewise.
 487         (VEX_C5_TABLE): Likewise.
 488         (VEX_LEN_TABLE): Likewise.
 489         (REG_VEX_XX): Likewise.
 490         (MOD_VEX_XXX): Likewise.
 491         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 492         (PREFIX_0F3A44): Likewise.
 493         (PREFIX_0F3ADF): Likewise.
 494         (PREFIX_VEX_XXX): Likewise.
 495         (VEX_OF): Likewise.
 496         (VEX_OF38): Likewise.
 497         (VEX_OF3A): Likewise.
 498         (VEX_LEN_XXX): Likewise.
 499         (vex): Likewise.
 500         (need_vex): Likewise.
 501         (need_vex_reg): Likewise.
 502         (vex_i4_done): Likewise.
 503         (vex_table): Likewise.
 504         (vex_len_table): Likewise.
 505         (OP_REG_VexI4): Likewise.
 506         (vex_cmp_op): Likewise.
 507         (pclmul_op): Likewise.
 508         (vpermil2_op): Likewise.
 509         (m_mode): Updated.
 510         (es_reg): Likewise.
 511         (PREFIX_0F38F0): Likewise.
 512         (PREFIX_0F3A60): Likewise.
 513         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 514         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 515         and PREFIX_VEX_XXX entries.
 516         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 517         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 518         PREFIX_0F3ADF.
 519         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 520         Add MOD_VEX_XXX entries.
 521         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 522         REX byte in rex_original.
 523         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 524         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 525         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 526         calling get_valid_dis386.  Use rex_original and rex_ignored when
 527         printing out REX.
 528         (putop): Handle "XY".
 529         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 530         ymmq_mode.
 531         (OP_E_extended): Updated to use OP_E_register and
 532         OP_E_memory.
 533         (OP_XMM): Handle VEX.
 534         (OP_EX): Likewise.
 535         (XMM_Fixup): Likewise.
 536         (CMP_Fixup): Use ARRAY_SIZE.
 537
 538         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 539         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 540         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 541         OPERAND_TYPE_VEX_IMM4.
 542         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 543         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 544         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 545         VexImmExt and SSE2AVX.
 546         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 547
 548         * i386-opc.h (CpuAVX): New.
 549         (CpuAES): Likewise.
 550         (CpuCLMUL): Likewise.
 551         (CpuFMA): Likewise.
 552         (Vex): Likewise.
 553         (Vex256): Likewise.
 554         (VexNDS): Likewise.
 555         (VexNDD): Likewise.
 556         (VexW0): Likewise.
 557         (VexW1): Likewise.
 558         (Vex0F): Likewise.
 559         (Vex0F38): Likewise.
 560         (Vex0F3A): Likewise.
 561         (Vex3Sources): Likewise.
 562         (VexImmExt): Likewise.
 563         (SSE2AVX): Likewise.
 564         (RegYMM): Likewise.
 565         (Ymmword): Likewise.
 566         (Vex_Imm4): Likewise.
 567         (Implicit1stXmm0): Likewise.
 568         (CpuXsave): Updated.
 569         (CpuLM): Likewise.
 570         (ByteOkIntel): Likewise.
 571         (OldGcc): Likewise.
 572         (Control): Likewise.
 573         (Unspecified): Likewise.
 574         (OTMax): Likewise.
 575         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 576         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 577         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 578         vex3sources, veximmext and sse2avx.
 579         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 580
 581         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 582
 583         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 584
 585         * i386-init.h: Regenerated.
 586         * i386-tbl.h: Likewise.
 587
 588 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 589
 590         From  Robin Getz  <robin.getz@analog.com>
 591         * bfin-dis.c (bu32): Typedef.
 592         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 593         (constant_formats[]): Add uimm32 and huimm16.
 594         (fmtconst_val): New.
 595         (uimm32): Define.
 596         (huimm32): Define.
 597         (imm16_val): Define.
 598         (luimm16_val): Define.
 599         (struct saved_state): Define.
 600         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 601         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 602         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 603         (get_allreg): New.
 604         (decode_LDIMMhalf_0): Print out the whole register value.
 605
 606         From Jie Zhang  <jie.zhang@analog.com>
 607         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 608         multiply and multiply-accumulate to data register instruction.
 609
 610         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 611         c_imm32, c_huimm32e): Define.
 612         (constant_formats): Add flags for printing decimal, leading spaces, and
 613         exact symbols.
 614         (comment, parallel): Add global flags in all disassembly.
 615         (fmtconst): Take advantage of new flags, and print default in hex.
 616         (fmtconst_val): Likewise.
 617         (decode_macfunc): Be consistant with spaces, tabs, comments,
 618         capitalization in disassembly, fix minor coding style issues.
 619         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 620         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 621         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 622         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 623         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 624         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 625         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 626         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 627         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 628         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 629         _print_insn_bfin, print_insn_bfin): Likewise.
 630
 631 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 632
 633         * aclocal.m4: Regenerate.
 634         * configure: Likewise.
 635         * Makefile.in: Likewise.
 636
 637 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 638
 639         * Makefile.am: Run "make dep-am".
 640         * Makefile.in: Regenerate.
 641         * configure: Regenerate.
 642
 643 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 644
 645         * ppc-opc.c (powerpc_opcodes): Order and format.
 646
 647 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 648
 649         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 650         * i386-tbl.h: Regenerated.
 651
 652 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 653
 654         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 655         x86-64.
 656         * i386-tbl.h: Regenerated.
 657
 658 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 659
 660         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 661         and Fword for far indirect jmp. Allow Reg16 and Word for near
 662         indirect jmp on x86-64. Disallow Fword for lcall.
 663         * i386-tbl.h: Re-generate.
 664
 665 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 666
 667         * cr16-opc.c  (cr16_num_optab): Defined
 668
 669 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 670
 671         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 672         * i386-init.h: Regenerated.
 673
 674 2008-02-14  Nick Clifton  <nickc@redhat.com>
 675
 676         PR binutils/5524
 677         * configure.in (SHARED_LIBADD): Select the correct host specific
 678         file extension for shared libraries.
 679         * configure: Regenerate.
 680
 681 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 682
 683         * i386-opc.h (RegFlat): New.
 684         * i386-reg.tbl (flat): Add.
 685         * i386-tbl.h: Re-generate.
 686
 687 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 688
 689         * i386-dis.c (a_mode): New.
 690         (cond_jump_mode): Adjust.
 691         (Ma): Change to a_mode.
 692         (intel_operand_size): Handle a_mode.
 693         * i386-opc.tbl: Allow Dword and Qword for bound.
 694         * i386-tbl.h: Re-generate.
 695
 696 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 697
 698         * i386-gen.c (process_i386_registers): Process new fields.
 699         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 700         unsigned char. Add dw2_regnum and Dw2Inval.
 701         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 702         register names.
 703         * i386-tbl.h: Re-generate.
 704
 705 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 706
 707         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 708         * i386-init.h: Updated.
 709
 710 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 711
 712         * i386-gen.c (cpu_flags): Add CpuXsave.
 713
 714         * i386-opc.h (CpuXsave): New.
 715         (CpuLM): Updated.
 716         (i386_cpu_flags): Add cpuxsave.
 717
 718         * i386-dis.c (MOD_0FAE_REG_4): New.
 719         (RM_0F01_REG_2): Likewise.
 720         (MOD_0FAE_REG_5): Updated.
 721         (RM_0F01_REG_3): Likewise.
 722         (reg_table): Use MOD_0FAE_REG_4.
 723         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 724         for xrstor.
 725         (rm_table): Add RM_0F01_REG_2.
 726
 727         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 728         * i386-init.h: Regenerated.
 729         * i386-tbl.h: Likewise.
 730
 731 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 732
 733         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 734         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 735         * i386-tbl.h: Re-generate.
 736
 737 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 738
 739         PR 5715
 740         * configure: Regenerated.
 741
 742 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 743
 744         * mips-dis.c: Update copyright.
 745         (mips_arch_choices): Add Octeon.
 746         * mips-opc.c: Update copyright.
 747         (IOCT): New macro.
 748         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 749
 750 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 751
 752         * ppc-opc.c: Support optional L form mtmsr.
 753
 754 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 755
 756         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 757
 758 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 759
 760         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 761         * i386-init.h: Regenerated.
 762
 763 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 764
 765         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 766         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 767
 768 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 769
 770         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 771         (cpu_flags): Likewise.
 772
 773         * i386-opc.h (CpuMMX2): Removed.
 774         (CpuSSE): Updated.
 775
 776         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 777         * i386-init.h: Regenerated.
 778         * i386-tbl.h: Likewise.
 779
 780 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 781
 782         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 783         CPU_SMX_FLAGS.
 784         * i386-init.h: Regenerated.
 785
 786 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 787
 788         * i386-opc.tbl: Use Qword on movddup.
 789         * i386-tbl.h: Regenerated.
 790
 791 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 792
 793         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 794         * i386-tbl.h: Regenerated.
 795
 796 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 797
 798         * i386-dis.c (Mx): New.
 799         (PREFIX_0FC3): Likewise.
 800         (PREFIX_0FC7_REG_6): Updated.
 801         (dis386_twobyte): Use PREFIX_0FC3.
 802         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 803         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 804         movntss.
 805
 806 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 807
 808         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 809         (operand_types): Add Mem.
 810
 811         * i386-opc.h (IntelSyntax): New.
 812         * i386-opc.h (Mem): New.
 813         (Byte): Updated.
 814         (Opcode_Modifier_Max): Updated.
 815         (i386_opcode_modifier): Add intelsyntax.
 816         (i386_operand_type): Add mem.
 817
 818         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 819         instructions.
 820
 821         * i386-reg.tbl: Add size for accumulator.
 822
 823         * i386-init.h: Regenerated.
 824         * i386-tbl.h: Likewise.
 825
 826 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 827
 828         * i386-opc.h (Byte): Fix a typo.
 829
 830 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 831
 832         PR gas/5534
 833         * i386-gen.c (operand_type_init): Add Dword to
 834         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 835         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 836         Qword and Xmmword.
 837         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 838         Xmmword, Unspecified and Anysize.
 839         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 840         an alias of Xmmword.
 841
 842         * i386-opc.h (CheckSize): Removed.
 843         (Byte): Updated.
 844         (Word): Likewise.
 845         (Dword): Likewise.
 846         (Qword): Likewise.
 847         (Xmmword): Likewise.
 848         (FWait): Updated.
 849         (OTMax): Likewise.
 850         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 851         qword and xmmword.
 852         (Fword): New.
 853         (TBYTE): Likewise.
 854         (Unspecified): Likewise.
 855         (Anysize): Likewise.
 856         (i386_operand_type): Add byte, word, dword, fword, qword,
 857         tbyte xmmword, unspecified and anysize.
 858
 859         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 860         Tbyte, Xmmword, Unspecified and Anysize.
 861
 862         * i386-reg.tbl: Add size for accumulator.
 863
 864         * i386-init.h: Regenerated.
 865         * i386-tbl.h: Likewise.
 866
 867 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 868
 869         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 870         (REG_0F18): Updated.
 871         (reg_table): Updated.
 872         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 873         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 874
 875 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 876
 877         * i386-gen.c (set_bitfield): Use fail () on error.
 878
 879 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 880
 881         * i386-gen.c (lineno): New.
 882         (filename): Likewise.
 883         (set_bitfield): Report filename and line numer on error.
 884         (process_i386_opcodes): Set filename and update lineno.
 885         (process_i386_registers): Likewise.
 886
 887 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 888
 889         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 890         ATTSyntax.
 891
 892         * i386-opc.h (IntelMnemonic): Renamed to ..
 893         (ATTSyntax): This
 894         (Opcode_Modifier_Max): Updated.
 895         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 896         and intelsyntax.
 897
 898         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 899         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 900         * i386-tbl.h: Regenerated.
 901
 902 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 903
 904         * i386-gen.c: Update copyright to 2008.
 905         * i386-opc.h: Likewise.
 906         * i386-opc.tbl: Likewise.
 907
 908         * i386-init.h: Regenerated.
 909         * i386-tbl.h: Likewise.
 910
 911 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 912
 913         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 914         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 915         * i386-tbl.h: Regenerated.
 916
 917 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 918
 919         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 920         CpuSSE4_2_Or_ABM.
 921         (cpu_flags): Likewise.
 922
 923         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 924         (CpuSSE4_2_Or_ABM): Likewise.
 925         (CpuLM): Updated.
 926         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 927
 928         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 929         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 930         and CpuPadLock, respectively.
 931         * i386-init.h: Regenerated.
 932         * i386-tbl.h: Likewise.
 933
 934 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 935
 936         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 937
 938         * i386-opc.h (No_xSuf): Removed.
 939         (CheckSize): Updated.
 940
 941         * i386-tbl.h: Regenerated.
 942
 943 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 944
 945         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 946         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 947         CPU_SSE5_FLAGS.
 948         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 949
 950         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 951         (CpuLM): Updated.
 952         (i386_cpu_flags): Add cpusse4_2_or_abm.
 953
 954         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 955         CpuABM|CpuSSE4_2 on popcnt.
 956         * i386-init.h: Regenerated.
 957         * i386-tbl.h: Likewise.
 958
 959 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 960
 961         * i386-opc.h: Update comments.
 962
 963 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 964
 965         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 966         * i386-opc.h: Likewise.
 967         * i386-opc.tbl: Likewise.
 968
 969 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 970
 971         PR gas/5534
 972         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 973         Byte, Word, Dword, QWord and Xmmword.
 974
 975         * i386-opc.h (No_xSuf): New.
 976         (CheckSize): Likewise.
 977         (Byte): Likewise.
 978         (Word): Likewise.
 979         (Dword): Likewise.
 980         (QWord): Likewise.
 981         (Xmmword): Likewise.
 982         (FWait): Updated.
 983         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 984         Dword, QWord and Xmmword.
 985
 986         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 987         used.
 988         * i386-tbl.h: Regenerated.
 989
 990 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 991
 992         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 993         From Miod Vallat.
 994
 995 For older changes see ChangeLog-2007
 996 \f
 997 Local Variables:
 998 mode: change-log
 999 left-margin: 8
1000 fill-column: 74
1001 version-control: never
1002 End: