1 2005-08-25 Chao-ying Fu <fu@mips.com>
3 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
4 (mips_builtin_opcodes): Add DSP instructions.
5 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
7 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
10 2005-08-23 David Ung <davidu@mips.com>
12 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
13 instructions to the table.
15 2005-08-18 Alan Modra <amodra@bigpond.net.au>
18 * Makefile.am: Remove a29k support.
19 * configure.in: Likewise.
20 * disassemble.c: Likewise.
21 * Makefile.in: Regenerate.
22 * configure: Regenerate.
23 * po/POTFILES.in: Regenerate.
25 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
27 * ppc-dis.c (powerpc_dialect): Handle e300.
28 (print_ppc_disassembler_options): Likewise.
29 * ppc-opc.c (PPCE300): Define.
30 (powerpc_opcodes): Mark icbt as available for the e300.
32 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
34 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
35 Use "rp" instead of "%r2" in "b,l" insns.
37 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
39 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
40 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
42 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
43 and 4 bit optional masks.
44 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
45 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
46 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
47 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
48 (s390_opformats): Likewise.
49 * s390-opc.txt: Add new instructions for cpu type z9-109.
51 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
53 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
55 2005-07-29 Paul Brook <paul@codesourcery.com>
57 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
59 2005-07-29 Paul Brook <paul@codesourcery.com>
61 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
62 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
64 2005-07-25 DJ Delorie <dj@redhat.com>
66 * m32c-asm.c Regenerate.
67 * m32c-dis.c Regenerate.
69 2005-07-20 DJ Delorie <dj@redhat.com>
71 * disassemble.c (disassemble_init_for_target): M32C ISAs are
72 enums, so convert them to bit masks, which attributes are.
74 2005-07-18 Nick Clifton <nickc@redhat.com>
76 * configure.in: Restore alpha ordering to list of arches.
77 * configure: Regenerate.
78 * disassemble.c: Restore alpha ordering to list of arches.
80 2005-07-18 Nick Clifton <nickc@redhat.com>
82 * m32c-asm.c: Regenerate.
83 * m32c-desc.c: Regenerate.
84 * m32c-desc.h: Regenerate.
85 * m32c-dis.c: Regenerate.
86 * m32c-ibld.h: Regenerate.
87 * m32c-opc.c: Regenerate.
88 * m32c-opc.h: Regenerate.
90 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
92 * i386-dis.c (PNI_Fixup): Update comment.
93 (VMX_Fixup): Properly handle the suffix check.
95 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
97 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
100 2005-07-16 Alan Modra <amodra@bigpond.net.au>
102 * Makefile.am: Run "make dep-am".
103 (stamp-m32c): Fix cpu dependencies.
104 * Makefile.in: Regenerate.
105 * ip2k-dis.c: Regenerate.
107 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
109 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
110 (VMX_Fixup): New. Fix up Intel VMX Instructions.
114 (dis386_twobyte): Updated entries 0x78 and 0x79.
115 (twobyte_has_modrm): Likewise.
116 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
117 (OP_G): Handle m_mode.
119 2005-07-14 Jim Blandy <jimb@redhat.com>
121 Add support for the Renesas M32C and M16C.
122 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
123 * m32c-desc.h, m32c-opc.h: New.
124 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
125 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
127 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
128 m32c-ibld.lo, m32c-opc.lo.
129 (CLEANFILES): List stamp-m32c.
130 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
131 (CGEN_CPUS): Add m32c.
132 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
133 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
134 (m32c_opc_h): New variable.
135 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
136 (m32c-opc.lo): New rules.
137 * Makefile.in: Regenerated.
138 * configure.in: Add case for bfd_m32c_arch.
139 * configure: Regenerated.
140 * disassemble.c (ARCH_m32c): New.
141 [ARCH_m32c]: #include "m32c-desc.h".
142 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
143 (disassemble_init_for_target) [ARCH_m32c]: Same.
145 * cgen-ops.h, cgen-types.h: New files.
146 * Makefile.am (HFILES): List them.
147 * Makefile.in: Regenerated.
149 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
151 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
152 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
153 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
154 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
155 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
156 v850-dis.c: Fix format bugs.
157 * ia64-gen.c (fail, warn): Add format attribute.
158 * or32-opc.c (debug): Likewise.
160 2005-07-07 Khem Raj <kraj@mvista.com>
162 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
165 2005-07-06 Alan Modra <amodra@bigpond.net.au>
167 * Makefile.am (stamp-m32r): Fix path to cpu files.
168 (stamp-m32r, stamp-iq2000): Likewise.
169 * Makefile.in: Regenerate.
170 * m32r-asm.c: Regenerate.
171 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
172 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
174 2005-07-05 Nick Clifton <nickc@redhat.com>
176 * iq2000-asm.c: Regenerate.
177 * ms1-asm.c: Regenerate.
179 2005-07-05 Jan Beulich <jbeulich@novell.com>
181 * i386-dis.c (SVME_Fixup): New.
182 (grps): Use it for the lidt entry.
183 (PNI_Fixup): Call OP_M rather than OP_E.
184 (INVLPG_Fixup): Likewise.
186 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
188 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
190 2005-07-01 Nick Clifton <nickc@redhat.com>
192 * a29k-dis.c: Update to ISO C90 style function declarations and
194 * alpha-opc.c: Likewise.
195 * arc-dis.c: Likewise.
196 * arc-opc.c: Likewise.
197 * avr-dis.c: Likewise.
198 * cgen-asm.in: Likewise.
199 * cgen-dis.in: Likewise.
200 * cgen-ibld.in: Likewise.
201 * cgen-opc.c: Likewise.
202 * cris-dis.c: Likewise.
203 * d10v-dis.c: Likewise.
204 * d30v-dis.c: Likewise.
205 * d30v-opc.c: Likewise.
206 * dis-buf.c: Likewise.
207 * dlx-dis.c: Likewise.
208 * h8300-dis.c: Likewise.
209 * h8500-dis.c: Likewise.
210 * hppa-dis.c: Likewise.
211 * i370-dis.c: Likewise.
212 * i370-opc.c: Likewise.
213 * m10200-dis.c: Likewise.
214 * m10300-dis.c: Likewise.
215 * m68k-dis.c: Likewise.
216 * m88k-dis.c: Likewise.
217 * mips-dis.c: Likewise.
218 * mmix-dis.c: Likewise.
219 * msp430-dis.c: Likewise.
220 * ns32k-dis.c: Likewise.
221 * or32-dis.c: Likewise.
222 * or32-opc.c: Likewise.
223 * pdp11-dis.c: Likewise.
224 * pj-dis.c: Likewise.
225 * s390-dis.c: Likewise.
226 * sh-dis.c: Likewise.
227 * sh64-dis.c: Likewise.
228 * sparc-dis.c: Likewise.
229 * sparc-opc.c: Likewise.
230 * sysdep.h: Likewise.
231 * tic30-dis.c: Likewise.
232 * tic4x-dis.c: Likewise.
233 * tic80-dis.c: Likewise.
234 * v850-dis.c: Likewise.
235 * v850-opc.c: Likewise.
236 * vax-dis.c: Likewise.
237 * w65-dis.c: Likewise.
238 * z8kgen.c: Likewise.
240 * fr30-*: Regenerate.
242 * ip2k-*: Regenerate.
243 * iq2000-*: Regenerate.
244 * m32r-*: Regenerate.
246 * openrisc-*: Regenerate.
247 * xstormy16-*: Regenerate.
249 2005-06-23 Ben Elliston <bje@gnu.org>
251 * m68k-dis.c: Use ISC C90.
252 * m68k-opc.c: Formatting fixes.
254 2005-06-16 David Ung <davidu@mips.com>
256 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
257 instructions to the table; seb/seh/sew/zeb/zeh/zew.
259 2005-06-15 Dave Brolley <brolley@redhat.com>
261 Contribute Morpho ms1 on behalf of Red Hat
262 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
263 ms1-opc.h: New files, Morpho ms1 target.
265 2004-05-14 Stan Cox <scox@redhat.com>
267 * disassemble.c (ARCH_ms1): Define.
268 (disassembler): Handle bfd_arch_ms1
270 2004-05-13 Michael Snyder <msnyder@redhat.com>
272 * Makefile.am, Makefile.in: Add ms1 target.
273 * configure.in: Ditto.
275 2005-06-08 Zack Weinberg <zack@codesourcery.com>
277 * arm-opc.h: Delete; fold contents into ...
278 * arm-dis.c: ... here. Move includes of internal COFF headers
279 next to includes of internal ELF headers.
280 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
281 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
282 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
283 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
284 (iwmmxt_wwnames, iwmmxt_wwssnames):
286 (regnames): Remove iWMMXt coprocessor register sets.
287 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
288 (get_arm_regnames): Adjust fourth argument to match above changes.
289 (set_iwmmxt_regnames): Delete.
290 (print_insn_arm): Constify 'c'. Use ISO syntax for function
291 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
292 and iwmmxt_cregnames, not set_iwmmxt_regnames.
293 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
294 ISO syntax for function pointer calls.
296 2005-06-07 Zack Weinberg <zack@codesourcery.com>
298 * arm-dis.c: Split up the comments describing the format codes, so
299 that the ARM and 16-bit Thumb opcode tables each have comments
300 preceding them that describe all the codes, and only the codes,
301 valid in those tables. (32-bit Thumb table is already like this.)
302 Reorder the lists in all three comments to match the order in
303 which the codes are implemented.
304 Remove all forward declarations of static functions. Convert all
305 function definitions to ISO C format.
306 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
308 (print_insn_thumb16): Remove unused case 'I'.
309 (print_insn): Update for changed calling convention of subroutines.
311 2005-05-25 Jan Beulich <jbeulich@novell.com>
313 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
314 hex (but retain it being displayed as signed). Remove redundant
315 checks. Add handling of displacements for 16-bit addressing in Intel
318 2005-05-25 Jan Beulich <jbeulich@novell.com>
320 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
321 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
322 masking of 'rm' in 16-bit memory address handling.
324 2005-05-19 Anton Blanchard <anton@samba.org>
326 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
327 (print_ppc_disassembler_options): Document it.
328 * ppc-opc.c (SVC_LEV): Define.
329 (LEV): Allow optional operand.
331 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
332 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
334 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
336 * Makefile.in: Regenerate.
338 2005-05-17 Zack Weinberg <zack@codesourcery.com>
340 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
341 instructions. Adjust disassembly of some opcodes to match
343 (thumb32_opcodes): New table.
344 (print_insn_thumb): Rename print_insn_thumb16; don't handle
345 two-halfword branches here.
346 (print_insn_thumb32): New function.
347 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
348 and print_insn_thumb32. Be consistent about order of
349 halfwords when printing 32-bit instructions.
351 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
354 * i386-dis.c (branch_v_mode): New.
355 (indirEv): Use branch_v_mode instead of v_mode.
356 (OP_E): Handle branch_v_mode.
358 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
360 * d10v-dis.c (dis_2_short): Support 64bit host.
362 2005-05-07 Nick Clifton <nickc@redhat.com>
364 * po/nl.po: Updated translation.
366 2005-05-07 Nick Clifton <nickc@redhat.com>
368 * Update the address and phone number of the FSF organization in
369 the GPL notices in the following files:
370 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
371 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
372 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
373 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
374 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
375 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
376 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
377 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
378 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
379 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
380 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
381 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
382 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
383 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
384 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
385 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
386 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
387 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
388 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
389 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
390 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
391 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
392 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
393 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
394 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
395 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
396 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
397 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
398 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
399 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
400 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
401 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
402 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
404 2005-05-05 James E Wilson <wilson@specifixinc.com>
406 * ia64-opc.c: Include sysdep.h before libiberty.h.
408 2005-05-05 Nick Clifton <nickc@redhat.com>
410 * configure.in (ALL_LINGUAS): Add vi.
411 * configure: Regenerate.
414 2005-04-26 Jerome Guitton <guitton@gnat.com>
416 * configure.in: Fix the check for basename declaration.
417 * configure: Regenerate.
419 2005-04-19 Alan Modra <amodra@bigpond.net.au>
421 * ppc-opc.c (RTO): Define.
422 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
423 entries to suit PPC440.
425 2005-04-18 Mark Kettenis <kettenis@gnu.org>
427 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
430 2005-04-14 Nick Clifton <nickc@redhat.com>
432 * po/fi.po: New translation: Finnish.
433 * configure.in (ALL_LINGUAS): Add fi.
434 * configure: Regenerate.
436 2005-04-14 Alan Modra <amodra@bigpond.net.au>
438 * Makefile.am (NO_WERROR): Define.
439 * configure.in: Invoke AM_BINUTILS_WARNINGS.
440 * Makefile.in: Regenerate.
441 * aclocal.m4: Regenerate.
442 * configure: Regenerate.
444 2005-04-04 Nick Clifton <nickc@redhat.com>
446 * fr30-asm.c: Regenerate.
447 * frv-asm.c: Regenerate.
448 * iq2000-asm.c: Regenerate.
449 * m32r-asm.c: Regenerate.
450 * openrisc-asm.c: Regenerate.
452 2005-04-01 Jan Beulich <jbeulich@novell.com>
454 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
455 visible operands in Intel mode. The first operand of monitor is
458 2005-04-01 Jan Beulich <jbeulich@novell.com>
460 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
461 easier future additions.
463 2005-03-31 Jerome Guitton <guitton@gnat.com>
465 * configure.in: Check for basename.
466 * configure: Regenerate.
469 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
471 * i386-dis.c (SEG_Fixup): New.
473 (dis386): Use "Sv" for 0x8c and 0x8e.
475 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
476 Nick Clifton <nickc@redhat.com>
478 * vax-dis.c: (entry_addr): New varible: An array of user supplied
479 function entry mask addresses.
480 (entry_addr_occupied_slots): New variable: The number of occupied
481 elements in entry_addr.
482 (entry_addr_total_slots): New variable: The total number of
483 elements in entry_addr.
484 (parse_disassembler_options): New function. Fills in the entry_addr
486 (free_entry_array): New function. Release the memory used by the
487 entry addr array. Suppressed because there is no way to call it.
488 (is_function_entry): Check if a given address is a function's
489 start address by looking at supplied entry mask addresses and
490 symbol information, if available.
491 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
493 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
495 * cris-dis.c (print_with_operands): Use ~31L for long instead
498 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
500 * mmix-opc.c (O): Revert the last change.
503 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
505 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
508 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
510 * mmix-opc.c (O, Z): Force expression as unsigned long.
512 2005-03-18 Nick Clifton <nickc@redhat.com>
514 * ip2k-asm.c: Regenerate.
515 * op/opcodes.pot: Regenerate.
517 2005-03-16 Nick Clifton <nickc@redhat.com>
518 Ben Elliston <bje@au.ibm.com>
520 * configure.in (werror): New switch: Add -Werror to the
521 compiler command line. Enabled by default. Disable via
523 * configure: Regenerate.
525 2005-03-16 Alan Modra <amodra@bigpond.net.au>
527 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
530 2005-03-15 Alan Modra <amodra@bigpond.net.au>
532 * po/es.po: Commit new Spanish translation.
534 * po/fr.po: Commit new French translation.
536 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
538 * vax-dis.c: Fix spelling error
539 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
540 of just "Entry mask: < r1 ... >"
542 2005-03-12 Zack Weinberg <zack@codesourcery.com>
544 * arm-dis.c (arm_opcodes): Document %E and %V.
545 Add entries for v6T2 ARM instructions:
546 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
547 (print_insn_arm): Add support for %E and %V.
548 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
550 2005-03-10 Jeff Baker <jbaker@qnx.com>
551 Alan Modra <amodra@bigpond.net.au>
553 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
554 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
556 (XSPRG_MASK): Mask off extra bits now part of sprg field.
557 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
558 mfsprg4..7 after msprg and consolidate.
560 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
562 * vax-dis.c (entry_mask_bit): New array.
563 (print_insn_vax): Decode function entry mask.
565 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
567 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
569 2005-03-05 Alan Modra <amodra@bigpond.net.au>
571 * po/opcodes.pot: Regenerate.
573 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
575 * arc-dis.c (a4_decoding_class): New enum.
576 (dsmOneArcInst): Use the enum values for the decoding class.
577 Remove redundant case in the switch for decodingClass value 11.
579 2005-03-02 Jan Beulich <jbeulich@novell.com>
581 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
583 (OP_C): Consider lock prefix in non-64-bit modes.
585 2005-02-24 Alan Modra <amodra@bigpond.net.au>
587 * cris-dis.c (format_hex): Remove ineffective warning fix.
588 * crx-dis.c (make_instruction): Warning fix.
589 * frv-asm.c: Regenerate.
591 2005-02-23 Nick Clifton <nickc@redhat.com>
593 * cgen-dis.in: Use bfd_byte for buffers that are passed to
596 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
598 * crx-dis.c (make_instruction): Move argument structure into inner
599 scope and ensure that all of its fields are initialised before
602 * fr30-asm.c: Regenerate.
603 * fr30-dis.c: Regenerate.
604 * frv-asm.c: Regenerate.
605 * frv-dis.c: Regenerate.
606 * ip2k-asm.c: Regenerate.
607 * ip2k-dis.c: Regenerate.
608 * iq2000-asm.c: Regenerate.
609 * iq2000-dis.c: Regenerate.
610 * m32r-asm.c: Regenerate.
611 * m32r-dis.c: Regenerate.
612 * openrisc-asm.c: Regenerate.
613 * openrisc-dis.c: Regenerate.
614 * xstormy16-asm.c: Regenerate.
615 * xstormy16-dis.c: Regenerate.
617 2005-02-22 Alan Modra <amodra@bigpond.net.au>
619 * arc-ext.c: Warning fixes.
620 * arc-ext.h: Likewise.
621 * cgen-opc.c: Likewise.
622 * ia64-gen.c: Likewise.
623 * maxq-dis.c: Likewise.
624 * ns32k-dis.c: Likewise.
625 * w65-dis.c: Likewise.
626 * ia64-asmtab.c: Regenerate.
628 2005-02-22 Alan Modra <amodra@bigpond.net.au>
630 * fr30-desc.c: Regenerate.
631 * fr30-desc.h: Regenerate.
632 * fr30-opc.c: Regenerate.
633 * fr30-opc.h: Regenerate.
634 * frv-desc.c: Regenerate.
635 * frv-desc.h: Regenerate.
636 * frv-opc.c: Regenerate.
637 * frv-opc.h: Regenerate.
638 * ip2k-desc.c: Regenerate.
639 * ip2k-desc.h: Regenerate.
640 * ip2k-opc.c: Regenerate.
641 * ip2k-opc.h: Regenerate.
642 * iq2000-desc.c: Regenerate.
643 * iq2000-desc.h: Regenerate.
644 * iq2000-opc.c: Regenerate.
645 * iq2000-opc.h: Regenerate.
646 * m32r-desc.c: Regenerate.
647 * m32r-desc.h: Regenerate.
648 * m32r-opc.c: Regenerate.
649 * m32r-opc.h: Regenerate.
650 * m32r-opinst.c: Regenerate.
651 * openrisc-desc.c: Regenerate.
652 * openrisc-desc.h: Regenerate.
653 * openrisc-opc.c: Regenerate.
654 * openrisc-opc.h: Regenerate.
655 * xstormy16-desc.c: Regenerate.
656 * xstormy16-desc.h: Regenerate.
657 * xstormy16-opc.c: Regenerate.
658 * xstormy16-opc.h: Regenerate.
660 2005-02-21 Alan Modra <amodra@bigpond.net.au>
662 * Makefile.am: Run "make dep-am"
663 * Makefile.in: Regenerate.
665 2005-02-15 Nick Clifton <nickc@redhat.com>
667 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
668 compile time warnings.
669 (print_keyword): Likewise.
670 (default_print_insn): Likewise.
672 * fr30-desc.c: Regenerated.
673 * fr30-desc.h: Regenerated.
674 * fr30-dis.c: Regenerated.
675 * fr30-opc.c: Regenerated.
676 * fr30-opc.h: Regenerated.
677 * frv-desc.c: Regenerated.
678 * frv-dis.c: Regenerated.
679 * frv-opc.c: Regenerated.
680 * ip2k-asm.c: Regenerated.
681 * ip2k-desc.c: Regenerated.
682 * ip2k-desc.h: Regenerated.
683 * ip2k-dis.c: Regenerated.
684 * ip2k-opc.c: Regenerated.
685 * ip2k-opc.h: Regenerated.
686 * iq2000-desc.c: Regenerated.
687 * iq2000-dis.c: Regenerated.
688 * iq2000-opc.c: Regenerated.
689 * m32r-asm.c: Regenerated.
690 * m32r-desc.c: Regenerated.
691 * m32r-desc.h: Regenerated.
692 * m32r-dis.c: Regenerated.
693 * m32r-opc.c: Regenerated.
694 * m32r-opc.h: Regenerated.
695 * m32r-opinst.c: Regenerated.
696 * openrisc-desc.c: Regenerated.
697 * openrisc-desc.h: Regenerated.
698 * openrisc-dis.c: Regenerated.
699 * openrisc-opc.c: Regenerated.
700 * openrisc-opc.h: Regenerated.
701 * xstormy16-desc.c: Regenerated.
702 * xstormy16-desc.h: Regenerated.
703 * xstormy16-dis.c: Regenerated.
704 * xstormy16-opc.c: Regenerated.
705 * xstormy16-opc.h: Regenerated.
707 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
709 * dis-buf.c (perror_memory): Use sprintf_vma to print out
712 2005-02-11 Nick Clifton <nickc@redhat.com>
714 * iq2000-asm.c: Regenerate.
716 * frv-dis.c: Regenerate.
718 2005-02-07 Jim Blandy <jimb@redhat.com>
720 * Makefile.am (CGEN): Load guile.scm before calling the main
722 * Makefile.in: Regenerated.
723 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
724 Simply pass the cgen-opc.scm path to ${cgen} as its first
725 argument; ${cgen} itself now contains the '-s', or whatever is
726 appropriate for the Scheme being used.
728 2005-01-31 Andrew Cagney <cagney@gnu.org>
730 * configure: Regenerate to track ../gettext.m4.
732 2005-01-31 Jan Beulich <jbeulich@novell.com>
734 * ia64-gen.c (NELEMS): Define.
735 (shrink): Generate alias with missing second predicate register when
736 opcode has two outputs and these are both predicates.
737 * ia64-opc-i.c (FULL17): Define.
738 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
739 here to generate output template.
740 (TBITCM, TNATCM): Undefine after use.
741 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
742 first input. Add ld16 aliases without ar.csd as second output. Add
743 st16 aliases without ar.csd as second input. Add cmpxchg aliases
744 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
745 ar.ccv as third/fourth inputs. Consolidate through...
746 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
747 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
748 * ia64-asmtab.c: Regenerate.
750 2005-01-27 Andrew Cagney <cagney@gnu.org>
752 * configure: Regenerate to track ../gettext.m4 change.
754 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
756 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
757 * frv-asm.c: Rebuilt.
758 * frv-desc.c: Rebuilt.
759 * frv-desc.h: Rebuilt.
760 * frv-dis.c: Rebuilt.
761 * frv-ibld.c: Rebuilt.
762 * frv-opc.c: Rebuilt.
763 * frv-opc.h: Rebuilt.
765 2005-01-24 Andrew Cagney <cagney@gnu.org>
767 * configure: Regenerate, ../gettext.m4 was updated.
769 2005-01-21 Fred Fish <fnf@specifixinc.com>
771 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
772 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
773 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
776 2005-01-20 Alan Modra <amodra@bigpond.net.au>
778 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
780 2005-01-19 Fred Fish <fnf@specifixinc.com>
782 * mips-dis.c (no_aliases): New disassembly option flag.
783 (set_default_mips_dis_options): Init no_aliases to zero.
784 (parse_mips_dis_option): Handle no-aliases option.
785 (print_insn_mips): Ignore table entries that are aliases
786 if no_aliases is set.
787 (print_insn_mips16): Ditto.
788 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
789 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
790 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
791 * mips16-opc.c (mips16_opcodes): Ditto.
793 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
795 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
796 (inheritance diagram): Add missing edge.
797 (arch_sh1_up): Rename arch_sh_up to match external name to make life
798 easier for the testsuite.
799 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
800 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
801 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
802 arch_sh2a_or_sh4_up child.
803 (sh_table): Do renaming as above.
804 Correct comment for ldc.l for gas testsuite to read.
805 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
806 Correct comments for movy.w and movy.l for gas testsuite to read.
807 Correct comments for fmov.d and fmov.s for gas testsuite to read.
809 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
811 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
813 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
815 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
817 2005-01-10 Andreas Schwab <schwab@suse.de>
819 * disassemble.c (disassemble_init_for_target) <case
820 bfd_arch_ia64>: Set skip_zeroes to 16.
821 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
823 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
825 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
827 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
829 * avr-dis.c: Prettyprint. Added printing of symbol names in all
830 memory references. Convert avr_operand() to C90 formatting.
832 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
834 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
836 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
838 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
839 (no_op_insn): Initialize array with instructions that have no
841 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
843 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
845 * arm-dis.c: Correct top-level comment.
847 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
849 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
850 architecuture defining the insn.
851 (arm_opcodes, thumb_opcodes): Delete. Move to ...
852 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
854 Also include opcode/arm.h.
855 * Makefile.am (arm-dis.lo): Update dependency list.
856 * Makefile.in: Regenerate.
858 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
860 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
861 reflect the change to the short immediate syntax.
863 2004-11-19 Alan Modra <amodra@bigpond.net.au>
865 * or32-opc.c (debug): Warning fix.
866 * po/POTFILES.in: Regenerate.
868 * maxq-dis.c: Formatting.
869 (print_insn): Warning fix.
871 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
873 * arm-dis.c (WORD_ADDRESS): Define.
874 (print_insn): Use it. Correct big-endian end-of-section handling.
876 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
877 Vineet Sharma <vineets@noida.hcltech.com>
879 * maxq-dis.c: New file.
880 * disassemble.c (ARCH_maxq): Define.
881 (disassembler): Add 'print_insn_maxq_little' for handling maxq
883 * configure.in: Add case for bfd_maxq_arch.
884 * configure: Regenerate.
885 * Makefile.am: Add support for maxq-dis.c
886 * Makefile.in: Regenerate.
887 * aclocal.m4: Regenerate.
889 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
891 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
893 * crx-dis.c: Likewise.
895 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
897 Generally, handle CRISv32.
898 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
899 (struct cris_disasm_data): New type.
900 (format_reg, format_hex, cris_constraint, print_flags)
901 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
903 (format_sup_reg, print_insn_crisv32_with_register_prefix)
904 (print_insn_crisv32_without_register_prefix)
905 (print_insn_crisv10_v32_with_register_prefix)
906 (print_insn_crisv10_v32_without_register_prefix)
907 (cris_parse_disassembler_options): New functions.
908 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
909 parameter. All callers changed.
910 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
912 (cris_constraint) <case 'Y', 'U'>: New cases.
913 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
915 (print_with_operands) <case 'Y'>: New case.
916 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
917 <case 'N', 'Y', 'Q'>: New cases.
918 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
919 (print_insn_cris_with_register_prefix)
920 (print_insn_cris_without_register_prefix): Call
921 cris_parse_disassembler_options.
922 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
923 for CRISv32 and the size of immediate operands. New v32-only
924 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
925 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
926 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
927 Change brp to be v3..v10.
928 (cris_support_regs): New vector.
929 (cris_opcodes): Update head comment. New format characters '[',
930 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
931 Add new opcodes for v32 and adjust existing opcodes to accommodate
932 differences to earlier variants.
933 (cris_cond15s): New vector.
935 2004-11-04 Jan Beulich <jbeulich@novell.com>
937 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
939 (Mp): Use f_mode rather than none at all.
940 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
941 replaces what previously was x_mode; x_mode now means 128-bit SSE
943 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
944 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
945 pinsrw's second operand is Edqw.
946 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
947 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
948 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
949 mode when an operand size override is present or always suffixing.
950 More instructions will need to be added to this group.
951 (putop): Handle new macro chars 'C' (short/long suffix selector),
952 'I' (Intel mode override for following macro char), and 'J' (for
953 adding the 'l' prefix to far branches in AT&T mode). When an
954 alternative was specified in the template, honor macro character when
955 specified for Intel mode.
956 (OP_E): Handle new *_mode values. Correct pointer specifications for
957 memory operands. Consolidate output of index register.
958 (OP_G): Handle new *_mode values.
959 (OP_I): Handle const_1_mode.
960 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
961 respective opcode prefix bits have been consumed.
962 (OP_EM, OP_EX): Provide some default handling for generating pointer
965 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
967 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
970 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
972 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
973 (getregliststring): Support HI/LO and user registers.
974 * crx-opc.c (crx_instruction): Update data structure according to the
975 rearrangement done in CRX opcode header file.
976 (crx_regtab): Likewise.
977 (crx_optab): Likewise.
978 (crx_instruction): Reorder load/stor instructions, remove unsupported
980 support new Co-Processor instruction 'cpi'.
982 2004-10-27 Nick Clifton <nickc@redhat.com>
984 * opcodes/iq2000-asm.c: Regenerate.
985 * opcodes/iq2000-desc.c: Regenerate.
986 * opcodes/iq2000-desc.h: Regenerate.
987 * opcodes/iq2000-dis.c: Regenerate.
988 * opcodes/iq2000-ibld.c: Regenerate.
989 * opcodes/iq2000-opc.c: Regenerate.
990 * opcodes/iq2000-opc.h: Regenerate.
992 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
994 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
995 us4, us5 (respectively).
996 Remove unsupported 'popa' instruction.
997 Reverse operands order in store co-processor instructions.
999 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1001 * Makefile.am: Run "make dep-am"
1002 * Makefile.in: Regenerate.
1004 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1006 * xtensa-dis.c: Use ISO C90 formatting.
1008 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1010 * ppc-opc.c: Revert 2004-09-09 change.
1012 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1014 * xtensa-dis.c (state_names): Delete.
1015 (fetch_data): Use xtensa_isa_maxlength.
1016 (print_xtensa_operand): Replace operand parameter with opcode/operand
1017 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1018 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1019 instruction bundles. Use xmalloc instead of malloc.
1021 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1023 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1026 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1028 * crx-opc.c (crx_instruction): Support Co-processor insns.
1029 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1030 (getregliststring): Change function to use the above enum.
1031 (print_arg): Handle CO-Processor insns.
1032 (crx_cinvs): Add 'b' option to invalidate the branch-target
1035 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1037 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1038 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1039 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1040 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1041 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1043 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1045 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1048 2004-09-30 Paul Brook <paul@codesourcery.com>
1050 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1051 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1053 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1055 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1056 (CONFIG_STATUS_DEPENDENCIES): New.
1057 (Makefile): Removed.
1058 (config.status): Likewise.
1059 * Makefile.in: Regenerated.
1061 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1063 * Makefile.am: Run "make dep-am".
1064 * Makefile.in: Regenerate.
1065 * aclocal.m4: Regenerate.
1066 * configure: Regenerate.
1067 * po/POTFILES.in: Regenerate.
1068 * po/opcodes.pot: Regenerate.
1070 2004-09-11 Andreas Schwab <schwab@suse.de>
1072 * configure: Rebuild.
1074 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1076 * ppc-opc.c (L): Make this field not optional.
1078 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1080 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1081 Fix parameter to 'm[t|f]csr' insns.
1083 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1085 * configure.in: Autoupdate to autoconf 2.59.
1086 * aclocal.m4: Rebuild with aclocal 1.4p6.
1087 * configure: Rebuild with autoconf 2.59.
1088 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1089 bfd changes for autoconf 2.59 on the way).
1090 * config.in: Rebuild with autoheader 2.59.
1092 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1094 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1096 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1098 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1099 (GRPPADLCK2): New define.
1100 (twobyte_has_modrm): True for 0xA6.
1101 (grps): GRPPADLCK2 for opcode 0xA6.
1103 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1105 Introduce SH2a support.
1106 * sh-opc.h (arch_sh2a_base): Renumber.
1107 (arch_sh2a_nofpu_base): Remove.
1108 (arch_sh_base_mask): Adjust.
1109 (arch_opann_mask): New.
1110 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1111 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1112 (sh_table): Adjust whitespace.
1113 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1114 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1115 instruction list throughout.
1116 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1117 of arch_sh2a in instruction list throughout.
1118 (arch_sh2e_up): Accomodate above changes.
1119 (arch_sh2_up): Ditto.
1120 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1121 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1122 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1123 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1124 * sh-opc.h (arch_sh2a_nofpu): New.
1125 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1126 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1128 2004-01-20 DJ Delorie <dj@redhat.com>
1129 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1130 2003-12-29 DJ Delorie <dj@redhat.com>
1131 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1132 sh_opcode_info, sh_table): Add sh2a support.
1133 (arch_op32): New, to tag 32-bit opcodes.
1134 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1135 2003-12-02 Michael Snyder <msnyder@redhat.com>
1136 * sh-opc.h (arch_sh2a): Add.
1137 * sh-dis.c (arch_sh2a): Handle.
1138 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1140 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1142 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1144 2004-07-22 Nick Clifton <nickc@redhat.com>
1147 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1148 insns - this is done by objdump itself.
1149 * h8500-dis.c (print_insn_h8500): Likewise.
1151 2004-07-21 Jan Beulich <jbeulich@novell.com>
1153 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1154 regardless of address size prefix in effect.
1155 (ptr_reg): Size or address registers does not depend on rex64, but
1156 on the presence of an address size override.
1157 (OP_MMX): Use rex.x only for xmm registers.
1158 (OP_EM): Use rex.z only for xmm registers.
1160 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1162 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1163 move/branch operations to the bottom so that VR5400 multimedia
1164 instructions take precedence in disassembly.
1166 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1168 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1169 ISA-specific "break" encoding.
1171 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1173 * arm-opc.h: Fix typo in comment.
1175 2004-07-11 Andreas Schwab <schwab@suse.de>
1177 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1179 2004-07-09 Andreas Schwab <schwab@suse.de>
1181 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1183 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1185 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1186 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1187 (crx-dis.lo): New target.
1188 (crx-opc.lo): Likewise.
1189 * Makefile.in: Regenerate.
1190 * configure.in: Handle bfd_crx_arch.
1191 * configure: Regenerate.
1192 * crx-dis.c: New file.
1193 * crx-opc.c: New file.
1194 * disassemble.c (ARCH_crx): Define.
1195 (disassembler): Handle ARCH_crx.
1197 2004-06-29 James E Wilson <wilson@specifixinc.com>
1199 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1200 * ia64-asmtab.c: Regnerate.
1202 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1204 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1205 (extract_fxm): Don't test dialect.
1206 (XFXFXM_MASK): Include the power4 bit.
1207 (XFXM): Add p4 param.
1208 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1210 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1212 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1213 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1215 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1217 * ppc-opc.c (BH, XLBH_MASK): Define.
1218 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1220 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1222 * i386-dis.c (x_mode): Comment.
1223 (two_source_ops): File scope.
1224 (float_mem): Correct fisttpll and fistpll.
1225 (float_mem_mode): New table.
1227 (OP_E): Correct intel mode PTR output.
1228 (ptr_reg): Use open_char and close_char.
1229 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1230 operands. Set two_source_ops.
1232 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1234 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1235 instead of _raw_size.
1237 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1239 * ia64-gen.c (in_iclass): Handle more postinc st
1241 * ia64-asmtab.c: Rebuilt.
1243 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1245 * s390-opc.txt: Correct architecture mask for some opcodes.
1246 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1247 in the esa mode as well.
1249 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1251 * sh-dis.c (target_arch): Make unsigned.
1252 (print_insn_sh): Replace (most of) switch with a call to
1253 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1254 * sh-opc.h: Redefine architecture flags values.
1255 Add sh3-nommu architecture.
1256 Reorganise <arch>_up macros so they make more visual sense.
1257 (SH_MERGE_ARCH_SET): Define new macro.
1258 (SH_VALID_BASE_ARCH_SET): Likewise.
1259 (SH_VALID_MMU_ARCH_SET): Likewise.
1260 (SH_VALID_CO_ARCH_SET): Likewise.
1261 (SH_VALID_ARCH_SET): Likewise.
1262 (SH_MERGE_ARCH_SET_VALID): Likewise.
1263 (SH_ARCH_SET_HAS_FPU): Likewise.
1264 (SH_ARCH_SET_HAS_DSP): Likewise.
1265 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1266 (sh_get_arch_from_bfd_mach): Add prototype.
1267 (sh_get_arch_up_from_bfd_mach): Likewise.
1268 (sh_get_bfd_mach_from_arch_set): Likewise.
1269 (sh_merge_bfd_arc): Likewise.
1271 2004-05-24 Peter Barada <peter@the-baradas.com>
1273 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1274 into new match_insn_m68k function. Loop over canidate
1275 matches and select first that completely matches.
1276 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1277 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1278 to verify addressing for MAC/EMAC.
1279 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1280 reigster halves since 'fpu' and 'spl' look misleading.
1281 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1282 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1283 first, tighten up match masks.
1284 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1285 'size' from special case code in print_insn_m68k to
1286 determine decode size of insns.
1288 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1290 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1291 well as when -mpower4.
1293 2004-05-13 Nick Clifton <nickc@redhat.com>
1295 * po/fr.po: Updated French translation.
1297 2004-05-05 Peter Barada <peter@the-baradas.com>
1299 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1300 variants in arch_mask. Only set m68881/68851 for 68k chips.
1301 * m68k-op.c: Switch from ColdFire chips to core variants.
1303 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1306 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1308 2004-04-29 Ben Elliston <bje@au.ibm.com>
1310 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1311 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1313 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1315 * sh-dis.c (print_insn_sh): Print the value in constant pool
1316 as a symbol if it looks like a symbol.
1318 2004-04-22 Peter Barada <peter@the-baradas.com>
1320 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1321 appropriate ColdFire architectures.
1322 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1324 Add EMAC instructions, fix MAC instructions. Remove
1325 macmw/macml/msacmw/msacml instructions since mask addressing now
1328 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1330 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1331 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1332 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1333 macro. Adjust all users.
1335 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1337 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1340 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1342 * m32r-asm.c: Regenerate.
1344 2004-03-29 Stan Shebs <shebs@apple.com>
1346 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1349 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1351 * aclocal.m4: Regenerate.
1352 * config.in: Regenerate.
1353 * configure: Regenerate.
1354 * po/POTFILES.in: Regenerate.
1355 * po/opcodes.pot: Regenerate.
1357 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1359 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1361 * ppc-opc.c (RA0): Define.
1362 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1363 (RAOPT): Rename from RAO. Update all uses.
1364 (powerpc_opcodes): Use RA0 as appropriate.
1366 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1368 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1370 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1372 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1374 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1376 * i386-dis.c (GRPPLOCK): Delete.
1377 (grps): Delete GRPPLOCK entry.
1379 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1381 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1383 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1384 (GRPPADLCK): Define.
1385 (dis386): Use NOP_Fixup on "nop".
1386 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1387 (twobyte_has_modrm): Set for 0xa7.
1388 (padlock_table): Delete. Move to..
1389 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1391 (print_insn): Revert PADLOCK_SPECIAL code.
1392 (OP_E): Delete sfence, lfence, mfence checks.
1394 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1396 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1397 (INVLPG_Fixup): New function.
1398 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1400 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1402 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1403 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1404 (padlock_table): New struct with PadLock instructions.
1405 (print_insn): Handle PADLOCK_SPECIAL.
1407 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1409 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1410 (OP_E): Twiddle clflush to sfence here.
1412 2004-03-08 Nick Clifton <nickc@redhat.com>
1414 * po/de.po: Updated German translation.
1416 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1418 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1419 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1420 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1423 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1425 * frv-asm.c: Regenerate.
1426 * frv-desc.c: Regenerate.
1427 * frv-desc.h: Regenerate.
1428 * frv-dis.c: Regenerate.
1429 * frv-ibld.c: Regenerate.
1430 * frv-opc.c: Regenerate.
1431 * frv-opc.h: Regenerate.
1433 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1435 * frv-desc.c, frv-opc.c: Regenerate.
1437 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1439 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1441 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1443 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1444 Also correct mistake in the comment.
1446 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1448 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1449 ensure that double registers have even numbers.
1450 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1451 that reserved instruction 0xfffd does not decode the same
1453 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1454 REG_N refers to a double register.
1455 Add REG_N_B01 nibble type and use it instead of REG_NM
1457 Adjust the bit patterns in a few comments.
1459 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1461 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1463 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1465 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1467 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1469 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1471 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1473 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1474 mtivor32, mtivor33, mtivor34.
1476 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1478 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1480 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1482 * arm-opc.h Maverick accumulator register opcode fixes.
1484 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1486 * m32r-dis.c: Regenerate.
1488 2004-01-27 Michael Snyder <msnyder@redhat.com>
1490 * sh-opc.h (sh_table): "fsrra", not "fssra".
1492 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1494 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1497 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1499 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1501 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1503 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1504 1. Don't print scale factor on AT&T mode when index missing.
1506 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1508 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1509 when loaded into XR registers.
1511 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1513 * frv-desc.h: Regenerate.
1514 * frv-desc.c: Regenerate.
1515 * frv-opc.c: Regenerate.
1517 2004-01-13 Michael Snyder <msnyder@redhat.com>
1519 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1521 2004-01-09 Paul Brook <paul@codesourcery.com>
1523 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1526 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1528 * Makefile.am (libopcodes_la_DEPENDENCIES)
1529 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1530 comment about the problem.
1531 * Makefile.in: Regenerate.
1533 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1535 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1536 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1537 cut&paste errors in shifting/truncating numerical operands.
1538 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1539 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1540 (parse_uslo16): Likewise.
1541 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1542 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1543 (parse_s12): Likewise.
1544 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1545 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1546 (parse_uslo16): Likewise.
1547 (parse_uhi16): Parse gothi and gotfuncdeschi.
1548 (parse_d12): Parse got12 and gotfuncdesc12.
1549 (parse_s12): Likewise.
1551 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1553 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1554 instruction which looks similar to an 'rla' instruction.
1556 For older changes see ChangeLog-0203
1562 version-control: never