opcodes/ChangeLog

   1 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
   2
   3         * xtensa-dis.c (state_names): Delete.
   4         (fetch_data): Use xtensa_isa_maxlength.
   5         (print_xtensa_operand): Replace operand parameter with opcode/operand
   6         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
   7         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
   8         instruction bundles.  Use xmalloc instead of malloc.
   9
  10 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
  11
  12         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
  13         initializers.
  14
  15 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
  16
  17         * crx-opc.c (crx_instruction): Support Co-processor insns.
  18         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
  19         (getregliststring): Change function to use the above enum.
  20         (print_arg): Handle CO-Processor insns.
  21         (crx_cinvs): Add 'b' option to invalidate the branch-target
  22         cache.
  23
  24 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
  25
  26         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
  27         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
  28         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
  29         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
  30         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
  31
  32 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
  33
  34         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
  35         rather than add it.
  36
  37 2004-09-30  Paul Brook  <paul@codesourcery.com>
  38
  39         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
  40         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
  41
  42 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
  43
  44         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
  45         (CONFIG_STATUS_DEPENDENCIES): New.
  46         (Makefile): Removed.
  47         (config.status): Likewise.
  48         * Makefile.in: Regenerated.
  49
  50 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
  51
  52         * Makefile.am: Run "make dep-am".
  53         * Makefile.in: Regenerate.
  54         * aclocal.m4: Regenerate.
  55         * configure: Regenerate.
  56         * po/POTFILES.in: Regenerate.
  57         * po/opcodes.pot: Regenerate.
  58
  59 2004-09-11  Andreas Schwab  <schwab@suse.de>
  60
  61         * configure: Rebuild.
  62
  63 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
  64
  65         * ppc-opc.c (L): Make this field not optional.
  66
  67 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
  68
  69         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
  70         Fix parameter to 'm[t|f]csr' insns.
  71
  72 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
  73
  74         * configure.in: Autoupdate to autoconf 2.59.
  75         * aclocal.m4: Rebuild with aclocal 1.4p6.
  76         * configure: Rebuild with autoconf 2.59.
  77         * Makefile.in: Rebuild with automake 1.4p6 (picking up
  78         bfd changes for autoconf 2.59 on the way).
  79         * config.in: Rebuild with autoheader 2.59.
  80
  81 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
  82
  83         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
  84
  85 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
  86
  87         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
  88         (GRPPADLCK2): New define.
  89         (twobyte_has_modrm): True for 0xA6.
  90         (grps): GRPPADLCK2 for opcode 0xA6.
  91
  92 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
  93
  94         Introduce SH2a support.
  95         * sh-opc.h (arch_sh2a_base): Renumber.
  96         (arch_sh2a_nofpu_base): Remove.
  97         (arch_sh_base_mask): Adjust.
  98         (arch_opann_mask): New.
  99         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 100         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 101         (sh_table): Adjust whitespace.
 102         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 103         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 104         instruction list throughout.
 105         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 106         of arch_sh2a in instruction list throughout.
 107         (arch_sh2e_up): Accomodate above changes.
 108         (arch_sh2_up): Ditto.
 109         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 110         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 111         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 112         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 113         * sh-opc.h (arch_sh2a_nofpu): New.
 114         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 115         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 116         instruction.
 117         2004-01-20  DJ Delorie  <dj@redhat.com>
 118         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 119         2003-12-29  DJ Delorie  <dj@redhat.com>
 120         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 121         sh_opcode_info, sh_table): Add sh2a support.
 122         (arch_op32): New, to tag 32-bit opcodes.
 123         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 124         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 125         * sh-opc.h (arch_sh2a): Add.
 126         * sh-dis.c (arch_sh2a): Handle.
 127         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 128
 129 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 130
 131         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 132
 133 2004-07-22  Nick Clifton  <nickc@redhat.com>
 134
 135         PR/280
 136         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 137         insns - this is done by objdump itself.
 138         * h8500-dis.c (print_insn_h8500): Likewise.
 139
 140 2004-07-21  Jan Beulich <jbeulich@novell.com>
 141
 142         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 143         regardless of address size prefix in effect.
 144         (ptr_reg): Size or address registers does not depend on rex64, but
 145         on the presence of an address size override.
 146         (OP_MMX): Use rex.x only for xmm registers.
 147         (OP_EM): Use rex.z only for xmm registers.
 148
 149 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 150
 151         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 152         move/branch operations to the bottom so that VR5400 multimedia
 153         instructions take precedence in disassembly.
 154
 155 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 156
 157         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 158         ISA-specific "break" encoding.
 159
 160 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 161
 162         * arm-opc.h: Fix typo in comment.
 163
 164 2004-07-11  Andreas Schwab  <schwab@suse.de>
 165
 166         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 167
 168 2004-07-09  Andreas Schwab  <schwab@suse.de>
 169
 170         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 171
 172 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 173
 174         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 175         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 176         (crx-dis.lo): New target.
 177         (crx-opc.lo): Likewise.
 178         * Makefile.in: Regenerate.
 179         * configure.in: Handle bfd_crx_arch.
 180         * configure: Regenerate.
 181         * crx-dis.c: New file.
 182         * crx-opc.c: New file.
 183         * disassemble.c (ARCH_crx): Define.
 184         (disassembler): Handle ARCH_crx.
 185
 186 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 187
 188         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 189         * ia64-asmtab.c: Regnerate.
 190
 191 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 192
 193         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 194         (extract_fxm): Don't test dialect.
 195         (XFXFXM_MASK): Include the power4 bit.
 196         (XFXM): Add p4 param.
 197         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 198
 199 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 200
 201         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 202         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 203
 204 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 205
 206         * ppc-opc.c (BH, XLBH_MASK): Define.
 207         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 208
 209 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 210
 211         * i386-dis.c (x_mode): Comment.
 212         (two_source_ops): File scope.
 213         (float_mem): Correct fisttpll and fistpll.
 214         (float_mem_mode): New table.
 215         (dofloat): Use it.
 216         (OP_E): Correct intel mode PTR output.
 217         (ptr_reg): Use open_char and close_char.
 218         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 219         operands.  Set two_source_ops.
 220
 221 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 222
 223         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 224         instead of _raw_size.
 225
 226 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 227
 228         * ia64-gen.c (in_iclass): Handle more postinc st
 229         and ld variants.
 230         * ia64-asmtab.c: Rebuilt.
 231
 232 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 233
 234         * s390-opc.txt: Correct architecture mask for some opcodes.
 235         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 236         in the esa mode as well.
 237
 238 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 239
 240         * sh-dis.c (target_arch): Make unsigned.
 241         (print_insn_sh): Replace (most of) switch with a call to
 242         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 243         * sh-opc.h: Redefine architecture flags values.
 244         Add sh3-nommu architecture.
 245         Reorganise <arch>_up macros so they make more visual sense.
 246         (SH_MERGE_ARCH_SET): Define new macro.
 247         (SH_VALID_BASE_ARCH_SET): Likewise.
 248         (SH_VALID_MMU_ARCH_SET): Likewise.
 249         (SH_VALID_CO_ARCH_SET): Likewise.
 250         (SH_VALID_ARCH_SET): Likewise.
 251         (SH_MERGE_ARCH_SET_VALID): Likewise.
 252         (SH_ARCH_SET_HAS_FPU): Likewise.
 253         (SH_ARCH_SET_HAS_DSP): Likewise.
 254         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 255         (sh_get_arch_from_bfd_mach): Add prototype.
 256         (sh_get_arch_up_from_bfd_mach): Likewise.
 257         (sh_get_bfd_mach_from_arch_set): Likewise.
 258         (sh_merge_bfd_arc): Likewise.
 259
 260 2004-05-24  Peter Barada  <peter@the-baradas.com>
 261
 262         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 263         into new match_insn_m68k function.  Loop over canidate
 264         matches and select first that completely matches.
 265         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 266         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 267         to verify addressing for MAC/EMAC.
 268         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 269         reigster halves since 'fpu' and 'spl' look misleading.
 270         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 271         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 272         first, tighten up match masks.
 273         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 274         'size' from special case code in print_insn_m68k to
 275         determine decode size of insns.
 276
 277 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 278
 279         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 280         well as when -mpower4.
 281
 282 2004-05-13  Nick Clifton  <nickc@redhat.com>
 283
 284         * po/fr.po: Updated French translation.
 285
 286 2004-05-05  Peter Barada  <peter@the-baradas.com>
 287
 288         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 289         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 290         * m68k-op.c: Switch from ColdFire chips to core variants.
 291
 292 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 293
 294         PR 147.
 295         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 296
 297 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 298
 299         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 300         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 301
 302 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 303
 304         * sh-dis.c (print_insn_sh): Print the value in constant pool
 305         as a symbol if it looks like a symbol.
 306
 307 2004-04-22  Peter Barada <peter@the-baradas.com>
 308
 309         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 310         appropriate ColdFire architectures.
 311         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 312         mask addressing.
 313         Add EMAC instructions, fix MAC instructions. Remove
 314         macmw/macml/msacmw/msacml instructions since mask addressing now
 315         supported.
 316
 317 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 318
 319         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 320         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 321         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 322         macro.  Adjust all users.
 323
 324 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 325
 326         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 327         separately.
 328
 329 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 330
 331         * m32r-asm.c: Regenerate.
 332
 333 2004-03-29  Stan Shebs  <shebs@apple.com>
 334
 335         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 336         used.
 337
 338 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 339
 340         * aclocal.m4: Regenerate.
 341         * config.in: Regenerate.
 342         * configure: Regenerate.
 343         * po/POTFILES.in: Regenerate.
 344         * po/opcodes.pot: Regenerate.
 345
 346 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 347
 348         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 349         PPC_OPERANDS_GPR_0.
 350         * ppc-opc.c (RA0): Define.
 351         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 352         (RAOPT): Rename from RAO.  Update all uses.
 353         (powerpc_opcodes): Use RA0 as appropriate.
 354
 355 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 356
 357         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 358
 359 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 360
 361         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 362
 363 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 364
 365         * i386-dis.c (GRPPLOCK): Delete.
 366         (grps): Delete GRPPLOCK entry.
 367
 368 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 369
 370         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 371         (M, Mp): Use OP_M.
 372         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 373         (GRPPADLCK): Define.
 374         (dis386): Use NOP_Fixup on "nop".
 375         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 376         (twobyte_has_modrm): Set for 0xa7.
 377         (padlock_table): Delete.  Move to..
 378         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 379         and clflush.
 380         (print_insn): Revert PADLOCK_SPECIAL code.
 381         (OP_E): Delete sfence, lfence, mfence checks.
 382
 383 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 384
 385         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 386         (INVLPG_Fixup): New function.
 387         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 388
 389 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 390
 391         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 392         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 393         (padlock_table): New struct with PadLock instructions.
 394         (print_insn): Handle PADLOCK_SPECIAL.
 395
 396 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 397
 398         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 399         (OP_E): Twiddle clflush to sfence here.
 400
 401 2004-03-08  Nick Clifton  <nickc@redhat.com>
 402
 403         * po/de.po: Updated German translation.
 404
 405 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 406
 407         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 408         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 409         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 410         accordingly.
 411
 412 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 413
 414         * frv-asm.c: Regenerate.
 415         * frv-desc.c: Regenerate.
 416         * frv-desc.h: Regenerate.
 417         * frv-dis.c: Regenerate.
 418         * frv-ibld.c: Regenerate.
 419         * frv-opc.c: Regenerate.
 420         * frv-opc.h: Regenerate.
 421
 422 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 423
 424         * frv-desc.c, frv-opc.c: Regenerate.
 425
 426 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 427
 428         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 429
 430 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 431
 432         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 433         Also correct mistake in the comment.
 434
 435 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 436
 437         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 438         ensure that double registers have even numbers.
 439         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 440         that reserved instruction 0xfffd does not decode the same
 441         as 0xfdfd (ftrv).
 442         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 443         REG_N refers to a double register.
 444         Add REG_N_B01 nibble type and use it instead of REG_NM
 445         in ftrv.
 446         Adjust the bit patterns in a few comments.
 447
 448 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 449
 450         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 451
 452 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 453
 454         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 455
 456 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 457
 458         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 459
 460 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 461
 462         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 463         mtivor32, mtivor33, mtivor34.
 464
 465 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 466
 467         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 468
 469 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 470
 471         * arm-opc.h Maverick accumulator register opcode fixes.
 472
 473 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 474
 475         * m32r-dis.c: Regenerate.
 476
 477 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 478
 479         * sh-opc.h (sh_table): "fsrra", not "fssra".
 480
 481 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 482
 483         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 484         contraints.
 485
 486 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 487
 488         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 489
 490 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 491
 492         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 493         1.  Don't print scale factor on AT&T mode when index missing.
 494
 495 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 496
 497         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 498         when loaded into XR registers.
 499
 500 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 501
 502         * frv-desc.h: Regenerate.
 503         * frv-desc.c: Regenerate.
 504         * frv-opc.c: Regenerate.
 505
 506 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 507
 508         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 509
 510 2004-01-09  Paul Brook  <paul@codesourcery.com>
 511
 512         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 513         specific opcodes.
 514
 515 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 516
 517         * Makefile.am (libopcodes_la_DEPENDENCIES)
 518         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 519         comment about the problem.
 520         * Makefile.in: Regenerate.
 521
 522 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 523
 524         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 525         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 526         cut&paste errors in shifting/truncating numerical operands.
 527         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 528         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 529         (parse_uslo16): Likewise.
 530         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 531         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 532         (parse_s12): Likewise.
 533         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 534         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 535         (parse_uslo16): Likewise.
 536         (parse_uhi16): Parse gothi and gotfuncdeschi.
 537         (parse_d12): Parse got12 and gotfuncdesc12.
 538         (parse_s12): Likewise.
 539
 540 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 541
 542         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 543         instruction which looks similar to an 'rla' instruction.
 544
 545 For older changes see ChangeLog-0203
 546 \f
 547 Local Variables:
 548 mode: change-log
 549 left-margin: 8
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