42a7c3108b55faa4531447dafeb644b0c7f9e48a
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
4 and 256-bit templates.
5 * i386-tlb.h: Re-generate.
6
7 2018-03-08 Jan Beulich <jbeulich@suse.com>
8
9 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
10 * i386-tlb.h: Re-generate.
11
12 2018-03-08 Jan Beulich <jbeulich@suse.com>
13
14 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
15 Drop NoAVX.
16 * i386-tlb.h: Re-generate.
17
18 2018-03-08 Jan Beulich <jbeulich@suse.com>
19
20 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
21 * i386-tlb.h: Re-generate.
22
23 2018-03-08 Jan Beulich <jbeulich@suse.com>
24
25 * i386-gen.c (opcode_modifiers): Delete FloatD.
26 * i386-opc.h (FloatD): Delete.
27 (struct i386_opcode_modifier): Delete floatd.
28 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
29 FloatD by D.
30 * i386-tlb.h: Re-generate.
31
32 2018-03-08 Jan Beulich <jbeulich@suse.com>
33
34 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
35
36 2018-03-08 Jan Beulich <jbeulich@suse.com>
37
38 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
39 * i386-tlb.h: Re-generate.
40
41 2018-03-08 Jan Beulich <jbeulich@suse.com>
42
43 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
44 forms.
45 * i386-tlb.h: Re-generate.
46
47 2018-03-07 Alan Modra <amodra@gmail.com>
48
49 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
50 bfd_arch_rs6000.
51 * disassemble.h (print_insn_rs6000): Delete.
52 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
53 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
54 (print_insn_rs6000): Delete.
55
56 2018-03-03 Alan Modra <amodra@gmail.com>
57
58 * sysdep.h (opcodes_error_handler): Define.
59 (_bfd_error_handler): Declare.
60 * Makefile.am: Remove stray #.
61 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
62 EDIT" comment.
63 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
64 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
65 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
66 opcodes_error_handler to print errors. Standardize error messages.
67 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
68 and include opintl.h.
69 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
70 * i386-gen.c: Standardize error messages.
71 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
72 * Makefile.in: Regenerate.
73 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
74 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
75 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
76 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
77 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
78 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
79 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
80 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
81 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
82 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
83 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
84 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
85 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
86
87 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
88
89 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
90 vpsub[bwdq] instructions.
91 * i386-tbl.h: Regenerated.
92
93 2018-03-01 Alan Modra <amodra@gmail.com>
94
95 * configure.ac (ALL_LINGUAS): Sort.
96 * configure: Regenerate.
97
98 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
99
100 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
101 macro by assignements.
102
103 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
104
105 PR gas/22871
106 * i386-gen.c (opcode_modifiers): Add Optimize.
107 * i386-opc.h (Optimize): New enum.
108 (i386_opcode_modifier): Add optimize.
109 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
110 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
111 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
112 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
113 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
114 vpxord and vpxorq.
115 * i386-tbl.h: Regenerated.
116
117 2018-02-26 Alan Modra <amodra@gmail.com>
118
119 * crx-dis.c (getregliststring): Allocate a large enough buffer
120 to silence false positive gcc8 warning.
121
122 2018-02-22 Shea Levy <shea@shealevy.com>
123
124 * disassemble.c (ARCH_riscv): Define if ARCH_all.
125
126 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
127
128 * i386-opc.tbl: Add {rex},
129 * i386-tbl.h: Regenerated.
130
131 2018-02-20 Maciej W. Rozycki <macro@mips.com>
132
133 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
134 (mips16_opcodes): Replace `M' with `m' for "restore".
135
136 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
137
138 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
139
140 2018-02-13 Maciej W. Rozycki <macro@mips.com>
141
142 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
143 variable to `function_index'.
144
145 2018-02-13 Nick Clifton <nickc@redhat.com>
146
147 PR 22823
148 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
149 about truncation of printing.
150
151 2018-02-12 Henry Wong <henry@stuffedcow.net>
152
153 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
154
155 2018-02-05 Nick Clifton <nickc@redhat.com>
156
157 * po/pt_BR.po: Updated Brazilian Portuguese translation.
158
159 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
160
161 * i386-dis.c (enum): Add pconfig.
162 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
163 (cpu_flags): Add CpuPCONFIG.
164 * i386-opc.h (enum): Add CpuPCONFIG.
165 (i386_cpu_flags): Add cpupconfig.
166 * i386-opc.tbl: Add PCONFIG instruction.
167 * i386-init.h: Regenerate.
168 * i386-tbl.h: Likewise.
169
170 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
171
172 * i386-dis.c (enum): Add PREFIX_0F09.
173 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
174 (cpu_flags): Add CpuWBNOINVD.
175 * i386-opc.h (enum): Add CpuWBNOINVD.
176 (i386_cpu_flags): Add cpuwbnoinvd.
177 * i386-opc.tbl: Add WBNOINVD instruction.
178 * i386-init.h: Regenerate.
179 * i386-tbl.h: Likewise.
180
181 2018-01-17 Jim Wilson <jimw@sifive.com>
182
183 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
184
185 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
186
187 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
188 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
189 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
190 (cpu_flags): Add CpuIBT, CpuSHSTK.
191 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
192 (i386_cpu_flags): Add cpuibt, cpushstk.
193 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
194 * i386-init.h: Regenerate.
195 * i386-tbl.h: Likewise.
196
197 2018-01-16 Nick Clifton <nickc@redhat.com>
198
199 * po/pt_BR.po: Updated Brazilian Portugese translation.
200 * po/de.po: Updated German translation.
201
202 2018-01-15 Jim Wilson <jimw@sifive.com>
203
204 * riscv-opc.c (match_c_nop): New.
205 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
206
207 2018-01-15 Nick Clifton <nickc@redhat.com>
208
209 * po/uk.po: Updated Ukranian translation.
210
211 2018-01-13 Nick Clifton <nickc@redhat.com>
212
213 * po/opcodes.pot: Regenerated.
214
215 2018-01-13 Nick Clifton <nickc@redhat.com>
216
217 * configure: Regenerate.
218
219 2018-01-13 Nick Clifton <nickc@redhat.com>
220
221 2.30 branch created.
222
223 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
224
225 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
226 * i386-tbl.h: Regenerate.
227
228 2018-01-10 Jan Beulich <jbeulich@suse.com>
229
230 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
231 * i386-tbl.h: Re-generate.
232
233 2018-01-10 Jan Beulich <jbeulich@suse.com>
234
235 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
236 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
237 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
238 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
239 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
240 Disp8MemShift of AVX512VL forms.
241 * i386-tbl.h: Re-generate.
242
243 2018-01-09 Jim Wilson <jimw@sifive.com>
244
245 * riscv-dis.c (maybe_print_address): If base_reg is zero,
246 then the hi_addr value is zero.
247
248 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
249
250 * arm-dis.c (arm_opcodes): Add csdb.
251 (thumb32_opcodes): Add csdb.
252
253 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
254
255 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
256 * aarch64-asm-2.c: Regenerate.
257 * aarch64-dis-2.c: Regenerate.
258 * aarch64-opc-2.c: Regenerate.
259
260 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
261
262 PR gas/22681
263 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
264 Remove AVX512 vmovd with 64-bit operands.
265 * i386-tbl.h: Regenerated.
266
267 2018-01-05 Jim Wilson <jimw@sifive.com>
268
269 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
270 jalr.
271
272 2018-01-03 Alan Modra <amodra@gmail.com>
273
274 Update year range in copyright notice of all files.
275
276 2018-01-02 Jan Beulich <jbeulich@suse.com>
277
278 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
279 and OPERAND_TYPE_REGZMM entries.
280
281 For older changes see ChangeLog-2017
282 \f
283 Copyright (C) 2018 Free Software Foundation, Inc.
284
285 Copying and distribution of this file, with or without modification,
286 are permitted in any medium without royalty provided the copyright
287 notice and this notice are preserved.
288
289 Local Variables:
290 mode: change-log
291 left-margin: 8
292 fill-column: 74
293 version-control: never
294 End:
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