1 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
3 * m32r-asm.c: Regenerate.
5 2005-10-25 DJ Delorie <dj@redhat.com>
7 * m32c-asm.c: Regenerate.
8 * m32c-desc.c: Regenerate.
9 * m32c-desc.h: Regenerate.
10 * m32c-dis.c: Regenerate.
11 * m32c-ibld.c: Regenerate.
12 * m32c-opc.c: Regenerate.
13 * m32c-opc.h: Regenerate.
15 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
17 * configure.in: Add target architecture bfd_arch_z80.
18 * configure: Regenerated.
19 * disassemble.c (disassembler)<ARCH_z80>: Add case
21 * z80-dis.c: New file.
23 2005-10-25 Alan Modra <amodra@bigpond.net.au>
25 * po/POTFILES.in: Regenerate.
26 * po/opcodes.pot: Regenerate.
28 2005-10-24 Jan Beulich <jbeulich@novell.com>
30 * ia64-asmtab.c: Regenerate.
32 2005-10-21 DJ Delorie <dj@redhat.com>
34 * m32c-asm.c: Regenerate.
35 * m32c-desc.c: Regenerate.
36 * m32c-desc.h: Regenerate.
37 * m32c-dis.c: Regenerate.
38 * m32c-ibld.c: Regenerate.
39 * m32c-opc.c: Regenerate.
40 * m32c-opc.h: Regenerate.
42 2005-10-21 Nick Clifton <nickc@redhat.com>
44 * bfin-dis.c: Tidy up code, removing redundant constructs.
46 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
48 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
51 2005-10-18 Nick Clifton <nickc@redhat.com>
53 * m32r-asm.c: Regenerate after updating m32r.opc.
55 2005-10-18 Jie Zhang <jie.zhang@analog.com>
57 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
58 reading instruction from memory.
60 2005-10-18 Nick Clifton <nickc@redhat.com>
62 * m32r-asm.c: Regenerate after updating m32r.opc.
64 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
66 * m32r-asm.c: Regenerate after updating m32r.opc.
68 2005-10-08 James Lemke <jim@wasabisystems.com>
70 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
73 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
75 * ppc-dis.c (struct dis_private): Remove.
76 (powerpc_dialect): Avoid aliasing warnings.
77 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
79 2005-09-30 Nick Clifton <nickc@redhat.com>
81 * po/ga.po: New Irish translation.
82 * configure.in (ALL_LINGUAS): Add "ga".
83 * configure: Regenerate.
85 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
87 * Makefile.am: Run "make dep-am".
88 * Makefile.in: Regenerated.
89 * aclocal.m4: Likewise.
90 * configure: Likewise.
92 2005-09-30 Catherine Moore <clm@cm00re.com>
94 * Makefile.am: Bfin support.
95 * Makefile.in: Regenerated.
96 * aclocal.m4: Regenerated.
97 * bfin-dis.c: New file.
98 * configure.in: Bfin support.
99 * configure: Regenerated.
100 * disassemble.c (ARCH_bfin): Define.
101 (disassembler): Add case for bfd_arch_bfin.
103 2005-09-28 Jan Beulich <jbeulich@novell.com>
105 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
108 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
109 (dis386): Document and use new 'V' meta character. Use it for
110 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
111 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
112 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
113 data prefix as used whenever DFLAG was examined. Handle 'V'.
114 (intel_operand_size): Use stack_v_mode.
115 (OP_E): Use stack_v_mode, but handle only the special case of
116 64-bit mode without operand size override here; fall through to
117 v_mode case otherwise.
118 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
119 and no operand size override is present.
120 (OP_J): Use get32s for obtaining the displacement also when rex64
123 2005-09-08 Paul Brook <paul@codesourcery.com>
125 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
127 2005-09-06 Chao-ying Fu <fu@mips.com>
129 * mips-opc.c (MT32): New define.
130 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
131 bottom to avoid opcode collision with "mftr" and "mttr".
133 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
134 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
137 2005-09-02 Paul Brook <paul@codesourcery.com>
139 * arm-dis.c (coprocessor_opcodes): Add null terminator.
141 2005-09-02 Paul Brook <paul@codesourcery.com>
143 * arm-dis.c (coprocessor_opcodes): New.
144 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
145 (print_insn_coprocessor): New function.
146 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
148 (print_insn_thumb32): Use print_insn_coprocessor.
150 2005-08-30 Paul Brook <paul@codesourcery.com>
152 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
154 2005-08-26 Jan Beulich <jbeulich@novell.com>
156 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
158 (OP_E): Call intel_operand_size, move call site out of mode
160 (OP_OFF): Call intel_operand_size if suffix_always. Remove
161 ATTRIBUTE_UNUSED from parameters.
162 (OP_OFF64): Likewise.
163 (OP_ESreg): Call intel_operand_size.
164 (OP_DSreg): Likewise.
165 (OP_DIR): Use colon rather than semicolon as separator of far
168 2005-08-25 Chao-ying Fu <fu@mips.com>
170 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
171 (mips_builtin_opcodes): Add DSP instructions.
172 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
174 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
177 2005-08-23 David Ung <davidu@mips.com>
179 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
180 instructions to the table.
182 2005-08-18 Alan Modra <amodra@bigpond.net.au>
184 * a29k-dis.c: Delete.
185 * Makefile.am: Remove a29k support.
186 * configure.in: Likewise.
187 * disassemble.c: Likewise.
188 * Makefile.in: Regenerate.
189 * configure: Regenerate.
190 * po/POTFILES.in: Regenerate.
192 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
194 * ppc-dis.c (powerpc_dialect): Handle e300.
195 (print_ppc_disassembler_options): Likewise.
196 * ppc-opc.c (PPCE300): Define.
197 (powerpc_opcodes): Mark icbt as available for the e300.
199 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
201 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
202 Use "rp" instead of "%r2" in "b,l" insns.
204 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
206 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
207 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
209 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
210 and 4 bit optional masks.
211 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
212 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
213 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
214 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
215 (s390_opformats): Likewise.
216 * s390-opc.txt: Add new instructions for cpu type z9-109.
218 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
220 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
222 2005-07-29 Paul Brook <paul@codesourcery.com>
224 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
226 2005-07-29 Paul Brook <paul@codesourcery.com>
228 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
229 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
231 2005-07-25 DJ Delorie <dj@redhat.com>
233 * m32c-asm.c Regenerate.
234 * m32c-dis.c Regenerate.
236 2005-07-20 DJ Delorie <dj@redhat.com>
238 * disassemble.c (disassemble_init_for_target): M32C ISAs are
239 enums, so convert them to bit masks, which attributes are.
241 2005-07-18 Nick Clifton <nickc@redhat.com>
243 * configure.in: Restore alpha ordering to list of arches.
244 * configure: Regenerate.
245 * disassemble.c: Restore alpha ordering to list of arches.
247 2005-07-18 Nick Clifton <nickc@redhat.com>
249 * m32c-asm.c: Regenerate.
250 * m32c-desc.c: Regenerate.
251 * m32c-desc.h: Regenerate.
252 * m32c-dis.c: Regenerate.
253 * m32c-ibld.h: Regenerate.
254 * m32c-opc.c: Regenerate.
255 * m32c-opc.h: Regenerate.
257 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
259 * i386-dis.c (PNI_Fixup): Update comment.
260 (VMX_Fixup): Properly handle the suffix check.
262 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
264 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
267 2005-07-16 Alan Modra <amodra@bigpond.net.au>
269 * Makefile.am: Run "make dep-am".
270 (stamp-m32c): Fix cpu dependencies.
271 * Makefile.in: Regenerate.
272 * ip2k-dis.c: Regenerate.
274 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
276 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
277 (VMX_Fixup): New. Fix up Intel VMX Instructions.
281 (dis386_twobyte): Updated entries 0x78 and 0x79.
282 (twobyte_has_modrm): Likewise.
283 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
284 (OP_G): Handle m_mode.
286 2005-07-14 Jim Blandy <jimb@redhat.com>
288 Add support for the Renesas M32C and M16C.
289 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
290 * m32c-desc.h, m32c-opc.h: New.
291 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
292 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
294 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
295 m32c-ibld.lo, m32c-opc.lo.
296 (CLEANFILES): List stamp-m32c.
297 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
298 (CGEN_CPUS): Add m32c.
299 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
300 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
301 (m32c_opc_h): New variable.
302 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
303 (m32c-opc.lo): New rules.
304 * Makefile.in: Regenerated.
305 * configure.in: Add case for bfd_m32c_arch.
306 * configure: Regenerated.
307 * disassemble.c (ARCH_m32c): New.
308 [ARCH_m32c]: #include "m32c-desc.h".
309 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
310 (disassemble_init_for_target) [ARCH_m32c]: Same.
312 * cgen-ops.h, cgen-types.h: New files.
313 * Makefile.am (HFILES): List them.
314 * Makefile.in: Regenerated.
316 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
318 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
319 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
320 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
321 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
322 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
323 v850-dis.c: Fix format bugs.
324 * ia64-gen.c (fail, warn): Add format attribute.
325 * or32-opc.c (debug): Likewise.
327 2005-07-07 Khem Raj <kraj@mvista.com>
329 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
332 2005-07-06 Alan Modra <amodra@bigpond.net.au>
334 * Makefile.am (stamp-m32r): Fix path to cpu files.
335 (stamp-m32r, stamp-iq2000): Likewise.
336 * Makefile.in: Regenerate.
337 * m32r-asm.c: Regenerate.
338 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
339 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
341 2005-07-05 Nick Clifton <nickc@redhat.com>
343 * iq2000-asm.c: Regenerate.
344 * ms1-asm.c: Regenerate.
346 2005-07-05 Jan Beulich <jbeulich@novell.com>
348 * i386-dis.c (SVME_Fixup): New.
349 (grps): Use it for the lidt entry.
350 (PNI_Fixup): Call OP_M rather than OP_E.
351 (INVLPG_Fixup): Likewise.
353 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
355 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
357 2005-07-01 Nick Clifton <nickc@redhat.com>
359 * a29k-dis.c: Update to ISO C90 style function declarations and
361 * alpha-opc.c: Likewise.
362 * arc-dis.c: Likewise.
363 * arc-opc.c: Likewise.
364 * avr-dis.c: Likewise.
365 * cgen-asm.in: Likewise.
366 * cgen-dis.in: Likewise.
367 * cgen-ibld.in: Likewise.
368 * cgen-opc.c: Likewise.
369 * cris-dis.c: Likewise.
370 * d10v-dis.c: Likewise.
371 * d30v-dis.c: Likewise.
372 * d30v-opc.c: Likewise.
373 * dis-buf.c: Likewise.
374 * dlx-dis.c: Likewise.
375 * h8300-dis.c: Likewise.
376 * h8500-dis.c: Likewise.
377 * hppa-dis.c: Likewise.
378 * i370-dis.c: Likewise.
379 * i370-opc.c: Likewise.
380 * m10200-dis.c: Likewise.
381 * m10300-dis.c: Likewise.
382 * m68k-dis.c: Likewise.
383 * m88k-dis.c: Likewise.
384 * mips-dis.c: Likewise.
385 * mmix-dis.c: Likewise.
386 * msp430-dis.c: Likewise.
387 * ns32k-dis.c: Likewise.
388 * or32-dis.c: Likewise.
389 * or32-opc.c: Likewise.
390 * pdp11-dis.c: Likewise.
391 * pj-dis.c: Likewise.
392 * s390-dis.c: Likewise.
393 * sh-dis.c: Likewise.
394 * sh64-dis.c: Likewise.
395 * sparc-dis.c: Likewise.
396 * sparc-opc.c: Likewise.
397 * sysdep.h: Likewise.
398 * tic30-dis.c: Likewise.
399 * tic4x-dis.c: Likewise.
400 * tic80-dis.c: Likewise.
401 * v850-dis.c: Likewise.
402 * v850-opc.c: Likewise.
403 * vax-dis.c: Likewise.
404 * w65-dis.c: Likewise.
405 * z8kgen.c: Likewise.
407 * fr30-*: Regenerate.
409 * ip2k-*: Regenerate.
410 * iq2000-*: Regenerate.
411 * m32r-*: Regenerate.
413 * openrisc-*: Regenerate.
414 * xstormy16-*: Regenerate.
416 2005-06-23 Ben Elliston <bje@gnu.org>
418 * m68k-dis.c: Use ISC C90.
419 * m68k-opc.c: Formatting fixes.
421 2005-06-16 David Ung <davidu@mips.com>
423 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
424 instructions to the table; seb/seh/sew/zeb/zeh/zew.
426 2005-06-15 Dave Brolley <brolley@redhat.com>
428 Contribute Morpho ms1 on behalf of Red Hat
429 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
430 ms1-opc.h: New files, Morpho ms1 target.
432 2004-05-14 Stan Cox <scox@redhat.com>
434 * disassemble.c (ARCH_ms1): Define.
435 (disassembler): Handle bfd_arch_ms1
437 2004-05-13 Michael Snyder <msnyder@redhat.com>
439 * Makefile.am, Makefile.in: Add ms1 target.
440 * configure.in: Ditto.
442 2005-06-08 Zack Weinberg <zack@codesourcery.com>
444 * arm-opc.h: Delete; fold contents into ...
445 * arm-dis.c: ... here. Move includes of internal COFF headers
446 next to includes of internal ELF headers.
447 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
448 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
449 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
450 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
451 (iwmmxt_wwnames, iwmmxt_wwssnames):
453 (regnames): Remove iWMMXt coprocessor register sets.
454 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
455 (get_arm_regnames): Adjust fourth argument to match above changes.
456 (set_iwmmxt_regnames): Delete.
457 (print_insn_arm): Constify 'c'. Use ISO syntax for function
458 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
459 and iwmmxt_cregnames, not set_iwmmxt_regnames.
460 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
461 ISO syntax for function pointer calls.
463 2005-06-07 Zack Weinberg <zack@codesourcery.com>
465 * arm-dis.c: Split up the comments describing the format codes, so
466 that the ARM and 16-bit Thumb opcode tables each have comments
467 preceding them that describe all the codes, and only the codes,
468 valid in those tables. (32-bit Thumb table is already like this.)
469 Reorder the lists in all three comments to match the order in
470 which the codes are implemented.
471 Remove all forward declarations of static functions. Convert all
472 function definitions to ISO C format.
473 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
475 (print_insn_thumb16): Remove unused case 'I'.
476 (print_insn): Update for changed calling convention of subroutines.
478 2005-05-25 Jan Beulich <jbeulich@novell.com>
480 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
481 hex (but retain it being displayed as signed). Remove redundant
482 checks. Add handling of displacements for 16-bit addressing in Intel
485 2005-05-25 Jan Beulich <jbeulich@novell.com>
487 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
488 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
489 masking of 'rm' in 16-bit memory address handling.
491 2005-05-19 Anton Blanchard <anton@samba.org>
493 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
494 (print_ppc_disassembler_options): Document it.
495 * ppc-opc.c (SVC_LEV): Define.
496 (LEV): Allow optional operand.
498 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
499 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
501 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
503 * Makefile.in: Regenerate.
505 2005-05-17 Zack Weinberg <zack@codesourcery.com>
507 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
508 instructions. Adjust disassembly of some opcodes to match
510 (thumb32_opcodes): New table.
511 (print_insn_thumb): Rename print_insn_thumb16; don't handle
512 two-halfword branches here.
513 (print_insn_thumb32): New function.
514 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
515 and print_insn_thumb32. Be consistent about order of
516 halfwords when printing 32-bit instructions.
518 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
521 * i386-dis.c (branch_v_mode): New.
522 (indirEv): Use branch_v_mode instead of v_mode.
523 (OP_E): Handle branch_v_mode.
525 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
527 * d10v-dis.c (dis_2_short): Support 64bit host.
529 2005-05-07 Nick Clifton <nickc@redhat.com>
531 * po/nl.po: Updated translation.
533 2005-05-07 Nick Clifton <nickc@redhat.com>
535 * Update the address and phone number of the FSF organization in
536 the GPL notices in the following files:
537 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
538 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
539 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
540 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
541 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
542 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
543 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
544 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
545 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
546 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
547 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
548 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
549 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
550 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
551 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
552 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
553 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
554 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
555 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
556 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
557 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
558 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
559 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
560 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
561 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
562 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
563 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
564 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
565 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
566 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
567 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
568 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
569 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
571 2005-05-05 James E Wilson <wilson@specifixinc.com>
573 * ia64-opc.c: Include sysdep.h before libiberty.h.
575 2005-05-05 Nick Clifton <nickc@redhat.com>
577 * configure.in (ALL_LINGUAS): Add vi.
578 * configure: Regenerate.
581 2005-04-26 Jerome Guitton <guitton@gnat.com>
583 * configure.in: Fix the check for basename declaration.
584 * configure: Regenerate.
586 2005-04-19 Alan Modra <amodra@bigpond.net.au>
588 * ppc-opc.c (RTO): Define.
589 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
590 entries to suit PPC440.
592 2005-04-18 Mark Kettenis <kettenis@gnu.org>
594 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
597 2005-04-14 Nick Clifton <nickc@redhat.com>
599 * po/fi.po: New translation: Finnish.
600 * configure.in (ALL_LINGUAS): Add fi.
601 * configure: Regenerate.
603 2005-04-14 Alan Modra <amodra@bigpond.net.au>
605 * Makefile.am (NO_WERROR): Define.
606 * configure.in: Invoke AM_BINUTILS_WARNINGS.
607 * Makefile.in: Regenerate.
608 * aclocal.m4: Regenerate.
609 * configure: Regenerate.
611 2005-04-04 Nick Clifton <nickc@redhat.com>
613 * fr30-asm.c: Regenerate.
614 * frv-asm.c: Regenerate.
615 * iq2000-asm.c: Regenerate.
616 * m32r-asm.c: Regenerate.
617 * openrisc-asm.c: Regenerate.
619 2005-04-01 Jan Beulich <jbeulich@novell.com>
621 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
622 visible operands in Intel mode. The first operand of monitor is
625 2005-04-01 Jan Beulich <jbeulich@novell.com>
627 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
628 easier future additions.
630 2005-03-31 Jerome Guitton <guitton@gnat.com>
632 * configure.in: Check for basename.
633 * configure: Regenerate.
636 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
638 * i386-dis.c (SEG_Fixup): New.
640 (dis386): Use "Sv" for 0x8c and 0x8e.
642 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
643 Nick Clifton <nickc@redhat.com>
645 * vax-dis.c: (entry_addr): New varible: An array of user supplied
646 function entry mask addresses.
647 (entry_addr_occupied_slots): New variable: The number of occupied
648 elements in entry_addr.
649 (entry_addr_total_slots): New variable: The total number of
650 elements in entry_addr.
651 (parse_disassembler_options): New function. Fills in the entry_addr
653 (free_entry_array): New function. Release the memory used by the
654 entry addr array. Suppressed because there is no way to call it.
655 (is_function_entry): Check if a given address is a function's
656 start address by looking at supplied entry mask addresses and
657 symbol information, if available.
658 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
660 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
662 * cris-dis.c (print_with_operands): Use ~31L for long instead
665 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
667 * mmix-opc.c (O): Revert the last change.
670 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
672 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
675 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
677 * mmix-opc.c (O, Z): Force expression as unsigned long.
679 2005-03-18 Nick Clifton <nickc@redhat.com>
681 * ip2k-asm.c: Regenerate.
682 * op/opcodes.pot: Regenerate.
684 2005-03-16 Nick Clifton <nickc@redhat.com>
685 Ben Elliston <bje@au.ibm.com>
687 * configure.in (werror): New switch: Add -Werror to the
688 compiler command line. Enabled by default. Disable via
690 * configure: Regenerate.
692 2005-03-16 Alan Modra <amodra@bigpond.net.au>
694 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
697 2005-03-15 Alan Modra <amodra@bigpond.net.au>
699 * po/es.po: Commit new Spanish translation.
701 * po/fr.po: Commit new French translation.
703 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
705 * vax-dis.c: Fix spelling error
706 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
707 of just "Entry mask: < r1 ... >"
709 2005-03-12 Zack Weinberg <zack@codesourcery.com>
711 * arm-dis.c (arm_opcodes): Document %E and %V.
712 Add entries for v6T2 ARM instructions:
713 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
714 (print_insn_arm): Add support for %E and %V.
715 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
717 2005-03-10 Jeff Baker <jbaker@qnx.com>
718 Alan Modra <amodra@bigpond.net.au>
720 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
721 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
723 (XSPRG_MASK): Mask off extra bits now part of sprg field.
724 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
725 mfsprg4..7 after msprg and consolidate.
727 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
729 * vax-dis.c (entry_mask_bit): New array.
730 (print_insn_vax): Decode function entry mask.
732 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
734 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
736 2005-03-05 Alan Modra <amodra@bigpond.net.au>
738 * po/opcodes.pot: Regenerate.
740 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
742 * arc-dis.c (a4_decoding_class): New enum.
743 (dsmOneArcInst): Use the enum values for the decoding class.
744 Remove redundant case in the switch for decodingClass value 11.
746 2005-03-02 Jan Beulich <jbeulich@novell.com>
748 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
750 (OP_C): Consider lock prefix in non-64-bit modes.
752 2005-02-24 Alan Modra <amodra@bigpond.net.au>
754 * cris-dis.c (format_hex): Remove ineffective warning fix.
755 * crx-dis.c (make_instruction): Warning fix.
756 * frv-asm.c: Regenerate.
758 2005-02-23 Nick Clifton <nickc@redhat.com>
760 * cgen-dis.in: Use bfd_byte for buffers that are passed to
763 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
765 * crx-dis.c (make_instruction): Move argument structure into inner
766 scope and ensure that all of its fields are initialised before
769 * fr30-asm.c: Regenerate.
770 * fr30-dis.c: Regenerate.
771 * frv-asm.c: Regenerate.
772 * frv-dis.c: Regenerate.
773 * ip2k-asm.c: Regenerate.
774 * ip2k-dis.c: Regenerate.
775 * iq2000-asm.c: Regenerate.
776 * iq2000-dis.c: Regenerate.
777 * m32r-asm.c: Regenerate.
778 * m32r-dis.c: Regenerate.
779 * openrisc-asm.c: Regenerate.
780 * openrisc-dis.c: Regenerate.
781 * xstormy16-asm.c: Regenerate.
782 * xstormy16-dis.c: Regenerate.
784 2005-02-22 Alan Modra <amodra@bigpond.net.au>
786 * arc-ext.c: Warning fixes.
787 * arc-ext.h: Likewise.
788 * cgen-opc.c: Likewise.
789 * ia64-gen.c: Likewise.
790 * maxq-dis.c: Likewise.
791 * ns32k-dis.c: Likewise.
792 * w65-dis.c: Likewise.
793 * ia64-asmtab.c: Regenerate.
795 2005-02-22 Alan Modra <amodra@bigpond.net.au>
797 * fr30-desc.c: Regenerate.
798 * fr30-desc.h: Regenerate.
799 * fr30-opc.c: Regenerate.
800 * fr30-opc.h: Regenerate.
801 * frv-desc.c: Regenerate.
802 * frv-desc.h: Regenerate.
803 * frv-opc.c: Regenerate.
804 * frv-opc.h: Regenerate.
805 * ip2k-desc.c: Regenerate.
806 * ip2k-desc.h: Regenerate.
807 * ip2k-opc.c: Regenerate.
808 * ip2k-opc.h: Regenerate.
809 * iq2000-desc.c: Regenerate.
810 * iq2000-desc.h: Regenerate.
811 * iq2000-opc.c: Regenerate.
812 * iq2000-opc.h: Regenerate.
813 * m32r-desc.c: Regenerate.
814 * m32r-desc.h: Regenerate.
815 * m32r-opc.c: Regenerate.
816 * m32r-opc.h: Regenerate.
817 * m32r-opinst.c: Regenerate.
818 * openrisc-desc.c: Regenerate.
819 * openrisc-desc.h: Regenerate.
820 * openrisc-opc.c: Regenerate.
821 * openrisc-opc.h: Regenerate.
822 * xstormy16-desc.c: Regenerate.
823 * xstormy16-desc.h: Regenerate.
824 * xstormy16-opc.c: Regenerate.
825 * xstormy16-opc.h: Regenerate.
827 2005-02-21 Alan Modra <amodra@bigpond.net.au>
829 * Makefile.am: Run "make dep-am"
830 * Makefile.in: Regenerate.
832 2005-02-15 Nick Clifton <nickc@redhat.com>
834 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
835 compile time warnings.
836 (print_keyword): Likewise.
837 (default_print_insn): Likewise.
839 * fr30-desc.c: Regenerated.
840 * fr30-desc.h: Regenerated.
841 * fr30-dis.c: Regenerated.
842 * fr30-opc.c: Regenerated.
843 * fr30-opc.h: Regenerated.
844 * frv-desc.c: Regenerated.
845 * frv-dis.c: Regenerated.
846 * frv-opc.c: Regenerated.
847 * ip2k-asm.c: Regenerated.
848 * ip2k-desc.c: Regenerated.
849 * ip2k-desc.h: Regenerated.
850 * ip2k-dis.c: Regenerated.
851 * ip2k-opc.c: Regenerated.
852 * ip2k-opc.h: Regenerated.
853 * iq2000-desc.c: Regenerated.
854 * iq2000-dis.c: Regenerated.
855 * iq2000-opc.c: Regenerated.
856 * m32r-asm.c: Regenerated.
857 * m32r-desc.c: Regenerated.
858 * m32r-desc.h: Regenerated.
859 * m32r-dis.c: Regenerated.
860 * m32r-opc.c: Regenerated.
861 * m32r-opc.h: Regenerated.
862 * m32r-opinst.c: Regenerated.
863 * openrisc-desc.c: Regenerated.
864 * openrisc-desc.h: Regenerated.
865 * openrisc-dis.c: Regenerated.
866 * openrisc-opc.c: Regenerated.
867 * openrisc-opc.h: Regenerated.
868 * xstormy16-desc.c: Regenerated.
869 * xstormy16-desc.h: Regenerated.
870 * xstormy16-dis.c: Regenerated.
871 * xstormy16-opc.c: Regenerated.
872 * xstormy16-opc.h: Regenerated.
874 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
876 * dis-buf.c (perror_memory): Use sprintf_vma to print out
879 2005-02-11 Nick Clifton <nickc@redhat.com>
881 * iq2000-asm.c: Regenerate.
883 * frv-dis.c: Regenerate.
885 2005-02-07 Jim Blandy <jimb@redhat.com>
887 * Makefile.am (CGEN): Load guile.scm before calling the main
889 * Makefile.in: Regenerated.
890 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
891 Simply pass the cgen-opc.scm path to ${cgen} as its first
892 argument; ${cgen} itself now contains the '-s', or whatever is
893 appropriate for the Scheme being used.
895 2005-01-31 Andrew Cagney <cagney@gnu.org>
897 * configure: Regenerate to track ../gettext.m4.
899 2005-01-31 Jan Beulich <jbeulich@novell.com>
901 * ia64-gen.c (NELEMS): Define.
902 (shrink): Generate alias with missing second predicate register when
903 opcode has two outputs and these are both predicates.
904 * ia64-opc-i.c (FULL17): Define.
905 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
906 here to generate output template.
907 (TBITCM, TNATCM): Undefine after use.
908 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
909 first input. Add ld16 aliases without ar.csd as second output. Add
910 st16 aliases without ar.csd as second input. Add cmpxchg aliases
911 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
912 ar.ccv as third/fourth inputs. Consolidate through...
913 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
914 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
915 * ia64-asmtab.c: Regenerate.
917 2005-01-27 Andrew Cagney <cagney@gnu.org>
919 * configure: Regenerate to track ../gettext.m4 change.
921 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
923 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
924 * frv-asm.c: Rebuilt.
925 * frv-desc.c: Rebuilt.
926 * frv-desc.h: Rebuilt.
927 * frv-dis.c: Rebuilt.
928 * frv-ibld.c: Rebuilt.
929 * frv-opc.c: Rebuilt.
930 * frv-opc.h: Rebuilt.
932 2005-01-24 Andrew Cagney <cagney@gnu.org>
934 * configure: Regenerate, ../gettext.m4 was updated.
936 2005-01-21 Fred Fish <fnf@specifixinc.com>
938 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
939 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
940 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
943 2005-01-20 Alan Modra <amodra@bigpond.net.au>
945 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
947 2005-01-19 Fred Fish <fnf@specifixinc.com>
949 * mips-dis.c (no_aliases): New disassembly option flag.
950 (set_default_mips_dis_options): Init no_aliases to zero.
951 (parse_mips_dis_option): Handle no-aliases option.
952 (print_insn_mips): Ignore table entries that are aliases
953 if no_aliases is set.
954 (print_insn_mips16): Ditto.
955 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
956 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
957 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
958 * mips16-opc.c (mips16_opcodes): Ditto.
960 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
962 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
963 (inheritance diagram): Add missing edge.
964 (arch_sh1_up): Rename arch_sh_up to match external name to make life
965 easier for the testsuite.
966 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
967 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
968 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
969 arch_sh2a_or_sh4_up child.
970 (sh_table): Do renaming as above.
971 Correct comment for ldc.l for gas testsuite to read.
972 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
973 Correct comments for movy.w and movy.l for gas testsuite to read.
974 Correct comments for fmov.d and fmov.s for gas testsuite to read.
976 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
978 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
980 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
982 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
984 2005-01-10 Andreas Schwab <schwab@suse.de>
986 * disassemble.c (disassemble_init_for_target) <case
987 bfd_arch_ia64>: Set skip_zeroes to 16.
988 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
990 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
992 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
994 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
996 * avr-dis.c: Prettyprint. Added printing of symbol names in all
997 memory references. Convert avr_operand() to C90 formatting.
999 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1001 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1003 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1005 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1006 (no_op_insn): Initialize array with instructions that have no
1008 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1010 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1012 * arm-dis.c: Correct top-level comment.
1014 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1016 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1017 architecuture defining the insn.
1018 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1019 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1021 Also include opcode/arm.h.
1022 * Makefile.am (arm-dis.lo): Update dependency list.
1023 * Makefile.in: Regenerate.
1025 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1027 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1028 reflect the change to the short immediate syntax.
1030 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1032 * or32-opc.c (debug): Warning fix.
1033 * po/POTFILES.in: Regenerate.
1035 * maxq-dis.c: Formatting.
1036 (print_insn): Warning fix.
1038 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1040 * arm-dis.c (WORD_ADDRESS): Define.
1041 (print_insn): Use it. Correct big-endian end-of-section handling.
1043 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1044 Vineet Sharma <vineets@noida.hcltech.com>
1046 * maxq-dis.c: New file.
1047 * disassemble.c (ARCH_maxq): Define.
1048 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1050 * configure.in: Add case for bfd_maxq_arch.
1051 * configure: Regenerate.
1052 * Makefile.am: Add support for maxq-dis.c
1053 * Makefile.in: Regenerate.
1054 * aclocal.m4: Regenerate.
1056 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1058 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1060 * crx-dis.c: Likewise.
1062 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1064 Generally, handle CRISv32.
1065 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1066 (struct cris_disasm_data): New type.
1067 (format_reg, format_hex, cris_constraint, print_flags)
1068 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1070 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1071 (print_insn_crisv32_without_register_prefix)
1072 (print_insn_crisv10_v32_with_register_prefix)
1073 (print_insn_crisv10_v32_without_register_prefix)
1074 (cris_parse_disassembler_options): New functions.
1075 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1076 parameter. All callers changed.
1077 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1079 (cris_constraint) <case 'Y', 'U'>: New cases.
1080 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1082 (print_with_operands) <case 'Y'>: New case.
1083 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1084 <case 'N', 'Y', 'Q'>: New cases.
1085 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1086 (print_insn_cris_with_register_prefix)
1087 (print_insn_cris_without_register_prefix): Call
1088 cris_parse_disassembler_options.
1089 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1090 for CRISv32 and the size of immediate operands. New v32-only
1091 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1092 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1093 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1094 Change brp to be v3..v10.
1095 (cris_support_regs): New vector.
1096 (cris_opcodes): Update head comment. New format characters '[',
1097 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1098 Add new opcodes for v32 and adjust existing opcodes to accommodate
1099 differences to earlier variants.
1100 (cris_cond15s): New vector.
1102 2004-11-04 Jan Beulich <jbeulich@novell.com>
1104 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1106 (Mp): Use f_mode rather than none at all.
1107 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1108 replaces what previously was x_mode; x_mode now means 128-bit SSE
1110 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1111 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1112 pinsrw's second operand is Edqw.
1113 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1114 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1115 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1116 mode when an operand size override is present or always suffixing.
1117 More instructions will need to be added to this group.
1118 (putop): Handle new macro chars 'C' (short/long suffix selector),
1119 'I' (Intel mode override for following macro char), and 'J' (for
1120 adding the 'l' prefix to far branches in AT&T mode). When an
1121 alternative was specified in the template, honor macro character when
1122 specified for Intel mode.
1123 (OP_E): Handle new *_mode values. Correct pointer specifications for
1124 memory operands. Consolidate output of index register.
1125 (OP_G): Handle new *_mode values.
1126 (OP_I): Handle const_1_mode.
1127 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1128 respective opcode prefix bits have been consumed.
1129 (OP_EM, OP_EX): Provide some default handling for generating pointer
1132 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1134 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1137 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1139 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1140 (getregliststring): Support HI/LO and user registers.
1141 * crx-opc.c (crx_instruction): Update data structure according to the
1142 rearrangement done in CRX opcode header file.
1143 (crx_regtab): Likewise.
1144 (crx_optab): Likewise.
1145 (crx_instruction): Reorder load/stor instructions, remove unsupported
1147 support new Co-Processor instruction 'cpi'.
1149 2004-10-27 Nick Clifton <nickc@redhat.com>
1151 * opcodes/iq2000-asm.c: Regenerate.
1152 * opcodes/iq2000-desc.c: Regenerate.
1153 * opcodes/iq2000-desc.h: Regenerate.
1154 * opcodes/iq2000-dis.c: Regenerate.
1155 * opcodes/iq2000-ibld.c: Regenerate.
1156 * opcodes/iq2000-opc.c: Regenerate.
1157 * opcodes/iq2000-opc.h: Regenerate.
1159 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1161 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1162 us4, us5 (respectively).
1163 Remove unsupported 'popa' instruction.
1164 Reverse operands order in store co-processor instructions.
1166 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1168 * Makefile.am: Run "make dep-am"
1169 * Makefile.in: Regenerate.
1171 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1173 * xtensa-dis.c: Use ISO C90 formatting.
1175 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1177 * ppc-opc.c: Revert 2004-09-09 change.
1179 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1181 * xtensa-dis.c (state_names): Delete.
1182 (fetch_data): Use xtensa_isa_maxlength.
1183 (print_xtensa_operand): Replace operand parameter with opcode/operand
1184 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1185 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1186 instruction bundles. Use xmalloc instead of malloc.
1188 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1190 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1193 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1195 * crx-opc.c (crx_instruction): Support Co-processor insns.
1196 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1197 (getregliststring): Change function to use the above enum.
1198 (print_arg): Handle CO-Processor insns.
1199 (crx_cinvs): Add 'b' option to invalidate the branch-target
1202 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1204 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1205 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1206 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1207 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1208 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1210 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1212 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1215 2004-09-30 Paul Brook <paul@codesourcery.com>
1217 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1218 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1220 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1222 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1223 (CONFIG_STATUS_DEPENDENCIES): New.
1224 (Makefile): Removed.
1225 (config.status): Likewise.
1226 * Makefile.in: Regenerated.
1228 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1230 * Makefile.am: Run "make dep-am".
1231 * Makefile.in: Regenerate.
1232 * aclocal.m4: Regenerate.
1233 * configure: Regenerate.
1234 * po/POTFILES.in: Regenerate.
1235 * po/opcodes.pot: Regenerate.
1237 2004-09-11 Andreas Schwab <schwab@suse.de>
1239 * configure: Rebuild.
1241 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1243 * ppc-opc.c (L): Make this field not optional.
1245 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1247 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1248 Fix parameter to 'm[t|f]csr' insns.
1250 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1252 * configure.in: Autoupdate to autoconf 2.59.
1253 * aclocal.m4: Rebuild with aclocal 1.4p6.
1254 * configure: Rebuild with autoconf 2.59.
1255 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1256 bfd changes for autoconf 2.59 on the way).
1257 * config.in: Rebuild with autoheader 2.59.
1259 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1261 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1263 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1265 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1266 (GRPPADLCK2): New define.
1267 (twobyte_has_modrm): True for 0xA6.
1268 (grps): GRPPADLCK2 for opcode 0xA6.
1270 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1272 Introduce SH2a support.
1273 * sh-opc.h (arch_sh2a_base): Renumber.
1274 (arch_sh2a_nofpu_base): Remove.
1275 (arch_sh_base_mask): Adjust.
1276 (arch_opann_mask): New.
1277 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1278 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1279 (sh_table): Adjust whitespace.
1280 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1281 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1282 instruction list throughout.
1283 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1284 of arch_sh2a in instruction list throughout.
1285 (arch_sh2e_up): Accomodate above changes.
1286 (arch_sh2_up): Ditto.
1287 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1288 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1289 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1290 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1291 * sh-opc.h (arch_sh2a_nofpu): New.
1292 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1293 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1295 2004-01-20 DJ Delorie <dj@redhat.com>
1296 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1297 2003-12-29 DJ Delorie <dj@redhat.com>
1298 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1299 sh_opcode_info, sh_table): Add sh2a support.
1300 (arch_op32): New, to tag 32-bit opcodes.
1301 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1302 2003-12-02 Michael Snyder <msnyder@redhat.com>
1303 * sh-opc.h (arch_sh2a): Add.
1304 * sh-dis.c (arch_sh2a): Handle.
1305 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1307 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1309 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1311 2004-07-22 Nick Clifton <nickc@redhat.com>
1314 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1315 insns - this is done by objdump itself.
1316 * h8500-dis.c (print_insn_h8500): Likewise.
1318 2004-07-21 Jan Beulich <jbeulich@novell.com>
1320 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1321 regardless of address size prefix in effect.
1322 (ptr_reg): Size or address registers does not depend on rex64, but
1323 on the presence of an address size override.
1324 (OP_MMX): Use rex.x only for xmm registers.
1325 (OP_EM): Use rex.z only for xmm registers.
1327 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1329 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1330 move/branch operations to the bottom so that VR5400 multimedia
1331 instructions take precedence in disassembly.
1333 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1335 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1336 ISA-specific "break" encoding.
1338 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1340 * arm-opc.h: Fix typo in comment.
1342 2004-07-11 Andreas Schwab <schwab@suse.de>
1344 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1346 2004-07-09 Andreas Schwab <schwab@suse.de>
1348 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1350 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1352 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1353 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1354 (crx-dis.lo): New target.
1355 (crx-opc.lo): Likewise.
1356 * Makefile.in: Regenerate.
1357 * configure.in: Handle bfd_crx_arch.
1358 * configure: Regenerate.
1359 * crx-dis.c: New file.
1360 * crx-opc.c: New file.
1361 * disassemble.c (ARCH_crx): Define.
1362 (disassembler): Handle ARCH_crx.
1364 2004-06-29 James E Wilson <wilson@specifixinc.com>
1366 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1367 * ia64-asmtab.c: Regnerate.
1369 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1371 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1372 (extract_fxm): Don't test dialect.
1373 (XFXFXM_MASK): Include the power4 bit.
1374 (XFXM): Add p4 param.
1375 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1377 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1379 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1380 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1382 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1384 * ppc-opc.c (BH, XLBH_MASK): Define.
1385 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1387 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1389 * i386-dis.c (x_mode): Comment.
1390 (two_source_ops): File scope.
1391 (float_mem): Correct fisttpll and fistpll.
1392 (float_mem_mode): New table.
1394 (OP_E): Correct intel mode PTR output.
1395 (ptr_reg): Use open_char and close_char.
1396 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1397 operands. Set two_source_ops.
1399 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1401 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1402 instead of _raw_size.
1404 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1406 * ia64-gen.c (in_iclass): Handle more postinc st
1408 * ia64-asmtab.c: Rebuilt.
1410 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1412 * s390-opc.txt: Correct architecture mask for some opcodes.
1413 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1414 in the esa mode as well.
1416 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1418 * sh-dis.c (target_arch): Make unsigned.
1419 (print_insn_sh): Replace (most of) switch with a call to
1420 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1421 * sh-opc.h: Redefine architecture flags values.
1422 Add sh3-nommu architecture.
1423 Reorganise <arch>_up macros so they make more visual sense.
1424 (SH_MERGE_ARCH_SET): Define new macro.
1425 (SH_VALID_BASE_ARCH_SET): Likewise.
1426 (SH_VALID_MMU_ARCH_SET): Likewise.
1427 (SH_VALID_CO_ARCH_SET): Likewise.
1428 (SH_VALID_ARCH_SET): Likewise.
1429 (SH_MERGE_ARCH_SET_VALID): Likewise.
1430 (SH_ARCH_SET_HAS_FPU): Likewise.
1431 (SH_ARCH_SET_HAS_DSP): Likewise.
1432 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1433 (sh_get_arch_from_bfd_mach): Add prototype.
1434 (sh_get_arch_up_from_bfd_mach): Likewise.
1435 (sh_get_bfd_mach_from_arch_set): Likewise.
1436 (sh_merge_bfd_arc): Likewise.
1438 2004-05-24 Peter Barada <peter@the-baradas.com>
1440 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1441 into new match_insn_m68k function. Loop over canidate
1442 matches and select first that completely matches.
1443 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1444 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1445 to verify addressing for MAC/EMAC.
1446 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1447 reigster halves since 'fpu' and 'spl' look misleading.
1448 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1449 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1450 first, tighten up match masks.
1451 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1452 'size' from special case code in print_insn_m68k to
1453 determine decode size of insns.
1455 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1457 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1458 well as when -mpower4.
1460 2004-05-13 Nick Clifton <nickc@redhat.com>
1462 * po/fr.po: Updated French translation.
1464 2004-05-05 Peter Barada <peter@the-baradas.com>
1466 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1467 variants in arch_mask. Only set m68881/68851 for 68k chips.
1468 * m68k-op.c: Switch from ColdFire chips to core variants.
1470 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1473 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1475 2004-04-29 Ben Elliston <bje@au.ibm.com>
1477 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1478 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1480 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1482 * sh-dis.c (print_insn_sh): Print the value in constant pool
1483 as a symbol if it looks like a symbol.
1485 2004-04-22 Peter Barada <peter@the-baradas.com>
1487 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1488 appropriate ColdFire architectures.
1489 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1491 Add EMAC instructions, fix MAC instructions. Remove
1492 macmw/macml/msacmw/msacml instructions since mask addressing now
1495 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1497 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1498 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1499 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1500 macro. Adjust all users.
1502 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1504 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1507 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1509 * m32r-asm.c: Regenerate.
1511 2004-03-29 Stan Shebs <shebs@apple.com>
1513 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1516 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1518 * aclocal.m4: Regenerate.
1519 * config.in: Regenerate.
1520 * configure: Regenerate.
1521 * po/POTFILES.in: Regenerate.
1522 * po/opcodes.pot: Regenerate.
1524 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1526 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1528 * ppc-opc.c (RA0): Define.
1529 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1530 (RAOPT): Rename from RAO. Update all uses.
1531 (powerpc_opcodes): Use RA0 as appropriate.
1533 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1535 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1537 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1539 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1541 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1543 * i386-dis.c (GRPPLOCK): Delete.
1544 (grps): Delete GRPPLOCK entry.
1546 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1548 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1550 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1551 (GRPPADLCK): Define.
1552 (dis386): Use NOP_Fixup on "nop".
1553 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1554 (twobyte_has_modrm): Set for 0xa7.
1555 (padlock_table): Delete. Move to..
1556 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1558 (print_insn): Revert PADLOCK_SPECIAL code.
1559 (OP_E): Delete sfence, lfence, mfence checks.
1561 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1563 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1564 (INVLPG_Fixup): New function.
1565 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1567 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1569 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1570 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1571 (padlock_table): New struct with PadLock instructions.
1572 (print_insn): Handle PADLOCK_SPECIAL.
1574 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1576 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1577 (OP_E): Twiddle clflush to sfence here.
1579 2004-03-08 Nick Clifton <nickc@redhat.com>
1581 * po/de.po: Updated German translation.
1583 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1585 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1586 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1587 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1590 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1592 * frv-asm.c: Regenerate.
1593 * frv-desc.c: Regenerate.
1594 * frv-desc.h: Regenerate.
1595 * frv-dis.c: Regenerate.
1596 * frv-ibld.c: Regenerate.
1597 * frv-opc.c: Regenerate.
1598 * frv-opc.h: Regenerate.
1600 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1602 * frv-desc.c, frv-opc.c: Regenerate.
1604 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1606 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1608 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1610 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1611 Also correct mistake in the comment.
1613 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1615 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1616 ensure that double registers have even numbers.
1617 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1618 that reserved instruction 0xfffd does not decode the same
1620 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1621 REG_N refers to a double register.
1622 Add REG_N_B01 nibble type and use it instead of REG_NM
1624 Adjust the bit patterns in a few comments.
1626 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1628 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1630 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1632 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1634 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1636 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1638 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1640 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1641 mtivor32, mtivor33, mtivor34.
1643 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1645 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1647 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1649 * arm-opc.h Maverick accumulator register opcode fixes.
1651 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1653 * m32r-dis.c: Regenerate.
1655 2004-01-27 Michael Snyder <msnyder@redhat.com>
1657 * sh-opc.h (sh_table): "fsrra", not "fssra".
1659 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1661 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1664 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1666 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1668 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1670 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1671 1. Don't print scale factor on AT&T mode when index missing.
1673 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1675 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1676 when loaded into XR registers.
1678 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1680 * frv-desc.h: Regenerate.
1681 * frv-desc.c: Regenerate.
1682 * frv-opc.c: Regenerate.
1684 2004-01-13 Michael Snyder <msnyder@redhat.com>
1686 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1688 2004-01-09 Paul Brook <paul@codesourcery.com>
1690 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1693 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1695 * Makefile.am (libopcodes_la_DEPENDENCIES)
1696 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1697 comment about the problem.
1698 * Makefile.in: Regenerate.
1700 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1702 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1703 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1704 cut&paste errors in shifting/truncating numerical operands.
1705 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1706 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1707 (parse_uslo16): Likewise.
1708 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1709 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1710 (parse_s12): Likewise.
1711 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1712 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1713 (parse_uslo16): Likewise.
1714 (parse_uhi16): Parse gothi and gotfuncdeschi.
1715 (parse_d12): Parse got12 and gotfuncdesc12.
1716 (parse_s12): Likewise.
1718 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1720 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1721 instruction which looks similar to an 'rla' instruction.
1723 For older changes see ChangeLog-0203
1729 version-control: never