opcodes/ChangeLog

   1 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
   2
   3         * tic54x-dis.c (sprint_mmr): Adjust.
   4         * tic54x-opc.c: Likewise.
   5
   6 2016-05-19  Alan Modra  <amodra@gmail.com>
   7
   8         * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
   9
  10 2016-05-19  Alan Modra  <amodra@gmail.com>
  11
  12         * ppc-opc.c: Formatting.
  13         (NSISIGNOPT): Define.
  14         (powerpc_opcodes <subis>): Use NSISIGNOPT.
  15
  16 2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
  17
  18         * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
  19         replacing references to `micromips_ase' throughout.
  20         (_print_insn_mips): Don't use file-level microMIPS annotation to
  21         determine the disassembly mode with the symbol table.
  22
  23 2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
  24
  25         * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
  26
  27 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
  28
  29         * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
  30         mips64r6.
  31         * mips-opc.c (D34): New macro.
  32         (mips_builtin_opcodes): Define bposge32c for DSPr3.
  33
  34 2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
  35
  36         * i386-dis.c (prefix_table): Add RDPID instruction.
  37         * i386-gen.c (cpu_flag_init): Add RDPID flag.
  38         (cpu_flags): Add RDPID bitfield.
  39         * i386-opc.h (enum): Add RDPID element.
  40         (i386_cpu_flags): Add RDPID field.
  41         * i386-opc.tbl: Add RDPID instruction.
  42         * i386-init.h: Regenerate.
  43         * i386-tbl.h: Regenerate.
  44
  45 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  46
  47         * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
  48         branch type of a symbol.
  49         (print_insn): Likewise.
  50
  51 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  52
  53         * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
  54         Mainline Security Extensions instructions.
  55         (thumb_opcodes): Add entries for narrow ARMv8-M Security
  56         Extensions instructions.
  57         (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
  58         instructions.
  59         (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
  60         special registers.
  61
  62 2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
  63
  64         * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
  65
  66 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
  67
  68         * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
  69         (arcExtMap_genOpcode): Likewise.
  70         * arc-opc.c (arg_32bit_rc): Define new variable.
  71         (arg_32bit_u6): Likewise.
  72         (arg_32bit_limm): Likewise.
  73
  74 2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  75
  76         * aarch64-gen.c (VERIFIER): Define.
  77         * aarch64-opc.c (VERIFIER): Define.
  78         (verify_ldpsw): Use static linkage.
  79         * aarch64-opc.h (verify_ldpsw): Remove.
  80         * aarch64-tbl.h: Use VERIFIER for verifiers.
  81
  82 2016-04-28  Nick Clifton  <nickc@redhat.com>
  83
  84         PR target/19722
  85         * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
  86         * aarch64-opc.c (verify_ldpsw): New function.
  87         * aarch64-opc.h (verify_ldpsw): New prototype.
  88         * aarch64-tbl.h: Add initialiser for verifier field.
  89         (LDPSW): Set verifier to verify_ldpsw.
  90
  91 2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
  92
  93         PR binutils/19983
  94         PR binutils/19984
  95         * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
  96         smaller than address size.
  97
  98 2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  99
 100         * alpha-dis.c: Regenerate.
 101         * crx-dis.c: Likewise.
 102         * disassemble.c: Likewise.
 103         * epiphany-opc.c: Likewise.
 104         * fr30-opc.c: Likewise.
 105         * frv-opc.c: Likewise.
 106         * ip2k-opc.c: Likewise.
 107         * iq2000-opc.c: Likewise.
 108         * lm32-opc.c: Likewise.
 109         * lm32-opinst.c: Likewise.
 110         * m32c-opc.c: Likewise.
 111         * m32r-opc.c: Likewise.
 112         * m32r-opinst.c: Likewise.
 113         * mep-opc.c: Likewise.
 114         * mt-opc.c: Likewise.
 115         * or1k-opc.c: Likewise.
 116         * or1k-opinst.c: Likewise.
 117         * tic80-opc.c: Likewise.
 118         * xc16x-opc.c: Likewise.
 119         * xstormy16-opc.c: Likewise.
 120
 121 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 122
 123         * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
 124         fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
 125         calcsd, and calcxd instructions.
 126         * arc-opc.c (insert_nps_bitop_size): Delete.
 127         (extract_nps_bitop_size): Delete.
 128         (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
 129         (extract_nps_qcmp_m3): Define.
 130         (extract_nps_qcmp_m2): Define.
 131         (extract_nps_qcmp_m1): Define.
 132         (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
 133         (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
 134         (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
 135         NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
 136         NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
 137         NPS_QCMP_M3.
 138
 139 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 140
 141         * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
 142
 143 2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 144
 145         * Makefile.in: Regenerated with automake 1.11.6.
 146         * aclocal.m4: Likewise.
 147
 148 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 149
 150         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
 151         instructions.
 152         * arc-opc.c (insert_nps_cmem_uimm16): New function.
 153         (extract_nps_cmem_uimm16): New function.
 154         (arc_operands): Add NPS_XLDST_UIMM16 operand.
 155
 156 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 157
 158         * arc-dis.c (arc_insn_length): New function.
 159         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
 160         (find_format): Change insnLen parameter to unsigned.
 161
 162 2016-04-13  Nick Clifton  <nickc@redhat.com>
 163
 164         PR target/19937
 165         * v850-opc.c (v850_opcodes): Correct masks for long versions of
 166         the LD.B and LD.BU instructions.
 167
 168 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 169
 170         * arc-dis.c (find_format): Check for extension flags.
 171         (print_flags): New function.
 172         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
 173         .extAuxRegister.
 174         * arc-ext.c (arcExtMap_coreRegName): Use
 175         LAST_EXTENSION_CORE_REGISTER.
 176         (arcExtMap_coreReadWrite): Likewise.
 177         (dump_ARC_extmap): Update printing.
 178         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
 179         (arc_aux_regs): Add cpu field.
 180         * arc-regs.h: Add cpu field, lower case name aux registers.
 181
 182 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 183
 184         * arc-tbl.h: Add rtsc, sleep with no arguments.
 185
 186 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 187
 188         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
 189         Initialize.
 190         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 191         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 192         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 193         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 194         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 195         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 196         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 197         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 198         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 199         (arc_opcode arc_opcodes): Null terminate the array.
 200         (arc_num_opcodes): Remove.
 201         * arc-ext.h (INSERT_XOP): Define.
 202         (extInstruction_t): Likewise.
 203         (arcExtMap_instName): Delete.
 204         (arcExtMap_insn): New function.
 205         (arcExtMap_genOpcode): Likewise.
 206         * arc-ext.c (ExtInstruction): Remove.
 207         (create_map): Zero initialize instruction fields.
 208         (arcExtMap_instName): Remove.
 209         (arcExtMap_insn): New function.
 210         (dump_ARC_extmap): More info while debuging.
 211         (arcExtMap_genOpcode): New function.
 212         * arc-dis.c (find_format): New function.
 213         (print_insn_arc): Use find_format.
 214         (arc_get_disassembler): Enable dump_ARC_extmap only when
 215         debugging.
 216
 217 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
 218
 219         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
 220         instruction bits out.
 221
 222 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 223
 224         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
 225         * arc-opc.c (arc_flag_operands): Add new flags.
 226         (arc_flag_classes): Add new classes.
 227
 228 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 229
 230         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
 231
 232 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
 233
 234         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
 235         encode1, rflt, crc16, and crc32 instructions.
 236         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
 237         (arc_flag_classes): Add C_NPS_R.
 238         (insert_nps_bitop_size_2b): New function.
 239         (extract_nps_bitop_size_2b): Likewise.
 240         (insert_nps_bitop_uimm8): Likewise.
 241         (extract_nps_bitop_uimm8): Likewise.
 242         (arc_operands): Add new operand entries.
 243
 244 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 245
 246         * arc-regs.h: Add a new subclass field.  Add double assist
 247         accumulator register values.
 248         * arc-tbl.h: Use DPA subclass to mark the double assist
 249         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 250         * arc-opc.c (RSP): Define instead of SP.
 251         (arc_aux_regs): Add the subclass field.
 252
 253 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 254
 255         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 256
 257 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 258
 259         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 260         NPS_R_SRC1.
 261
 262 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 263
 264         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 265         issues.  No functional changes.
 266
 267 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 268
 269         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 270         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 271         (RTT): Remove duplicate.
 272         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 273         (PCT_CONFIG*): Remove.
 274         (D1L, D1H, D2H, D2L): Define.
 275
 276 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 277
 278         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 279
 280 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 281
 282         * arc-tbl.h (invld07): Remove.
 283         * arc-ext-tbl.h: New file.
 284         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 285         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 286
 287 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 288
 289         Fix -Wstack-usage warnings.
 290         * aarch64-dis.c (print_operands): Substitute size.
 291         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 292
 293 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 294
 295         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 296         to get a proper diagnostic when an invalid ASR register is used.
 297
 298 2016-03-22  Nick Clifton  <nickc@redhat.com>
 299
 300         * configure: Regenerate.
 301
 302 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 303
 304         * arc-nps400-tbl.h: New file.
 305         * arc-opc.c: Add top level comment.
 306         (insert_nps_3bit_dst): New function.
 307         (extract_nps_3bit_dst): New function.
 308         (insert_nps_3bit_src2): New function.
 309         (extract_nps_3bit_src2): New function.
 310         (insert_nps_bitop_size): New function.
 311         (extract_nps_bitop_size): New function.
 312         (arc_flag_operands): Add nps400 entries.
 313         (arc_flag_classes): Add nps400 entries.
 314         (arc_operands): Add nps400 entries.
 315         (arc_opcodes): Add nps400 include.
 316
 317 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 318
 319         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 320         the new class enum values.
 321
 322 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 323
 324         * arc-dis.c (print_insn_arc): Handle nps400.
 325
 326 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 327
 328         * arc-opc.c (BASE): Delete.
 329
 330 2016-03-18  Nick Clifton  <nickc@redhat.com>
 331
 332         PR target/19721
 333         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 334         of MOV insn that aliases an ORR insn.
 335
 336 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 337
 338         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 339
 340 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 341
 342         * mcore-opc.h: Add const qualifiers.
 343         * microblaze-opc.h (struct op_code_struct): Likewise.
 344         * sh-opc.h: Likewise.
 345         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 346         (tic4x_print_op): Likewise.
 347
 348 2016-03-02  Alan Modra  <amodra@gmail.com>
 349
 350         * or1k-desc.h: Regenerate.
 351         * fr30-ibld.c: Regenerate.
 352         * rl78-decode.c: Regenerate.
 353
 354 2016-03-01  Nick Clifton  <nickc@redhat.com>
 355
 356         PR target/19747
 357         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 358
 359 2016-02-24  Renlin Li  <renlin.li@arm.com>
 360
 361         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 362         (print_insn_coprocessor): Support fp16 instructions.
 363
 364 2016-02-24  Renlin Li  <renlin.li@arm.com>
 365
 366         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 367         vminnm, vrint(mpna).
 368
 369 2016-02-24  Renlin Li  <renlin.li@arm.com>
 370
 371         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 372         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 373
 374 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 375
 376         * i386-dis.c (print_insn): Parenthesize expression to prevent
 377         truncated addresses.
 378         (OP_J): Likewise.
 379
 380 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 381             Janek van Oirschot  <jvanoirs@synopsys.com>
 382
 383         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 384         variable.
 385
 386 2016-02-04  Nick Clifton  <nickc@redhat.com>
 387
 388         PR target/19561
 389         * msp430-dis.c (print_insn_msp430): Add a special case for
 390         decoding an RRC instruction with the ZC bit set in the extension
 391         word.
 392
 393 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 394
 395         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 396         * epiphany-ibld.c: Regenerate.
 397         * fr30-ibld.c: Regenerate.
 398         * frv-ibld.c: Regenerate.
 399         * ip2k-ibld.c: Regenerate.
 400         * iq2000-ibld.c: Regenerate.
 401         * lm32-ibld.c: Regenerate.
 402         * m32c-ibld.c: Regenerate.
 403         * m32r-ibld.c: Regenerate.
 404         * mep-ibld.c: Regenerate.
 405         * mt-ibld.c: Regenerate.
 406         * or1k-ibld.c: Regenerate.
 407         * xc16x-ibld.c: Regenerate.
 408         * xstormy16-ibld.c: Regenerate.
 409
 410 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 411
 412         * epiphany-dis.c: Regenerated from latest cpu files.
 413
 414 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 415
 416         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 417         test bit.
 418
 419 2016-01-25  Renlin Li  <renlin.li@arm.com>
 420
 421         * arm-dis.c (mapping_symbol_for_insn): New function.
 422         (find_ifthen_state): Call mapping_symbol_for_insn().
 423
 424 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 425
 426         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 427         of MSR UAO immediate operand.
 428
 429 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 430
 431         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 432         instruction support.
 433
 434 2016-01-17  Alan Modra  <amodra@gmail.com>
 435
 436         * configure: Regenerate.
 437
 438 2016-01-14  Nick Clifton  <nickc@redhat.com>
 439
 440         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 441         instructions that can support stack pointer operations.
 442         * rl78-decode.c: Regenerate.
 443         * rl78-dis.c: Fix display of stack pointer in MOVW based
 444         instructions.
 445
 446 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 447
 448         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 449         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 450         erxtatus_el1 and erxaddr_el1.
 451
 452 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 453
 454         * arm-dis.c (arm_opcodes): Add "esb".
 455         (thumb_opcodes): Likewise.
 456
 457 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 458
 459         * ppc-opc.c <xscmpnedp>: Delete.
 460         <xvcmpnedp>: Likewise.
 461         <xvcmpnedp.>: Likewise.
 462         <xvcmpnesp>: Likewise.
 463         <xvcmpnesp.>: Likewise.
 464
 465 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 466
 467         PR gas/13050
 468         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 469         addition to ISA_A.
 470
 471 2016-01-01  Alan Modra  <amodra@gmail.com>
 472
 473         Update year range in copyright notice of all files.
 474
 475 For older changes see ChangeLog-2015
 476 \f
 477 Copyright (C) 2016 Free Software Foundation, Inc.
 478
 479 Copying and distribution of this file, with or without modification,
 480 are permitted in any medium without royalty provided the copyright
 481 notice and this notice are preserved.
 482
 483 Local Variables:
 484 mode: change-log
 485 left-margin: 8
 486 fill-column: 74
 487 version-control: never
 488 End: