opcodes/ChangeLog

   1 2008-07-30  Michael J. Eager  <eager@eagercon.com>
   2
   3         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
   4         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
   5         (insert_sprg, PPC405): Use PPC_OPCODE_405.
   6         (powerpc_opcodes): Add Xilinx APU related opcodes.
   7
   8 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
   9
  10         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
  11
  12 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
  13
  14         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
  15
  16 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
  17
  18         * mips-opc.c (CP): New macro.
  19         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
  20         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
  21         dmtc2 Octeon instructions.
  22
  23 2008-07-07  Stan Shebs  <stan@codesourcery.com>
  24
  25         * dis-init.c (init_disassemble_info): Init endian_code field.
  26         * arm-dis.c (print_insn): Disassemble code according to
  27         setting of endian_code.
  28         (print_insn_big_arm): Detect when BE8 extension flag has been set.
  29
  30 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
  31
  32         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
  33         for ELF symbols.
  34
  35 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
  36
  37         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
  38         (print_ppc_disassembler_options): Likewise.
  39         * ppc-opc.c (PPC464): Define.
  40         (powerpc_opcodes): Add mfdcrux and mtdcrux.
  41
  42 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  43
  44         * configure: Regenerate.
  45
  46 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
  47
  48         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
  49         ppc_cpu_t typedef.
  50         (struct dis_private): New.
  51         (POWERPC_DIALECT): New define.
  52         (powerpc_dialect): Renamed to...
  53         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
  54         struct dis_private.
  55         (print_insn_big_powerpc): Update for using structure in
  56         info->private_data.
  57         (print_insn_little_powerpc): Likewise.
  58         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
  59         (skip_optional_operands): Likewise.
  60         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
  61         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
  62         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
  63         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
  64         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
  65         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
  66         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
  67         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
  68         param to be of type ppc_cpu_t.  Update prototype.
  69
  70 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
  71
  72         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
  73         +s, +S.
  74         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
  75         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
  76         syncw, syncws, vm3mulu, vm0 and vmulu.
  77
  78         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
  79         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
  80         seqi, sne and snei.
  81
  82 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
  83
  84         * i386-opc.tbl: Add vmovd with 64bit operand.
  85         * i386-tbl.h: Regenerated.
  86
  87 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  88
  89         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
  90
  91 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
  92
  93         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
  94         * i386-tbl.h: Regenerated.
  95
  96 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         PR gas/6517
  99         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 100         into 32bit and 64bit.  Remove Reg64|Qword and add
 101         IgnoreSize|No_qSuf on 32bit version.
 102         * i386-tbl.h: Regenerated.
 103
 104 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 107         * i386-tbl.h: Regenerated.
 108
 109 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 110
 111         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 112
 113 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 114
 115         * Makefile.am: Run "make dep-am".
 116         * Makefile.in: Regenerate.
 117
 118 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 119
 120         * i386-dis.c (MOVBE_Fixup): New.
 121         (Mo): Likewise.
 122         (PREFIX_0F3880): Likewise.
 123         (PREFIX_0F3881): Likewise.
 124         (PREFIX_0F38F0): Updated.
 125         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 126         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 127         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 128
 129         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 130         CPU_EPT_FLAGS.
 131         (cpu_flags): Add CpuMovbe and CpuEPT.
 132
 133         * i386-opc.h (CpuMovbe): New.
 134         (CpuEPT): Likewise.
 135         (CpuLM): Updated.
 136         (i386_cpu_flags): Add cpumovbe and cpuept.
 137
 138         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 139         * i386-init.h: Regenerated.
 140         * i386-tbl.h: Likewise.
 141
 142 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 143
 144         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 145         the two drem and the two dremu macros.
 146
 147 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 148
 149         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 150         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 151         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 152         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 153
 154 2008-04-25  David S. Miller  <davem@davemloft.net>
 155
 156         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 157         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 158
 159 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 160
 161         * aclocal.m4: Regenerate.
 162         * configure: Regenerate.
 163
 164 2008-04-23  David S. Miller  <davem@davemloft.net>
 165
 166         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 167         extended values.
 168         (prefetch_table): Add missing values.
 169
 170 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 171
 172         * i386-gen.c (opcode_modifiers): Add NoAVX.
 173
 174         * i386-opc.h (NoAVX): New.
 175         (OldGcc): Updated.
 176         (i386_opcode_modifier): Add noavx.
 177
 178         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 179         instructions which don't have AVX equivalent.
 180         * i386-tbl.h: Regenerated.
 181
 182 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 183
 184         * i386-dis.c (OP_VEX_FMA): New.
 185         (OP_EX_VexImmW): Likewise.
 186         (VexFMA): Likewise.
 187         (Vex128FMA): Likewise.
 188         (EXVexImmW): Likewise.
 189         (get_vex_imm8): Likewise.
 190         (OP_EX_VexReg): Likewise.
 191         (vex_i4_done): Renamed to ...
 192         (vex_w_done): This.
 193         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 194         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 195         FMA instructions.
 196         (print_insn): Updated.
 197         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 198         (OP_REG_VexI4): Check invalid high registers.
 199
 200 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 201             Michael Meissner  <michael.meissner@amd.com>
 202
 203         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 204         * i386-tbl.h: Regenerate from i386-opc.tbl.
 205
 206 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 207
 208         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 209         accept Power E500MC instructions.
 210         (print_ppc_disassembler_options): Document -Me500mc.
 211         * ppc-opc.c (DUIS, DUI, T): New.
 212         (XRT, XRTRA): Likewise.
 213         (E500MC): Likewise.
 214         (powerpc_opcodes): Add new Power E500MC instructions.
 215
 216 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 217
 218         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 219         (print_s390_disassembler_options): New function.
 220         * disassemble.c (disassembler_usage): Invoke
 221         print_s390_disassembler_options.
 222
 223 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 224
 225         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 226         of local variables used for mnemonic parsing: prefix, suffix and
 227         number.
 228
 229 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 230
 231         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 232         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 233         (s390_crb_extensions): New extensions table.
 234         (insertExpandedMnemonic): Handle '$' tag.
 235         * s390-opc.txt: Remove conditional jump variants which can now
 236         be expanded automatically.
 237         Replace '*' tag with '$' in the compare and branch instructions.
 238
 239 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 240
 241         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 242         (PREFIX_VEX_3AXX): Likewis.
 243
 244 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 245
 246         * i386-opc.tbl: Remove 4 extra blank lines.
 247
 248 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 249
 250         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 251         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 252         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 253         * i386-opc.tbl: Likewise.
 254
 255         * i386-opc.h (CpuCLMUL): Renamed to ...
 256         (CpuPCLMUL): This.
 257         (CpuFMA): Updated.
 258         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 259
 260         * i386-init.h: Regenerated.
 261
 262 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 263
 264         * i386-dis.c (OP_E_register): New.
 265         (OP_E_memory): Likewise.
 266         (OP_VEX): Likewise.
 267         (OP_EX_Vex): Likewise.
 268         (OP_EX_VexW): Likewise.
 269         (OP_XMM_Vex): Likewise.
 270         (OP_XMM_VexW): Likewise.
 271         (OP_REG_VexI4): Likewise.
 272         (PCLMUL_Fixup): Likewise.
 273         (VEXI4_Fixup): Likewise.
 274         (VZERO_Fixup): Likewise.
 275         (VCMP_Fixup): Likewise.
 276         (VPERMIL2_Fixup): Likewise.
 277         (rex_original): Likewise.
 278         (rex_ignored): Likewise.
 279         (Mxmm): Likewise.
 280         (XMM): Likewise.
 281         (EXxmm): Likewise.
 282         (EXxmmq): Likewise.
 283         (EXymmq): Likewise.
 284         (Vex): Likewise.
 285         (Vex128): Likewise.
 286         (Vex256): Likewise.
 287         (VexI4): Likewise.
 288         (EXdVex): Likewise.
 289         (EXqVex): Likewise.
 290         (EXVexW): Likewise.
 291         (EXdVexW): Likewise.
 292         (EXqVexW): Likewise.
 293         (XMVex): Likewise.
 294         (XMVexW): Likewise.
 295         (XMVexI4): Likewise.
 296         (PCLMUL): Likewise.
 297         (VZERO): Likewise.
 298         (VCMP): Likewise.
 299         (VPERMIL2): Likewise.
 300         (xmm_mode): Likewise.
 301         (xmmq_mode): Likewise.
 302         (ymmq_mode): Likewise.
 303         (vex_mode): Likewise.
 304         (vex128_mode): Likewise.
 305         (vex256_mode): Likewise.
 306         (USE_VEX_C4_TABLE): Likewise.
 307         (USE_VEX_C5_TABLE): Likewise.
 308         (USE_VEX_LEN_TABLE): Likewise.
 309         (VEX_C4_TABLE): Likewise.
 310         (VEX_C5_TABLE): Likewise.
 311         (VEX_LEN_TABLE): Likewise.
 312         (REG_VEX_XX): Likewise.
 313         (MOD_VEX_XXX): Likewise.
 314         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 315         (PREFIX_0F3A44): Likewise.
 316         (PREFIX_0F3ADF): Likewise.
 317         (PREFIX_VEX_XXX): Likewise.
 318         (VEX_OF): Likewise.
 319         (VEX_OF38): Likewise.
 320         (VEX_OF3A): Likewise.
 321         (VEX_LEN_XXX): Likewise.
 322         (vex): Likewise.
 323         (need_vex): Likewise.
 324         (need_vex_reg): Likewise.
 325         (vex_i4_done): Likewise.
 326         (vex_table): Likewise.
 327         (vex_len_table): Likewise.
 328         (OP_REG_VexI4): Likewise.
 329         (vex_cmp_op): Likewise.
 330         (pclmul_op): Likewise.
 331         (vpermil2_op): Likewise.
 332         (m_mode): Updated.
 333         (es_reg): Likewise.
 334         (PREFIX_0F38F0): Likewise.
 335         (PREFIX_0F3A60): Likewise.
 336         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 337         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 338         and PREFIX_VEX_XXX entries.
 339         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 340         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 341         PREFIX_0F3ADF.
 342         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 343         Add MOD_VEX_XXX entries.
 344         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 345         REX byte in rex_original.
 346         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 347         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 348         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 349         calling get_valid_dis386.  Use rex_original and rex_ignored when
 350         printing out REX.
 351         (putop): Handle "XY".
 352         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 353         ymmq_mode.
 354         (OP_E_extended): Updated to use OP_E_register and
 355         OP_E_memory.
 356         (OP_XMM): Handle VEX.
 357         (OP_EX): Likewise.
 358         (XMM_Fixup): Likewise.
 359         (CMP_Fixup): Use ARRAY_SIZE.
 360
 361         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 362         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 363         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 364         OPERAND_TYPE_VEX_IMM4.
 365         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 366         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 367         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 368         VexImmExt and SSE2AVX.
 369         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 370
 371         * i386-opc.h (CpuAVX): New.
 372         (CpuAES): Likewise.
 373         (CpuCLMUL): Likewise.
 374         (CpuFMA): Likewise.
 375         (Vex): Likewise.
 376         (Vex256): Likewise.
 377         (VexNDS): Likewise.
 378         (VexNDD): Likewise.
 379         (VexW0): Likewise.
 380         (VexW1): Likewise.
 381         (Vex0F): Likewise.
 382         (Vex0F38): Likewise.
 383         (Vex0F3A): Likewise.
 384         (Vex3Sources): Likewise.
 385         (VexImmExt): Likewise.
 386         (SSE2AVX): Likewise.
 387         (RegYMM): Likewise.
 388         (Ymmword): Likewise.
 389         (Vex_Imm4): Likewise.
 390         (Implicit1stXmm0): Likewise.
 391         (CpuXsave): Updated.
 392         (CpuLM): Likewise.
 393         (ByteOkIntel): Likewise.
 394         (OldGcc): Likewise.
 395         (Control): Likewise.
 396         (Unspecified): Likewise.
 397         (OTMax): Likewise.
 398         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 399         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 400         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 401         vex3sources, veximmext and sse2avx.
 402         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 403
 404         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 405
 406         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 407
 408         * i386-init.h: Regenerated.
 409         * i386-tbl.h: Likewise.
 410
 411 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 412
 413         From  Robin Getz  <robin.getz@analog.com>
 414         * bfin-dis.c (bu32): Typedef.
 415         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 416         (constant_formats[]): Add uimm32 and huimm16.
 417         (fmtconst_val): New.
 418         (uimm32): Define.
 419         (huimm32): Define.
 420         (imm16_val): Define.
 421         (luimm16_val): Define.
 422         (struct saved_state): Define.
 423         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 424         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 425         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 426         (get_allreg): New.
 427         (decode_LDIMMhalf_0): Print out the whole register value.
 428
 429         From Jie Zhang  <jie.zhang@analog.com>
 430         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 431         multiply and multiply-accumulate to data register instruction.
 432
 433         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 434         c_imm32, c_huimm32e): Define.
 435         (constant_formats): Add flags for printing decimal, leading spaces, and
 436         exact symbols.
 437         (comment, parallel): Add global flags in all disassembly.
 438         (fmtconst): Take advantage of new flags, and print default in hex.
 439         (fmtconst_val): Likewise.
 440         (decode_macfunc): Be consistant with spaces, tabs, comments,
 441         capitalization in disassembly, fix minor coding style issues.
 442         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 443         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 444         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 445         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 446         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 447         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 448         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 449         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 450         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 451         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 452         _print_insn_bfin, print_insn_bfin): Likewise.
 453
 454 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 455
 456         * aclocal.m4: Regenerate.
 457         * configure: Likewise.
 458         * Makefile.in: Likewise.
 459
 460 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 461
 462         * Makefile.am: Run "make dep-am".
 463         * Makefile.in: Regenerate.
 464         * configure: Regenerate.
 465
 466 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 467
 468         * ppc-opc.c (powerpc_opcodes): Order and format.
 469
 470 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 471
 472         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 473         * i386-tbl.h: Regenerated.
 474
 475 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 476
 477         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 478         x86-64.
 479         * i386-tbl.h: Regenerated.
 480
 481 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 482
 483         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 484         and Fword for far indirect jmp. Allow Reg16 and Word for near
 485         indirect jmp on x86-64. Disallow Fword for lcall.
 486         * i386-tbl.h: Re-generate.
 487
 488 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 489
 490         * cr16-opc.c  (cr16_num_optab): Defined
 491
 492 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 493
 494         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 495         * i386-init.h: Regenerated.
 496
 497 2008-02-14  Nick Clifton  <nickc@redhat.com>
 498
 499         PR binutils/5524
 500         * configure.in (SHARED_LIBADD): Select the correct host specific
 501         file extension for shared libraries.
 502         * configure: Regenerate.
 503
 504 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 505
 506         * i386-opc.h (RegFlat): New.
 507         * i386-reg.tbl (flat): Add.
 508         * i386-tbl.h: Re-generate.
 509
 510 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 511
 512         * i386-dis.c (a_mode): New.
 513         (cond_jump_mode): Adjust.
 514         (Ma): Change to a_mode.
 515         (intel_operand_size): Handle a_mode.
 516         * i386-opc.tbl: Allow Dword and Qword for bound.
 517         * i386-tbl.h: Re-generate.
 518
 519 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 520
 521         * i386-gen.c (process_i386_registers): Process new fields.
 522         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 523         unsigned char. Add dw2_regnum and Dw2Inval.
 524         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 525         register names.
 526         * i386-tbl.h: Re-generate.
 527
 528 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 529
 530         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 531         * i386-init.h: Updated.
 532
 533 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 534
 535         * i386-gen.c (cpu_flags): Add CpuXsave.
 536
 537         * i386-opc.h (CpuXsave): New.
 538         (CpuLM): Updated.
 539         (i386_cpu_flags): Add cpuxsave.
 540
 541         * i386-dis.c (MOD_0FAE_REG_4): New.
 542         (RM_0F01_REG_2): Likewise.
 543         (MOD_0FAE_REG_5): Updated.
 544         (RM_0F01_REG_3): Likewise.
 545         (reg_table): Use MOD_0FAE_REG_4.
 546         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 547         for xrstor.
 548         (rm_table): Add RM_0F01_REG_2.
 549
 550         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 551         * i386-init.h: Regenerated.
 552         * i386-tbl.h: Likewise.
 553
 554 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 555
 556         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 557         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 558         * i386-tbl.h: Re-generate.
 559
 560 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 561
 562         PR 5715
 563         * configure: Regenerated.
 564
 565 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 566
 567         * mips-dis.c: Update copyright.
 568         (mips_arch_choices): Add Octeon.
 569         * mips-opc.c: Update copyright.
 570         (IOCT): New macro.
 571         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 572
 573 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 574
 575         * ppc-opc.c: Support optional L form mtmsr.
 576
 577 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 578
 579         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 580
 581 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 582
 583         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 584         * i386-init.h: Regenerated.
 585
 586 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 587
 588         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 589         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 590
 591 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 592
 593         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 594         (cpu_flags): Likewise.
 595
 596         * i386-opc.h (CpuMMX2): Removed.
 597         (CpuSSE): Updated.
 598
 599         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 600         * i386-init.h: Regenerated.
 601         * i386-tbl.h: Likewise.
 602
 603 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 604
 605         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 606         CPU_SMX_FLAGS.
 607         * i386-init.h: Regenerated.
 608
 609 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 610
 611         * i386-opc.tbl: Use Qword on movddup.
 612         * i386-tbl.h: Regenerated.
 613
 614 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 615
 616         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 617         * i386-tbl.h: Regenerated.
 618
 619 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 620
 621         * i386-dis.c (Mx): New.
 622         (PREFIX_0FC3): Likewise.
 623         (PREFIX_0FC7_REG_6): Updated.
 624         (dis386_twobyte): Use PREFIX_0FC3.
 625         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 626         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 627         movntss.
 628
 629 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 630
 631         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 632         (operand_types): Add Mem.
 633
 634         * i386-opc.h (IntelSyntax): New.
 635         * i386-opc.h (Mem): New.
 636         (Byte): Updated.
 637         (Opcode_Modifier_Max): Updated.
 638         (i386_opcode_modifier): Add intelsyntax.
 639         (i386_operand_type): Add mem.
 640
 641         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 642         instructions.
 643
 644         * i386-reg.tbl: Add size for accumulator.
 645
 646         * i386-init.h: Regenerated.
 647         * i386-tbl.h: Likewise.
 648
 649 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         * i386-opc.h (Byte): Fix a typo.
 652
 653 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 654
 655         PR gas/5534
 656         * i386-gen.c (operand_type_init): Add Dword to
 657         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 658         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 659         Qword and Xmmword.
 660         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 661         Xmmword, Unspecified and Anysize.
 662         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 663         an alias of Xmmword.
 664
 665         * i386-opc.h (CheckSize): Removed.
 666         (Byte): Updated.
 667         (Word): Likewise.
 668         (Dword): Likewise.
 669         (Qword): Likewise.
 670         (Xmmword): Likewise.
 671         (FWait): Updated.
 672         (OTMax): Likewise.
 673         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 674         qword and xmmword.
 675         (Fword): New.
 676         (TBYTE): Likewise.
 677         (Unspecified): Likewise.
 678         (Anysize): Likewise.
 679         (i386_operand_type): Add byte, word, dword, fword, qword,
 680         tbyte xmmword, unspecified and anysize.
 681
 682         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 683         Tbyte, Xmmword, Unspecified and Anysize.
 684
 685         * i386-reg.tbl: Add size for accumulator.
 686
 687         * i386-init.h: Regenerated.
 688         * i386-tbl.h: Likewise.
 689
 690 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 691
 692         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 693         (REG_0F18): Updated.
 694         (reg_table): Updated.
 695         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 696         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 697
 698 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 699
 700         * i386-gen.c (set_bitfield): Use fail () on error.
 701
 702 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 703
 704         * i386-gen.c (lineno): New.
 705         (filename): Likewise.
 706         (set_bitfield): Report filename and line numer on error.
 707         (process_i386_opcodes): Set filename and update lineno.
 708         (process_i386_registers): Likewise.
 709
 710 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 711
 712         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 713         ATTSyntax.
 714
 715         * i386-opc.h (IntelMnemonic): Renamed to ..
 716         (ATTSyntax): This
 717         (Opcode_Modifier_Max): Updated.
 718         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 719         and intelsyntax.
 720
 721         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 722         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 723         * i386-tbl.h: Regenerated.
 724
 725 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 726
 727         * i386-gen.c: Update copyright to 2008.
 728         * i386-opc.h: Likewise.
 729         * i386-opc.tbl: Likewise.
 730
 731         * i386-init.h: Regenerated.
 732         * i386-tbl.h: Likewise.
 733
 734 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 735
 736         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 737         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 738         * i386-tbl.h: Regenerated.
 739
 740 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 741
 742         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 743         CpuSSE4_2_Or_ABM.
 744         (cpu_flags): Likewise.
 745
 746         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 747         (CpuSSE4_2_Or_ABM): Likewise.
 748         (CpuLM): Updated.
 749         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 750
 751         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 752         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 753         and CpuPadLock, respectively.
 754         * i386-init.h: Regenerated.
 755         * i386-tbl.h: Likewise.
 756
 757 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 758
 759         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 760
 761         * i386-opc.h (No_xSuf): Removed.
 762         (CheckSize): Updated.
 763
 764         * i386-tbl.h: Regenerated.
 765
 766 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 767
 768         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 769         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 770         CPU_SSE5_FLAGS.
 771         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 772
 773         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 774         (CpuLM): Updated.
 775         (i386_cpu_flags): Add cpusse4_2_or_abm.
 776
 777         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 778         CpuABM|CpuSSE4_2 on popcnt.
 779         * i386-init.h: Regenerated.
 780         * i386-tbl.h: Likewise.
 781
 782 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 783
 784         * i386-opc.h: Update comments.
 785
 786 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 787
 788         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 789         * i386-opc.h: Likewise.
 790         * i386-opc.tbl: Likewise.
 791
 792 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 793
 794         PR gas/5534
 795         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 796         Byte, Word, Dword, QWord and Xmmword.
 797
 798         * i386-opc.h (No_xSuf): New.
 799         (CheckSize): Likewise.
 800         (Byte): Likewise.
 801         (Word): Likewise.
 802         (Dword): Likewise.
 803         (QWord): Likewise.
 804         (Xmmword): Likewise.
 805         (FWait): Updated.
 806         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 807         Dword, QWord and Xmmword.
 808
 809         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 810         used.
 811         * i386-tbl.h: Regenerated.
 812
 813 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 814
 815         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 816         From Miod Vallat.
 817
 818 For older changes see ChangeLog-2007
 819 \f
 820 Local Variables:
 821 mode: change-log
 822 left-margin: 8
 823 fill-column: 74
 824 version-control: never
 825 End: